公开(公告)号：US08742592B2

公开(公告)日：2014-06-03

申请号：US13424791

申请日：2012-03-20

申请人： Satoshi Wakatsuki ,  Ichiro Mizushima ,  Atsuko Sakata ,  Masayuki Kitamura

发明人： Satoshi Wakatsuki ,  Ichiro Mizushima ,  Atsuko Sakata ,  Masayuki Kitamura

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： C23C16/0272 ,  C23C16/045 ,  C23C16/14 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76877

摘要： According to one embodiment, a method for manufacturing a semiconductor device includes: forming a silicon oxide film on a semiconductor substrate; forming a via in the silicon oxide film; forming a contact layer inside the via; forming a silicon layer on the contact layer; and forming a tungsten film embedded in the via by making a tungsten-containing gas react with the silicon layer.

摘要翻译： 根据一个实施例，一种制造半导体器件的方法包括：在半导体衬底上形成氧化硅膜; 在氧化硅膜中形成通孔; 在通孔内形成接触层; 在所述接触层上形成硅层; 以及通过使含钨气体与硅层反应形成嵌入通孔中的钨膜。

公开(公告)号：US08648464B2

公开(公告)日：2014-02-11

申请号：US13413854

申请日：2012-03-07

申请人： Masayuki Kitamura ,  Makoto Wada ,  Yuichi Yamazaki ,  Masayuki Katagiri ,  Atsuko Sakata ,  Akihiro Kajita ,  Tadashi Sakai ,  Naoshi Sakuma ,  Ichiro Mizushima

发明人： Masayuki Kitamura ,  Makoto Wada ,  Yuichi Yamazaki ,  Masayuki Katagiri ,  Atsuko Sakata ,  Akihiro Kajita ,  Tadashi Sakai ,  Naoshi Sakuma ,  Ichiro Mizushima

IPC分类号： H01L23/48

CPC分类号： H01L21/02639 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/02645 ,  H01L21/28556 ,  H01L21/32051 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/53276 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device is disclosed. The device includes a semiconductor substrate, and an interconnection above the semiconductor substrate. The interconnection includes a co-catalyst layer, a catalyst layer on the co-catalyst layer, and a graphene layer on the catalyst layer. The co-catalyst layer includes a portion contacting the catalyst layer. The portion has a face-centered cubic structure with a (111) plane oriented parallel to a surface of the semiconductor substrate. The catalyst layer has a face-centered cubic structure with a (111) plane oriented parallel to the surface of the semiconductor substrate.

摘要翻译： 根据一个实施例，公开了一种半导体器件。 该器件包括半导体衬底和半导体衬底上方的互连。 互连包括助催化剂层，助催化剂层上的催化剂层和催化剂层上的石墨烯层。 助催化剂层包括与催化剂层接触的部分。 该部分具有面平面立方结构，其中（111）面平行于半导体衬底的表面定向。 催化剂层具有面平面立方结构，其中（111）面平行于半导体衬底的表面取向。

公开(公告)号：US08551871B2

公开(公告)日：2013-10-08

申请号：US13240662

申请日：2011-09-22

申请人： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

发明人： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US20120091414A1

公开(公告)日：2012-04-19

申请号：US13052143

申请日：2011-03-21

申请人： Yoko IWAKAJI ,  Jun Hirota ,  Moto Yabuki ,  Wakana Kai ,  Hirokazu Ishida ,  Ichiro Mizushima

发明人： Yoko IWAKAJI ,  Jun Hirota ,  Moto Yabuki ,  Wakana Kai ,  Hirokazu Ishida ,  Ichiro Mizushima

IPC分类号： H01L47/00 ,  H01L21/20 ,  H01L29/04

CPC分类号： H01L29/045 ,  H01L21/02425 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02667 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L29/685 ,  H01L29/868 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/16 ,  H01L45/1675

摘要： According to one embodiment, a semiconductor device includes a plurality of silicon films. The plurality of silicon films are disposed on one plane and are made of polysilicon containing an impurity. A crystal orientation of each of the silicon films is a (311) orientation.

摘要翻译： 根据一个实施例，半导体器件包括多个硅膜。 多个硅膜设置在一个平面上，由含有杂质的多晶硅制成。 每个硅膜的晶体取向为（311）取向。

公开(公告)号：US20120090535A1

公开(公告)日：2012-04-19

申请号：US13240662

申请日：2011-09-22

申请人： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

发明人： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC分类号： C30B25/02

CPC分类号： H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US08043945B2

公开(公告)日：2011-10-25

申请号：US12401453

申请日：2009-03-10

申请人： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

发明人： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US08012858B2

公开(公告)日：2011-09-06

申请号：US12560265

申请日：2009-09-15

申请人： Masahiko Murano ,  Ichiro Mizushima ,  Tsutomu Sato ,  Shinji Mori ,  Shuji Katsui ,  Hiroshi Itokawa

发明人： Masahiko Murano ,  Ichiro Mizushima ,  Tsutomu Sato ,  Shinji Mori ,  Shuji Katsui ,  Hiroshi Itokawa

IPC分类号： H01L21/20

CPC分类号： H01L21/02381 ,  H01L21/02378 ,  H01L21/02532 ,  H01L21/02661 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L29/66795 ,  H01L29/7848

摘要： A method of fabricating a semiconductor device according to one embodiment includes: removing a native oxide film and adhering silicon nitrides on an area of a Si based substrate in hydrogen gas atmosphere under a condition in which a pressure is a first pressure and a temperature is a first temperature, a silicon nitride-containing member being formed on the Si based substrate, the area being a area not covered by the member; lowering the temperature to a second temperature from the first temperature while maintaining the pressure at the first pressure in hydrogen gas atmosphere; lowering the pressure to a second pressure from the first pressure while maintaining the temperature at the second temperature in hydrogen gas atmosphere; and epitaxially growing a crystal on the area of the Si based substrate in a precursor gas atmosphere after the pressure is lowered to the second pressure, the crystal including at least one of Si and Ge, the precursor gas atmosphere including at least one of hydrogen, Si and Ge.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在氢气气氛中，在压力为第一压力和温度为的条件下，除去天然氧化物膜并将硅氮化物粘附在Si基衬底的区域上 第一温度，在所述Si基衬底上形成含氮化硅的构件，所述区域是未被构件覆盖的区域; 将温度从第一温度降低到第二温度，同时保持在氢气气氛中的第一压力下的压力; 将压力从第一压力降低到第二压力，同时将温度保持在第二温度在氢气气氛中; 并且在所述压力降低到所述第二压力之后，在前驱体气体气氛中，在所述Si基基板的区域上外延生长晶体，所述晶体包括Si和Ge中的至少一种，所述前体气体气体包括氢， Si和Ge。

公开(公告)号：US20110049611A1

公开(公告)日：2011-03-03

申请号：US12769951

申请日：2010-04-29

申请人： Masahiro Kiyotoshi ,  Atsuhiro Kinoshita ,  Kiwamu Sakuma ,  Koichi Muraoka ,  Ichiro Mizushima

发明人： Masahiro Kiyotoshi ,  Atsuhiro Kinoshita ,  Kiwamu Sakuma ,  Koichi Muraoka ,  Ichiro Mizushima

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L29/792 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11548 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/785 ,  H01L29/7881

摘要： In a memory cell portion, a stacked structure, in which dielectric layers and semiconductor layers are alternately stacked, is arranged in a fin shape on a semiconductor substrate, and in a peripheral circuit portion, a gate electrode is arranged on the semiconductor substrate via a gate dielectric film so that a height of an upper surface of the gate electrode is set to be substantially equal to a height of an upper surface of the stacked structure in which the dielectric layers and the semiconductor layers are alternately stacked.

摘要翻译： 在存储单元部分中，电介质层和半导体层交替层叠的堆叠结构在半导体衬底上以翅片形状布置，并且在外围电路部分中，栅电极经由 使得栅极电极的上表面的高度被设定为与电介质层和半导体层交替层叠的层叠结构的上表面的高度大致相等。

公开(公告)号：US07602013B2

公开(公告)日：2009-10-13

申请号：US11649752

申请日：2007-01-05

申请人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Kouji Matsuo

发明人： Kiyotaka Miyano ,  Ichiro Mizushima ,  Kouji Matsuo

IPC分类号： H01L29/78

CPC分类号： H01L29/1054 ,  H01L21/30625 ,  H01L21/324 ,  H01L29/165 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66606 ,  H01L29/66621

摘要： A semiconductor device includes: a layer provided on or above a semiconductor substrate, having an opening, and containing Si and Ge; and a gate provided at a position corresponding to the opening. It is possible to provide a semiconductor device and a manufacturing method of the same which realize easy control of a recess amount and reduction in damage at the time of the recessing.

摘要翻译： 半导体器件包括：设置在半导体衬底上或上方的具有开口并且包含Si和Ge的层; 以及设置在与开口相对应的位置处的门。 可以提供一种半导体器件及其制造方法，其实现容易控制凹陷量并减少凹陷时的损伤。

公开(公告)号：US20080224252A1

公开(公告)日：2008-09-18

申请号：US12068635

申请日：2008-02-08

申请人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

发明人： Kyoichi Suguro ,  Kiyotaka Miyano ,  Ichiro Mizushima ,  Yoshitaka Tsunashima ,  Takayuki Hiraoka ,  Yasushi Akasaka ,  Tsunetoshi Arikado

IPC分类号： H01L29/00

CPC分类号： H01L21/28194 ,  H01L21/28088 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/76262 ,  H01L21/823481 ,  H01L29/511 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66537 ,  H01L29/66545

摘要： In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.

摘要翻译： 在使用外延生长方法选择性地在硅衬底上生长其上要形成元素的外延层时，形成外延层，以便在作为元件隔离绝缘膜的热氧化膜上方向上延伸， 以防止形成小平面。 随后，通过CMP去除外延层的不需要的部分以完成STI元件隔离结构。