公开(公告)号：US20090291296A1

公开(公告)日：2009-11-26

申请号：US12154289

申请日：2008-05-21

申请人： Paul Alan McConnelee ,  Arun Virupaksha Gowda ,  Elizabeth Ann Burke ,  Kevin Matthew Durocher

发明人： Paul Alan McConnelee ,  Arun Virupaksha Gowda ,  Elizabeth Ann Burke ,  Kevin Matthew Durocher

IPC分类号： B32B15/00 ,  B05D5/12 ,  B32B38/04 ,  B29C65/02 ,  B29C65/52

CPC分类号： H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/0345 ,  H01L2224/0362 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05666 ,  H01L2224/18 ,  H01L2224/24137 ,  H01L2224/82039 ,  H01L2224/92144 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/13055 ,  Y10T156/10 ,  Y10T156/1082 ,  Y10T428/26 ,  Y10T428/263 ,  Y10T428/264 ,  Y10T428/265 ,  Y10T428/31678

摘要： A method of protecting sensitive components prior to, during or subsequent to advanced die packaging processing includes applying a metal stack layer such as titanium/copper (Ti/Cu) onto the front surface of a die assembly such that the die assembly front surface is covered with the metal stack layer. A layer of titanium/copper/titanium (Ti/Cu/Ti) or a solder alloy is also applied to the back surface of the die assembly such that the back surface of the die assembly is covered with the Ti/Cu/Ti layer or solder alloy. The front surface metal stack layer and the back surface Ti/Cu/Ti layer or solder alloy prevent degradation of die metallization prior to, during or subsequent to the advanced die packaging processing.

摘要翻译： 在高级模具包装处理之前，期间或之后保护敏感元件的方法包括将金属堆叠层如钛/铜（Ti / Cu）施加到模具组件的前表面上，使得模具组件前表面被覆盖 与金属堆叠层。 还将一层钛/铜/钛（Ti / Cu / Ti）或焊料合金施加到模具组件的背面，使得模具组件的后表面被Ti / Cu / Ti层覆盖，或 焊锡合金。 前表面金属堆叠层和背面Ti / Cu / Ti层或焊料合金防止在高级模具包装处理之前，期间或之后模具金属化的劣化。

公开(公告)号：US07517785B2

公开(公告)日：2009-04-14

申请号：US11255489

申请日：2005-10-21

申请人： Kevin Matthew Durocher ,  James Wilson Rose

发明人： Kevin Matthew Durocher ,  James Wilson Rose

IPC分类号： H01L21/44

CPC分类号： H05K3/243 ,  H05K3/064 ,  H05K3/244 ,  H05K2203/0361

摘要： A method for making an interconnect is provided. The method includes depositing a conductive layer on a substrate, depositing a protective layer on the conductive layer, patterning the protective layer to form openings to the conductive layer, depositing contact pads on the conductive layer through the openings in the protective layer, the contact pads comprising a conductive material, and patterning the conductive layer and the protective layer to form electrical traces on the substrate.

摘要翻译： 提供一种互连方法。 该方法包括在衬底上沉积导电层，在导电层上沉积保护层，图案化保护层以形成到导电层的开口;通过保护层中的开口在导电层上沉积接触焊盘，接触垫 包括导电材料，以及图案化导电层和保护层以在基底上形成电迹线。

公开(公告)号：US06733711B2

公开(公告)日：2004-05-11

申请号：US10387835

申请日：2003-03-14

申请人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

发明人： Kevin Matthew Durocher ,  Ernest Wayne Balch ,  Vikram B. Krishnamurthy ,  Richard Joseph Saia ,  Herbert Stanley Cole ,  Ronald Frank Kolc

IPC分类号： B29C4514

CPC分类号： H01L23/13 ,  H01L23/3677 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/97 ,  H01L33/46 ,  H01L33/62 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  Y10S362/80 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

摘要翻译： 提供了一种柔性电路模块，包括至少一个刚性载体，安装在至少一个刚性载体的第一侧上的至少一个固态装置，支撑至少一个刚性载体的第二侧的柔性基座， 导电互连图案，以及多个馈通电极，其从所述至少一个刚性载体的第一侧延伸到第二侧，并将导电互连图案与多个固态中的至少一个电连接 设备。 固态器件可以是LED芯片以形成LED阵列模块。

公开(公告)号：US06475877B1

公开(公告)日：2002-11-05

申请号：US09469749

申请日：1999-12-22

申请人： Richard Joseph Saia ,  Kevin Matthew Durocher ,  James Wilson Rose ,  Leonard Richard Douglas

发明人： Richard Joseph Saia ,  Kevin Matthew Durocher ,  James Wilson Rose ,  Leonard Richard Douglas

IPC分类号： H01L21301

CPC分类号： H01L24/76 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1423 ,  Y10T29/49131 ,  H01L2924/00

摘要： A method and process sequence for accurately aligning (die to interconnect metal on flex substrate such as polyimide flex is described. A mask for via formation is first patterned in a metal layer on the bottom surface of the flex substrate. Die attach means such as die attach adhesive is then applied to the top side of flex substrate. The bond pads on die are locally, adaptively aligned to the patterned metal via mask on the flex with high accuracy. Vias down to the die bond pads are then created by either plasma etching or excimer laser ablation through the existing aligned metal mask on the flex substrate, and interconnect metal is then deposited, patterned and etched. As a result of this process, the flex metal interconnect artwork does not have to be customized for each die misplacement using “adaptive lithography”. Lower cost commercially available lithography equipment can be used for processing, reducing capital equipment and processing cost. The method is compatible with the projected designs of the next generation die which will have bond pads on the order of 40 um in size.

摘要翻译： 描述了用于精确对准（模具与柔性基板上的互连金属如聚酰亚胺柔性）的方法和工艺顺序，首先在柔性基板的底表面上的金属层中对通孔形成用掩模进行图案化， 然后将附着的粘合剂施加到柔性基板的顶侧，芯片上的接合焊盘以高精度局部地适应性地与柔性上的图案化金属通孔掩模对准，然后通过等离子体蚀刻 或准分子激光烧蚀通过柔性基板上的现有对准的金属掩模，然后沉积，图案化和蚀刻互连金属。作为该过程的结果，柔性金属互连图案不需要针对每个管芯错位进行定制， 适应光刻“，低成本商业光刻设备可用于加工，减少资本设备和加工成本，该方法与p 下一代芯片的焊接设计将具有大小为40um的接合焊盘。

公开(公告)号：US06429381B1

公开(公告)日：2002-08-06

申请号：US09681555

申请日：2001-04-27

申请人： Richard Joseph Saia ,  Robert John Wojnarowski ,  Stanton Earl Weaver, Jr. ,  Kevin Matthew Durocher ,  Christopher James Kapusta ,  James Enrico Sabatini

发明人： Richard Joseph Saia ,  Robert John Wojnarowski ,  Stanton Earl Weaver, Jr. ,  Kevin Matthew Durocher ,  Christopher James Kapusta ,  James Enrico Sabatini

IPC分类号： H05K103

CPC分类号： H05K3/403 ,  H01L23/3677 ,  H01L23/481 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/0061 ,  H05K3/321 ,  H05K3/4605 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09663 ,  H05K2201/1028 ,  H05K2203/0415 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/5313 ,  Y10T29/53174

摘要： A method for fabricating a substrate package for a high density interconnect multichip module stack comprises: providing a substrate having holes extending therethrough and having a bottom surface with metallization situated thereon; providing a metal sheet having grooves extending therethrough; attaching the metal sheet to the bottom surface of the substrate; attaching metal plugs through the holes to the metal sheet; and removing portions of the substrate to expose the metal plugs and separate the metal sheet into a plurality of segments defined by the grooves.

摘要翻译： 一种用于制造用于高密度互连多芯片模块堆叠的衬底封装的方法，包括：提供具有延伸穿过其中并且具有位于其上的金属化的底表面的孔的衬底; 提供具有延伸穿过其中的槽的金属片; 将所述金属片附接到所述基板的底面; 将金属塞通过孔附接到金属板; 以及去除所述基板的部分以暴露所述金属塞并将所述金属板分离成由所述槽限定的多个段。

公开(公告)号：US06303193B1

公开(公告)日：2001-10-16

申请号：US09187664

申请日：1998-11-05

申请人： Renato Guida ,  Kevin Matthew Durocher ,  Thomas Bert Gorczyca ,  Bin Wei

发明人： Renato Guida ,  Kevin Matthew Durocher ,  Thomas Bert Gorczyca ,  Bin Wei

IPC分类号： B05D300

CPC分类号： B23H3/04 ,  B23H3/06 ,  Y10T428/1355 ,  Y10T428/249921 ,  Y10T428/31678

摘要： A process for producing a pattern in the surface coating of an electrode used in an electrochemical machining process comprises the steps of providing a cylinder having a body composed of an electrically conductive material and a surface coating of an electrically insulating material and exposing the surface coating of the cylinder to a source of light in accordance with the pattern. Locators(s) may optionally be formed on the surface of the cylinder to assist in positioning the electrode in a predrilled hole.

摘要翻译： 用于在电化学加工工艺中使用的用于电极的表面涂层中形成图案的方法包括以下步骤：提供具有由导电材料构成的主体和电绝缘材料的表面涂层的圆柱体， 气缸根据图案的光源。 定位器可以可选地形成在圆柱体的表面上，以帮助将电极定位在预钻孔中。

公开(公告)号：US5844810A

公开(公告)日：1998-12-01

申请号：US453110

申请日：1995-05-30

申请人： Leonard Richard Douglas ,  Richard Joseph Saia ,  Kevin Matthew Durocher

发明人： Leonard Richard Douglas ,  Richard Joseph Saia ,  Kevin Matthew Durocher

IPC分类号： H01L21/98 ,  H01L23/52 ,  H01L23/538 ,  G01B9/00 ,  G06F15/46

CPC分类号： H01L25/50 ,  H01L23/5389 ,  H01L24/24 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787

摘要： An adaptive method of providing electrical interconnections for a plurality of feed-through lines each having a respective end extending to at least one substrate surface includes generating an artwork representation for the electrical interconnections using specified feed-through line end positions on the at least one substrate surface. The at least one substrate surface may include a surface of a stack of substrates with at least two substrates having feed-through line ends facing a common direction. Actual positions of the at least two of the feed-through line ends are determined, and a scale factor is estimated using the determined actual positions. Actual positions of others of the feed-through line ends are estimated using the scale factor, and the artwork representation is modified to properly include electrical interconnections to ones of the feed-through line ends which are not in their specified positions. The artwork representation can be converted into a turn point polygon (TPP) format for effective data handling and modification of the artwork representation, and the TPP format can then be can be converted to a rectangular representation. A laser can be controlled in accordance with the rectangular representation of the modified artwork.

摘要翻译： 提供用于多个馈通线的电互连的自适应方法，每个馈通线具有延伸到至少一个衬底表面的相应端包括使用至少一个衬底上的指定的馈通线端位置来产生电互连的图形图示 表面。 所述至少一个衬底表面可以包括具有至少两个衬底的堆叠衬底的表面，所述至少两个衬底具有面向公共方向的穿通线端。 确定至少两个馈通线末端的实际位置，并且使用所确定的实际位置来估计比例因子。 使用比例因子估计馈通线末端的其他人的实际位置，并且修改图形表示以适当地包括与不在其指定位置的馈通线端部的电互连。 艺术品表示可以转换为转折点多边形（TPP）格式，用于有效的数据处理和修改艺术品表示，然后可以将TPP格式转换为矩形表示。 可以根据经修改的图案的矩形表示来控制激光。