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    SEMICONDUCTOR DEVICE PACKAGE WITH THERMAL PAD
    65.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE WITH THERMAL PAD 有权

    公开(公告)号：US20230136784A1

    公开(公告)日：2023-05-04

    申请号：US17515176

    申请日：2021-10-29

    Applicant: Texas Instruments Incorporated

    Inventor： Anindya Poddar ,  Ashok Surendra Prabhu ,  Edgar Dorotyao Balidoy ,  Hau Nguyen ,  Makoto Yoshino ,  MING LI

    IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H05K1/02

    Abstract: A described example includes: a package substrate having a die pad with a die side surface and having an opposite backside surface, having leads arranged along two opposite sides and having die pad straps extending from two opposing ends of the die pad. The leads lie in a first plane, a portion of the die pad straps lie in a second plane that is spaced from the first plane and located closer to the die pad, and the die pad lies in a third plane that is spaced from and parallel to the second plane in a direction away from the first plane. A semiconductor die is mounted to the die side surface and mold compound covers the semiconductor die, a portion of the leads, and the die side surface of the die pad, and the backside surface of the die pad exposed from the mold compound.

    FLIP CHIP PACKAGED DEVICES WITH THERMAL INTERPOSER
    66.
    发明申请
    FLIP CHIP PACKAGED DEVICES WITH THERMAL INTERPOSER 有权

    公开(公告)号：US20230059142A1

    公开(公告)日：2023-02-23

    申请号：US17404765

    申请日：2021-08-17

    Applicant: Texas Instruments Incorporated

    Inventor： Vivek Arora ,  Woochan Kim ,  Anindya Poddar

    IPC: H01L23/433 ,  H01L23/31 ,  H01L23/00 ,  H01L23/495

    Abstract: In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.

    Fan-out electronic device
    68.
    发明授权
    Fan-out electronic device 有权

    公开(公告)号：US11410875B2

    公开(公告)日：2022-08-09

    申请号：US16225875

    申请日：2018-12-19

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Hau Thanh Nguyen ,  Woochan Kim ,  Yi Yan ,  Luu Thanh Nguyen ,  Ashok Prabhu ,  Anindya Poddar ,  Masamitsu Matsuura ,  Kengo Aoya ,  Mutsumi Masumoto

    IPC: H01L21/768 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00

    Abstract: An electronic device (100) includes a substrate (110) and an integrated circuit (120) provided on the substrate (110) having a surface facing away from the substrate (110). An insulating layer (150) extends over the substrate (110) and around the integrated circuit (120) to define an interface (154) between the insulating layer (150) and the integrated circuit (120). An electrically conductive via (130) is provided on the surface of the integrated circuit (120). An insulating material (140) extends over the via (130) and includes an opening (142) exposing a portion of the via (130). A repassivation member (162) extends over the insulating layer (150) and has a surface (164) aligned with the interface (154). An electrically conductive redistribution member (181) is electrically connected to the via (130) and extends over the repassivation member (162) into contact with the insulating layer (150).

    Stress buffer layer in embedded package
    69.
    发明授权
    Stress buffer layer in embedded package 有权

    公开(公告)号：US11183441B2

    公开(公告)日：2021-11-23

    申请号：US16808018

    申请日：2020-03-03

    Applicant: Texas Instruments Incorporated

    Inventor： Woochan Kim ,  Masamitsu Matsuura ,  Mutsumi Masumoto ,  Kengo Aoya ,  Hau Thanh Nguyen ,  Vivek Kishorechand Arora ,  Anindya Poddar

    IPC: H01L23/10 ,  H01L23/34 ,  H01L23/367 ,  H01L21/56 ,  H01L23/00 ,  H01L23/373

    Abstract: The disclosed principles provide a stress buffer layer between an IC die and heat spreader used to dissipate heat from the die. The stress buffer layer comprises distributed pairs of conductive pads and a corresponding set of conductive posts formed on the conductive pads. In one embodiment, the stress buffer layer may comprise conductive pads laterally distributed over non-electrically conducting surfaces of an embedded IC die to thermally conduct heat from the IC die. In addition, such a stress buffer layer may comprise conductive posts laterally distributed and formed directly on each of the conductive pads. Each of the conductive posts thermally conduct heat from respective conductive pads. In addition, each conductive post may have a lateral width less than a lateral width of its corresponding conductive pad. A heat spreader is then formed over the conductive posts which thermally conducts heat from the conductive posts through the heat spreader.

    SEMICONDUCTOR PACKAGE WITH ISOLATED HEAT SPREADER
    70.
    发明申请
    SEMICONDUCTOR PACKAGE WITH ISOLATED HEAT SPREADER 有权

    公开(公告)号：US20210202357A1

    公开(公告)日：2021-07-01

    申请号：US16840407

    申请日：2020-04-05

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Anindya Poddar ,  Woochan Kim ,  Vivek Kishorechand Arora

    IPC: H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16

    Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package.

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