Semiconductor mechanical sensor
    64.
    发明授权

    公开(公告)号:US06550331B2

    公开(公告)日:2003-04-22

    申请号:US09947409

    申请日:2001-09-07

    IPC分类号: G01P15125

    摘要: A semiconductor mechanical sensor having a new structure in which a S/N ratio is improved. In the central portion of a silicon substrate 1, a recess portion 2 is formed which includes a beam structure. A weight is formed at the tip of the beam, and in the bottom surface of the weight in the bottom surface of the recess portion 2 facing the same, an electrode 5 is formed. An alternating current electric power is applied between the weight portion 4 and the electrode 5 so that static electricity is created and the weight is excited by the static electricity. In an axial direction which is perpendicular to the direction of the excitation of the weight, an electrode 6 is disposed to face one surface of the weight and a wall surface of the substrate which faces the same. A change in a capacitance between the facing electrodes is electrically detected, and therefore, a change in a physical force acting in the same direction is detected.

    Acceleration sensor and process for the production thereof
    65.
    发明授权
    Acceleration sensor and process for the production thereof 有权
    加速度传感器及其制造方法

    公开(公告)号:US06171881B2

    公开(公告)日:2001-01-09

    申请号:US09457349

    申请日:1999-12-09

    申请人: Tetsuo Fujii

    发明人: Tetsuo Fujii

    IPC分类号: H01L2100

    摘要: A single crystal silicon substrate (1) is bonded through an SiO2 film (9) to a single crystal silicon substrate (8), and the single crystal silicon substrate (1) is made into a thin film. A cantilever (13) is formed on the single crystal silicon substrate (1), and the thickness of the cantilever (13) in a direction parallel to the surface of the single crystal silicon substrate (1) is made smaller, than the thickness of the cantilever in the direction of the depth of the single crystal silicon substrate (1), and movable in a direction parallel to the substrate surface. In addition, the surface of the cantilever (13) and the part of the single crystal silicon substrate (1), opposing the cantilever (13), are, respectively, coated with an SiO2 film (5), so that an electrode short circuit is prevented in a capacity-type sensor. In addition, a signal-processing circuit (10) is formed on the single crystal silicon substrate (1), so that signal processing is performed as the cantilever (13) moves.

    摘要翻译: 单晶硅基板(1)通过SiO 2膜(9)与单晶硅基板(8)接合,将单晶硅基板(1)制成薄膜。 在单晶硅基板(1)上形成有悬臂(13),并且使悬臂(13)的与单晶硅基板(1)的表面平行的方向的厚度比 所述悬臂在所述单晶硅基板(1)的深度方向上移动,并且能够在平行于所述基板表面的方向上移动。 此外,悬臂(13)的表面和单晶硅衬底(1)的与悬臂(13)相对的部分分别涂覆有SiO 2膜(5),使得电极短路 在容量型传感器中被阻止。 此外,在单晶硅衬底(1)上形成信号处理电路(10),从而当悬臂(13)移动时进行信号处理。

    Process for producing a semiconductor device
    66.
    发明授权
    Process for producing a semiconductor device 失效
    半导体装置的制造方法

    公开(公告)号:US5474952A

    公开(公告)日:1995-12-12

    申请号:US345821

    申请日:1994-11-21

    申请人: Tetsuo Fujii

    发明人: Tetsuo Fujii

    摘要: A process for producing a semiconductor service of the type having a semiconductor substrate; a semiconductor layer disposed on the semiconductor substrate; a first element formed in a region of the semiconductor layer and having a perimeter including a bottom; a second element formed in another region of the semiconductor layer; an insulating layer surrounding the perimeter of the first element, for electrically insulating and separating the first element from the second element and the semiconductor substrate; an electrical shield layer disposed between the insulating layer and the first element, surrounding the perimeter of the first element, and adapted to a reference electric potential applied thereto, for shielding the first element from an electrical fluctuation of the semiconductor substrate caused by the second element; and an electrode for applying the reference electric potential to the electrical shield layer.

    摘要翻译: 一种具有半导体衬底的半导体业务的制造方法; 设置在所述半导体衬底上的半导体层; 形成在所述半导体层的区域中并且具有包括底部的周边的第一元件; 形成在所述半导体层的另一区域中的第二元件; 围绕所述第一元件的周边的绝缘层,用于将所述第一元件与所述第二元件和所述半导体基板电绝缘和分离; 电屏蔽层,设置在所述绝缘层和所述第一元件之间,围绕所述第一元件的周边,并且适于施加到其上的参考电位,用于屏蔽所述第一元件免受所述第二元件引起的所述半导体衬底的电波动 ; 以及用于将参考电位施加到电气屏蔽层的电极。

    Semiconductor pressure sensor and method of manufacturing same
    67.
    再颁专利
    Semiconductor pressure sensor and method of manufacturing same 失效
    半导体压力传感器及其制造方法

    公开(公告)号:USRE34893E

    公开(公告)日:1995-04-04

    申请号:US35248

    申请日:1993-03-22

    摘要: A semiconductor pressure sensor of this invention is intended to provide a semiconductor pressure sensor having an excellent electrical isolation between the supporting means of the semiconductor pressure sensor and the semiconductor substrate, the semiconductor pressure sensor basically comprising a semiconductor substrate having a first semiconductor region in which at least a semiconductor device is formed, a second semiconductor region and an isolated layer buried between the first and second semiconductor regions, a cavity provided in the second semiconductor region, the opening thereof existing on the main surface of the second semiconductor region and a strain detecting portion consisting of the semiconductor device and provided in the first semiconductor region opposite to the cavity. The semiconductor pressure sensor is featured in that at least one of the outer peripheral side surfaces of the first and the second semiconductor regions is formed inside of the outermost peripheral side surface of the isolation layer.

    摘要翻译: 本发明的半导体压力传感器旨在提供一种半导体压力传感器,其具有在半导体压力传感器的支撑装置和半导体衬底之间具有优异的电绝缘性,半导体压力传感器基本上包括具有第一半导体区域的半导体衬底, 形成至少一个半导体器件,第二半导体区域和埋在第一和第二半导体区域之间的隔离层,设置在第二半导体区域中的空腔,存在于第二半导体区域的主表面上的开口和应变 检测部分由半导体器件组成并设置在与空腔相对的第一半导体区域中。 半导体压力传感器的特征在于,第一半导体区域和第二半导体区域的至少一个外周侧表面形成在隔离层的最外周侧表面的内部。

    Semiconductor device which includes multiple isolated semiconductor
segments on one chip
    68.
    发明授权
    Semiconductor device which includes multiple isolated semiconductor segments on one chip 失效
    在一个芯片上包括多个隔离半导体段的半导体器件

    公开(公告)号:US5138422A

    公开(公告)日:1992-08-11

    申请号:US790025

    申请日:1991-11-06

    摘要: Disclosed is a semiconductor device which comprises a substrate, an insulating film formed at a predetermined region in the substrate or on the main surface of the substrate, a polycrystalline semiconductor layer formed on at least the insulating film, a single crystal semiconductor layer formed on at least the polycrystalline semiconductor layer, an isolation region formed to extend from the top main surface of the single crystal semiconductor layer to at least the surface of the insulating film, through the polycrystalline semiconductor layer, to electrically isolate a portion formed in the single crystal semiconductor layer surrounded by the isolation region from another portion formed in the single crystal semiconductor layer and not surrounded by the isolation region, at least a semiconductor device formed within the portion surrounded by the isolation region. This semiconductor device has an additional characteristic in that another semiconductor device using another main surface of the substrate as the electrode is provided on the surface of the substrate and the single crystal semiconductor layer, and the plolycrystalline semiconductor layer serves to terminate the electric line of force emitted from the substrate, and therefore, the single crystal semiconductor layer mounted on the polycrystalline semiconductor layer is not affected by the electric line of force. Consequently, a semiconductor device which can operate effectively without being influenced by variations of the electric potential in the substrate can be obtained, and further, an intelligent type power device can be formed in which the power semiconductor device and the semiconductor device controlling the power device are formed in the same substrate but are completely isolated from each other.

    摘要翻译: 公开了一种半导体器件,其包括基板,形成在基板中或基板的主表面上的预定区域处的绝缘膜,形成在至少绝缘膜上的多晶半导体层,形成在基板上的单晶半导体层 至少多晶半导体层,通过多晶半导体层形成为从单晶半导体层的顶部主表面延伸到至少绝缘膜的表面的隔离区,以将形成在单晶半导体中的部分电隔离 所述隔离区域与形成在所述单晶半导体层中的不被所述隔离区域包围的另一部分包围的至少一个半导体器件形成在由所述隔离区域包围的部分内。 该半导体器件具有另外的特征,即在衬底和单晶半导体层的表面上设置另一个使用衬底的另一个主表面作为电极的半导体器件,并且该结晶半导体层用于终止电力线 从衬底发出的,因此,安装在多晶半导体层上的单晶半导体层不受电力线的影响。 因此,可以获得能够有效地工作而不受基板中电位变化的影响的半导体器件,并且还可以形成智能型功率器件,其中功率半导体器件和控制功率器件的半导体器件 形成在相同的基板中,但彼此完全隔离。

    Semiconductor pressure sensor and method of manufacturing same
    69.
    发明授权
    Semiconductor pressure sensor and method of manufacturing same 失效
    半导体压力传感器及其制造方法

    公开(公告)号:US5095349A

    公开(公告)日:1992-03-10

    申请号:US363526

    申请日:1989-06-07

    IPC分类号: G01L9/00 H01L27/20

    摘要: A semiconductor pressure sensor of this invention is intended to provide a semiconductor pressure sensor having an excellent electrical isolation between the supporting means of the semiconductor pressure sensor and the semiconductor substrate, the semiconductor pressure sensor basically comprising a semiconductor substrate having a first semiconductor region in which at least a semiconductor device is formed, a second semiconductor region and an isolated layer buried between the first and second semiconductor regions, a cavity provided in the second semiconductor region, the opening thereof existing on the main surface of the second semiconductor region and a strain detecting portion consisting of the semiconductor device and provided in the first semiconductor region opposite to the cavity. The semiconductor pressure sensor is featured in that at least one of the outer peripheral side surfaces of the first and the second semiconductor regions is formed inside of the outermost peripheral side surface of the isolation layer.

    摘要翻译: 本发明的半导体压力传感器旨在提供一种半导体压力传感器,其具有在半导体压力传感器的支撑装置和半导体衬底之间具有优异的电绝缘性,半导体压力传感器基本上包括具有第一半导体区域的半导体衬底, 形成至少一个半导体器件,第二半导体区域和埋在第一和第二半导体区域之间的隔离层,设置在第二半导体区域中的空腔,存在于第二半导体区域的主表面上的开口和应变 检测部分由半导体器件组成并设置在与空腔相对的第一半导体区域中。 半导体压力传感器的特征在于,第一半导体区域和第二半导体区域的至少一个外周侧表面形成在隔离层的最外周侧表面的内部。

    Epitaxial growth method of a zinc oxide based semiconductor layer, epitaxial crystal structure, epitaxial crystal growth apparatus, and semiconductor device
    70.
    发明授权
    Epitaxial growth method of a zinc oxide based semiconductor layer, epitaxial crystal structure, epitaxial crystal growth apparatus, and semiconductor device 有权
    氧化锌基半导体层的外延生长方法,外延晶体结构,外延晶体生长装置和半导体器件

    公开(公告)号:US08822263B2

    公开(公告)日:2014-09-02

    申请号:US12493765

    申请日:2009-06-29

    IPC分类号: H04L21/00

    摘要: It is provided a hetero epitaxial growth method, a hetero epitaxial crystal structure, a hetero epitaxial growth apparatus and a semiconductor device, the method includes forming a buffer layer formed with the orienting film of an oxide, or the orienting film of nitride on a heterogeneous substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the buffer layer using a halogenated group II metal and an oxygen material. It is provided a homo epitaxial growth method, a homo epitaxial crystal structure, a homo epitaxial growth apparatus and a semiconductor device, the homo epitaxial growth method includes introducing reactant gas mixing zinc containing gas and oxygen containing gas on a zinc oxide substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the zinc oxide substrate.

    摘要翻译: 提供了异质外延生长方法,异质外延晶体结构,异质外延生长装置和半导体器件,该方法包括形成由氧化物的取向膜形成的缓冲层或在异质外延生长方法上的氮化物取向膜 基质; 并且使用卤化II族金属和氧材料在缓冲层上进行氧化锌基半导体层的晶体生长。 提供同质外延生长方法,同质外延晶体结构,同质外延生长装置和半导体器件,同质外延生长方法包括将含有锌的气体和含氧气体的反应气体引入到氧化锌衬底上; 并且在氧化锌衬底上进行氧化锌基半导体层的晶体生长。