公开(公告)号：US20220246810A1

公开(公告)日：2022-08-04

申请号：US17209110

申请日：2021-03-22

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Chi-Hai Kuo ,  Kai-Ming Yang

IPC: H01L33/62 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L33/54

Abstract: A manufacturing method of a package structure is provided, which includes the following steps. A carrier having a surface is provided. A copper foil layer is laminated on the surface of the carrier. A subtractive process is performed on the copper foil layer to form a copper foil circuit layer on the carrier. The copper foil circuit layer exposes a part of the surface of the carrier. A build-up structure layer is formed on the copper foil circuit layer and the surface of the carrier. A first surface of the copper foil circuit layer is aligned with a second surface of the build-up structure layer. At least one electronic component is disposed on the build-up structure layer. A package colloid is formed to cover the electronic component and the build-up structure layer. The carrier is removed to expose the first surface of the copper foil circuit layer.

公开(公告)号：US10854803B2

公开(公告)日：2020-12-01

申请号：US16842716

申请日：2020-04-07

Applicant: Unimicron Technology Corp.

Inventor： Pei-Wei Wang ,  Cheng-Ta Ko ,  Yu-Hua Chen ,  De-Shiang Liu ,  Tzyy-Jang Tseng

IPC: H01L33/62

Abstract: A manufacturing method of a light emitting device package structure is provided. The method includes following operations: (i) providing a circuit redistribution structure; (ii) providing a first substrate; (iii) forming a circuit layer structure over the first substrate, wherein the circuit layer structure includes a first circuit layer; (iv) before or after operation (iii), placing a light emitting device between the first substrate and the circuit layer structure or over the circuit layer structure, wherein the light emitting device is electrically connected with the first circuit layer; and (v) placing the circuit redistribution structure over the light emitting device, wherein the circuit redistribution structure includes a first redistribution layer, a second redistribution layer, and a chip, and the first redistribution layer includes a second circuit layer and a conductive contact that contacts the second circuit layer.

公开(公告)号：US10651358B2

公开(公告)日：2020-05-12

申请号：US16140563

申请日：2018-09-25

Applicant: Unimicron Technology Corp.

Inventor： Pei-Wei Wang ,  Cheng-Ta Ko ,  Yu-Hua Chen ,  De-Shiang Liu ,  Tzyy-Jang Tseng

IPC: H01L33/62

Abstract: A light emitting device package structure includes a substrate, a circuit layer structure, a light emitting device, a first redistribution layer, a conductive connector, a second redistribution layer, and a chip. The circuit layer structure is disposed over the substrate, and the circuit layer structure includes a first circuit layer. The light emitting device is disposed over the circuit layer structure and is electrically connected with the first circuit layer. The first redistribution layer is disposed over the light emitting device and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connector connects the first circuit layer and the second circuit layer. The second redistribution layer is disposed over the first redistribution layer and includes a third circuit layer contacting the conductive contact. The chip is disposed over the second redistribution layer and is electrically connected with the third circuit layer.

公开(公告)号：US10588214B2

公开(公告)日：2020-03-10

申请号：US16543609

申请日：2019-08-18

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Kai-Ming Yang ,  Pu-Ju Lin ,  Cheng-Ta Ko ,  Yu-Hua Chen

IPC: H05K1/02 ,  H05K1/11

Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.

公开(公告)号：US20200043890A1

公开(公告)日：2020-02-06

申请号：US16152424

申请日：2018-10-05

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Cheng-Ta Ko ,  Kai-Ming Yang ,  Yu-Hua Chen

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48

Abstract: A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package structure is also provided.

公开(公告)号：US09913418B2

公开(公告)日：2018-03-06

申请号：US15152564

申请日：2016-05-12

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Wei-Ming Cheng

IPC: H05K13/04 ,  H05K1/11 ,  H05K1/18 ,  H05K3/28

CPC classification number: H05K13/04 ,  H05K1/11 ,  H05K1/114 ,  H05K1/183 ,  H05K1/184 ,  H05K1/186 ,  H05K3/284 ,  H05K2201/09072 ,  H05K2201/10083 ,  H05K2201/10121 ,  H05K2201/10151

Abstract: A wiring board is provided, wherein electrical function of the wiring board is normal, the wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer, the opening penetrates the wiring board and connects the front side and the reverse side, and the interconnection layer is located on the front side and extends toward the opening. A component is bonded to the wiring board, wherein electrical function of the component is normal, the component has an active surface, a back surface opposite to the active surface, and a working area located on the active surface, the active surface is bonded to the interconnection layer, the component is located in the opening, and the active surface and the front side of the wiring board face in a same direction. An encapsulant is filled into the opening, so as to cover the component and expose the working area.

公开(公告)号：US09831103B2

公开(公告)日：2017-11-28

申请号：US14995207

申请日：2016-01-14

Applicant: Unimicron Technology Corp.

Inventor： Dyi-Chung Hu ,  Ming-Chih Chen ,  Tzyy-Jang Tseng

IPC: H01L21/48 ,  C25D7/12 ,  C25D5/48 ,  C25D5/34 ,  C25D5/02 ,  H05K1/11 ,  H05K3/46 ,  C25D1/00 ,  H05K3/10 ,  H05K3/42

CPC classification number: H01L21/4857 ,  C25D1/003 ,  C25D5/022 ,  C25D5/34 ,  C25D5/48 ,  C25D7/12 ,  H05K1/113 ,  H05K3/10 ,  H05K3/424 ,  H05K3/4647 ,  H05K3/4682 ,  H05K2201/10378 ,  H05K2203/0152 ,  H05K2203/0733 ,  Y10T29/49155

Abstract: A manufacturing method of an interposed substrate is provided. A metal-stacked layer comprising a first metal layer, an etching stop layer and a second metal layer is formed. A patterned conductor layer is formed on the first metal layer, wherein the patterned conductor layer exposes a portion of the first metal layer. A plurality of conductive pillars is formed on the patterned conductor layer, wherein the conductive pillars are separated from each other and stacked on a portion of the patterned conductor layer. An insulating material layer is formed on the metal-stacked layer, wherein the insulating material layer covers the portion of the first metal layer and encapsulates the conductive pillars and the other portion of the patterned conductor layer. The metal-stacked layer is removed to expose a lower surface opposite to an upper surface of the insulating material layer and a bottom surface of the patterned conductor layer.

公开(公告)号：US20170110393A1

公开(公告)日：2017-04-20

申请号：US15391861

申请日：2016-12-28

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min Tain ,  Kai-Ming Yang ,  Wang-Hsiang Tsai ,  Tzyy-Jang Tseng

IPC: H01L23/498 ,  H01L21/683 ,  H01L21/48

CPC classification number: H01L23/49827 ,  H01L21/4846 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/4673 ,  H05K3/4682 ,  H05K3/4694 ,  H05K2201/10674 ,  Y10T29/49165 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A circuit board includes a composite layer of a non-conductor inorganic material and an organic material, a plurality of conductive structures, a first built-up structure, and a second built-up structure. The composite layer of the non-conductor inorganic material and the organic material has a first surface and a second surface opposite to each other and a plurality of openings. The conductive structures are respectively disposed in the openings of the composite layer of the non-conductor inorganic material and the organic material. The first built-up structure is disposed on the first surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures. The second built-up structure is disposed on the second surface of the composite layer of the non-conductor inorganic material and the organic material and electrically connected to the conductive structures.

公开(公告)号：US20160255751A1

公开(公告)日：2016-09-01

申请号：US15152564

申请日：2016-05-12

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Wei-Ming Cheng

IPC: H05K13/04 ,  H05K1/18 ,  H05K1/11 ,  H05K3/28

CPC classification number: H05K13/04 ,  H05K1/11 ,  H05K1/114 ,  H05K1/183 ,  H05K1/184 ,  H05K1/186 ,  H05K3/284 ,  H05K2201/09072 ,  H05K2201/10083 ,  H05K2201/10121 ,  H05K2201/10151

Abstract: A wiring board is provided, wherein electrical function of the wiring board is normal, the wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer, the opening penetrates the wiring board and connects the front side and the reverse side, and the interconnection layer is located on the front side and extends toward the opening. A component is bonded to the wiring board, wherein electrical function of the component is normal, the component has an active surface, a back surface opposite to the active surface, and a working area located on the active surface, the active surface is bonded to the interconnection layer, the component is located in the opening, and the active surface and the front side of the wiring board face in a same direction. An encapsulant is filled into the opening, so as to cover the component and expose the working area.

Abstract translation: 提供一种布线板，其中布线板的电气功能正常，布线板具有正面，与正面相反的背面，开口和互连层，开口穿透布线板并连接前面 侧面和背面，并且互连层位于前侧并且朝向开口延伸。 部件被接合到布线板上，其中部件的电功能是正常的，部件具有活性表面，与有效表面相对的后表面以及位于活性表面上的工作区域，活性表面被粘合到 互连层，部件位于开口中，并且布线板的有源面和正面朝向相同的方向。 将密封剂填充到开口中，以覆盖部件并暴露工作区域。

公开(公告)号：US20160007472A1

公开(公告)日：2016-01-07

申请号：US14855404

申请日：2015-09-16

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Shu-Sheng Chiang ,  Tsung-Yuan Chen ,  Shih-Lian Cheng

IPC: H05K3/00 ,  H05K3/42 ,  H05K3/06 ,  H05K3/30

CPC classification number: H05K3/007 ,  H01L23/5389 ,  H01L24/19 ,  H01L2924/12042 ,  H05K1/18 ,  H05K1/183 ,  H05K1/185 ,  H05K3/0011 ,  H05K3/06 ,  H05K3/30 ,  H05K3/423 ,  H05K3/465 ,  H05K2203/0723 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

Abstract: A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is foamed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed.

Abstract translation: 提供了包括以下步骤的电气设备的包装方法。 提供了包括基板和第一导电图案的电路板。 具有电极的电气装置设置在电路板上。 电介质层形成在电路板上以覆盖电气设备，电极和第一导电图案，其中第一凹陷图案通过第一导电图案在介电层中发泡。 图案化电介质层以形成与通孔连接并暴露电极的通孔和第二凹陷图案。 导电材料填充在通孔和第二凹陷图案中以在通孔中形成导电通孔，并且在第二凹陷图案中填充第二导电图案。 去除衬底。