公开(公告)号：US20110186948A1

公开(公告)日：2011-08-04

申请号：US13055475

申请日：2009-07-21

申请人： Pascal Pochet ,  Emmanuel Arras

发明人： Pascal Pochet ,  Emmanuel Arras

IPC分类号： H01L29/82 ,  H01F1/40 ,  B32B15/04 ,  B32B15/01 ,  C30B23/02 ,  H01F1/04

CPC分类号： H01F10/193 ,  G11C11/14 ,  H01F1/401 ,  H01F1/405 ,  H01F41/20 ,  H01L43/10 ,  Y10T428/12465

摘要： Magnetic material based on at least one magnetic 3d transition metal element and at least one Group IVA semiconductor element, this material being homogeneous and having a Curie temperature (Tc) of 350 K or higher. Method for the production and uses thereof, especially in spintronics.

摘要翻译： 基于至少一个磁性3d过渡金属元素和至少一种IVA族半导体元件的磁性材料，该材料是均匀的并且具有350K或更高的居里温度（Tc）。 生产和使用方法，特别是自旋电子学。

公开(公告)号：US07851841B2

公开(公告)日：2010-12-14

申请号：US11760382

申请日：2007-06-08

申请人： Xiangfeng Duan ,  Chunming Niu ,  Stephen A. Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David P. Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

发明人： Xiangfeng Duan ,  Chunming Niu ,  Stephen A. Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David P. Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01F1/405 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L31/035281 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/781 ,  Y10S977/789 ,  Y10S977/938

摘要： A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

摘要翻译： 描述了具有多个半导体器件的电子基片的方法和装置。 在衬底上形成纳米线薄膜。 纳米线的薄膜形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域处形成触点，从而提供与多个半导体器件的电连接。 此外，用于制造纳米线的各种材料，包括p掺杂纳米线和n掺杂纳米线的薄膜，纳米线异质结构，发光纳米线异质结构，用于在衬底上定位纳米线的流动掩模，用于沉积纳米线的纳米线喷涂技术，用于减少或消除声子的技术 描述了纳米线中的电子散射，以及用于降低纳米线中的表面状态的技术。

公开(公告)号：US20100200899A1

公开(公告)日：2010-08-12

申请号：US12700767

申请日：2010-02-05

申请人： Takao MARUKAME ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Hideyuki Sugiyama ,  Yoshiaki Saito

发明人： Takao MARUKAME ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Hideyuki Sugiyama ,  Yoshiaki Saito

IPC分类号： H01L29/82 ,  H01L21/336

CPC分类号： H01L29/66984 ,  B82Y25/00 ,  B82Y40/00 ,  H01F1/405 ,  H01F10/1936 ,  H01F10/3254 ,  H01F41/307 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/22 ,  H01L29/47

摘要： A spin transistor includes a source electrode, a drain electrode, and a gate electrode on a semiconductor substrate. At least one of the source electrode and the drain electrode includes a semiconductor region and a magnetic layer. The semiconductor region is formed in the semiconductor substrate. The magnetic layer is formed on the semiconductor region, and contains a crystalline Heusler alloy containing at least one of cobalt (Co) and iron (Fe). The semiconductor region and the magnetic layer contain the same impurity element.

摘要翻译： 自旋晶体管包括在半导体衬底上的源电极，漏电极和栅电极。 源电极和漏电极中的至少一个包括半导体区域和磁性层。 半导体区域形成在半导体衬底中。 磁性层形成在半导体区域上，并含有包含钴（Co）和铁（Fe）中的至少一种的结晶Heusler合金。 半导体区域和磁性层含有相同的杂质元素。

公开(公告)号：US20100155696A1

公开(公告)日：2010-06-24

申请号：US11681058

申请日：2007-03-01

申请人： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

发明人： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

IPC分类号： H01L29/66 ,  H01L21/20

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01F1/405 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L31/035281 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/781 ,  Y10S977/789 ,  Y10S977/938

摘要： A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

摘要翻译： 描述了具有多个半导体器件的电子基片的方法和装置。 在衬底上形成纳米线薄膜。 纳米线的薄膜形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域处形成触点，从而提供与多个半导体器件的电连接。 此外，用于制造纳米线的各种材料，包括p掺杂纳米线和n掺杂纳米线的薄膜，纳米线异质结构，发光纳米线异质结构，用于在衬底上定位纳米线的流动掩模，用于沉积纳米线的纳米线喷涂技术，用于减少或消除声子的技术 描述了纳米线中的电子散射，以及用于降低纳米线中的表面状态的技术。

公开(公告)号：US07714400B2

公开(公告)日：2010-05-11

申请号：US11979346

申请日：2007-11-01

申请人： Satoshi Sugahara ,  Masaaki Tanaka

发明人： Satoshi Sugahara ,  Masaaki Tanaka

IPC分类号： H01L29/70

CPC分类号： H01F10/3254 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/16 ,  H01F1/405 ,  H01F10/193 ,  H01L27/228 ,  H01L29/66984

摘要： A MISFET the channel region of which is a ferromagnetic semi-conductor has a feature that the drain current can be controlled by the gate voltage and a feature that the transfer conductance can be controlled by the relative directions of magnetization in the ferromagnetic channel region and the ferromagnetic source (or the ferromagnetic drain, or both the ferromagnetic source and ferromagnetic drain). As a result, binary information can be stored in the form of the relative magnetization directions, and the relative magnetization directions are electrically detected. If the magnetism is controlled by the electric field effect of the channel region of a ferromagnetic semiconductor, the current needed to rewrite the information can be greatly reduced. Thus, the MISFET can constitute a high-performance non-volatile memory cell suited to high-density integration.

摘要翻译： 其沟道区域是铁磁半导体的MISFET具有能够通过栅极电压来控制漏极电流的特征，并且可以通过铁磁通道区域中的相对磁化方向和 铁磁源（或铁磁性漏极，或铁磁源和铁磁性漏极）。 结果，可以以相对磁化方向的形式存储二进制信息，并且电检测相对磁化方向。 如果磁性由铁磁半导体的沟道区域的电场效应控制，则可以大大减少重写信息所需的电流。 因此，MISFET可以构成适合于高密度集成的高性能非易失性存储单元。

公开(公告)号：US07625767B2

公开(公告)日：2009-12-01

申请号：US11687430

申请日：2007-03-16

申请人： Xiangyang Huang ,  Samed Halilov ,  Jean Augustin Chan Sow Fook Yiptong ,  Ilija Dukovski ,  Marek Hytha ,  Robert J. Mears

发明人： Xiangyang Huang ,  Samed Halilov ,  Jean Augustin Chan Sow Fook Yiptong ,  Ilija Dukovski ,  Marek Hytha ,  Robert J. Mears

IPC分类号： H01L21/00

CPC分类号： B82Y10/00 ,  B82Y25/00 ,  B82Y40/00 ,  H01F1/401 ,  H01F1/405 ,  H01F10/3213 ,  H01F10/3268 ,  H01F41/301 ,  H01L29/1054 ,  H01L29/15 ,  H01L29/66984

摘要： A method is for making a spintronic device and may include forming at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.

摘要翻译： 一种制造自旋电子器件的方法可包括形成至少一个超晶格和至少一个耦合到其上的电触点，所述至少一个超晶格包括多组层。 每组层可以包括多个层叠的基底半导体单层，其限定具有晶格的基底半导体部分，约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层，以及自旋电子掺杂剂。 所述自旋电子掺杂剂可以通过所述至少一个非半导体单层约束在所述基底半导体部分的晶格内。 在一些实施例中，可能不需要超晶格的重复结构。

公开(公告)号：US20090278182A1

公开(公告)日：2009-11-12

申请号：US12307739

申请日：2007-06-22

申请人： Ya-Hong Xie

发明人： Ya-Hong Xie

IPC分类号： H01L29/82

CPC分类号： H01L29/0895 ,  B82Y25/00 ,  H01F1/009 ,  H01F1/405 ,  H01L29/66984 ,  H01L29/78

摘要： A spin injector for use in a microelectronic device such as a field effect transistor (FET) is disclosed. The spin injector includes an array of ferromagnetic elements disposed within a semiconductor. The ferromagnetic elements within the array are arranged and spaced with respect to one another in a close arrangement such that electrons or holes are spin-polarized when passing through. The spin injector may be located above or at least partially within a source region of the FET. A spin injector structure may also be located above or at least partially within the drain region of the FET. The spin injector includes a semiconductor material containing an array of ferromagnetic elements disposed in the semiconductor material, wherein adjacent ferromagnetic elements within the array are separated by a distance within the range between about 1 nm and 100 nm.

摘要翻译： 公开了一种用于诸如场效应晶体管（FET）的微电子器件的自旋注入器。 旋转喷射器包括设置在半导体内的铁磁元件阵列。 阵列内的铁磁元件以紧密的布置相对于彼此布置和间隔开，使得电子或空穴在穿过时自旋极化。 自旋注入器可以位于FET的源极区域之上或至少部分位于FET的源极区域内。 自旋注入器结构也可以位于FET的漏极区域的上方或至少部分地位于FET的漏极区域内。 旋转喷射器包括含有设置在半导体材料中的铁磁元件阵列的半导体材料，其中阵列内的相邻铁磁元件在约1nm和100nm之间的范围内分开一段距离。

公开(公告)号：US20080260941A1

公开(公告)日：2008-10-23

申请号：US11814338

申请日：2006-01-23

申请人： Sungho Jin

发明人： Sungho Jin

IPC分类号： B05D5/12 ,  B05D3/02

CPC分类号： B82Y25/00 ,  B01J23/40 ,  B01J35/0013 ,  B01J37/0009 ,  B82Y10/00 ,  B82Y30/00 ,  G06N99/002 ,  G11B5/855 ,  H01F1/009 ,  H01F1/405 ,  Y10S977/849 ,  Y10S977/855 ,  Y10S977/858

摘要： A long range, periodically ordered array of discrete nano-features (10), such as nano-islands, nano-particles, nano-wires, non-tubes, nano-pores, nano-composition-variations, and nano-device-components, are fabricated by propagation of a self-assembling array or nucleation and growth of periodically aligned nano-features. The propagation may be induced by a laterally or circularly moving heat source, a stationary heat source arranged at an edge of the material to be patterned (12), or a series of sequentially activated heaters or electrodes. Advantageously, the long-range periodic array of nano-features (10) may be utilized as a nano-mask or nano-implant master pattern for nano-fabrication of other nano-structures. In addition, the inventive long-range, periodically ordered arrays of nano-features are useful in a variety of nanoscale applications such as addressable memories or logic devices, ultra-high-density magnetic recording media, magnetic sensors, photonic devices, quantum computing devices, quantum luminescent devices, and efficient catalytic devices.

摘要翻译： 长距离定期排列的离散纳米特征（10）阵列，如纳米岛，纳米粒子，纳米线，非管，纳米孔，纳米组成变化和纳米器件组件 ，通过自组装阵列的传播或周期性排列的纳米特征的成核和生长来制造。 传播可以由横向或循环移动的热源，布置在待图案化材料（12）的边缘处的固定热源或一系列顺序活化的加热器或电极引起。 有利地，纳米特征（10）的远距离周期性阵列可以用作纳米掩模或纳米植入物主模式，用于纳米制造其他纳米结构。 此外，本发明的长距离定期排列的纳米特征阵列可用于各种纳米级应用，例如可寻址存储器或逻辑器件，超高密度磁记录介质，磁传感器，光子器件，量子计算设备 ，量子发光装置和有效的催化装置。

公开(公告)号：US20070056465A1

公开(公告)日：2007-03-15

申请号：US10547795

申请日：2004-03-03

申请人： Partha Dutta

发明人： Partha Dutta

IPC分类号： B32B1/00 ,  B32B15/02 ,  C09G1/02

CPC分类号： G11B5/712 ,  B22F1/0018 ,  B22F1/0088 ,  B22F9/16 ,  B22F2998/10 ,  B82Y25/00 ,  B82Y30/00 ,  C01B13/145 ,  C01B19/007 ,  C01B33/02 ,  C01B33/12 ,  C01P2004/52 ,  C01P2004/64 ,  C08K3/013 ,  C08K9/02 ,  C09D7/61 ,  C09D7/62 ,  C09D7/67 ,  C09D7/70 ,  C09D11/037 ,  C09D11/322 ,  C09G1/02 ,  C09K3/1463 ,  C30B7/00 ,  C30B29/16 ,  C30B29/605 ,  C30B33/00 ,  C30B33/005 ,  G11B5/82 ,  G11B11/007 ,  H01F1/0063 ,  H01F1/405 ,  Y10T428/25 ,  Y10T428/259 ,  Y10T428/2991 ,  Y10T428/2993 ,  B22F9/04

摘要： A plurality of nanoparticles are provided. The nanoparticles may have a metal oxide or a semiconductor oxide surface region and a metal or semiconductor core region and/or the nanoparticles may be uniformly doped. The nanoparticles are formed by grinding a bulk material to a powder and then etching the powder in a solution to a desired nanoparticle size.

摘要翻译： 提供多个纳米颗粒。 纳米颗粒可以具有金属氧化物或半导体氧化物表面区域，并且金属或半导体芯区域和/或纳米颗粒可以均匀掺杂。 通过将散装材料研磨成粉末，然后将溶液中的粉末蚀刻成所需的纳米颗粒尺寸，形成纳米颗粒。

公开(公告)号：US20060118839A1

公开(公告)日：2006-06-08

申请号：US10551802

申请日：2004-03-30

申请人： Satoshi Sugahara ,  Masaaki Tanaka

发明人： Satoshi Sugahara ,  Masaaki Tanaka

IPC分类号： H01L29/94

CPC分类号： H01F10/3254 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/16 ,  H01F1/405 ,  H01F10/193 ,  H01L27/228 ,  H01L29/66984

摘要： A MISFET the channel region of which is a ferromagnetic semi-conductor has a feature that the drain current can be controlled by the gate voltage and a feature that the transfer conductance can be controlled by the relative directions of magnetization in the ferromagnetic channel region and the ferromagnetic source (or the ferromagnetic drain, or both the ferromagnetic source and ferromagnetic drain). As a result, binary information can be stored in the form of the relative magnetization directions, and the relative magnetization directions are electrically detected. If the magnetism is controlled by the electric field effect of the channel region of a ferromagnetic semiconductor, the current needed to rewrite the information can be greatly reduced. Thus, the MISFET can constitute a high-performance non-volatile memory cell suited to high-density integration.

摘要翻译： 其沟道区域是铁磁半导体的MISFET具有能够通过栅极电压来控制漏极电流的特征，并且可以通过铁磁通道区域中的相对磁化方向和 铁磁源（或铁磁性漏极，或铁磁源和铁磁性漏极）。 结果，可以以相对磁化方向的形式存储二进制信息，并且电检测相对磁化方向。 如果磁性由铁磁半导体的沟道区域的电场效应控制，则可以大大减少重写信息所需的电流。 因此，MISFET可以构成适合于高密度集成的高性能非易失性存储单元。