公开(公告)号：US20170194467A1

公开(公告)日：2017-07-06

申请号：US15404955

申请日：2017-01-12

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Mohit BAJAJ ,  Suresh GUNDAPANENI ,  Aniruddha KONAR ,  Narasimha R. Mavilla ,  Kota V.R.M. MURALI ,  Edward J. NOWAK

IPC分类号： H01L29/66 ,  H01L29/205 ,  H01L29/161 ,  H01L29/08 ,  H01L29/24

CPC分类号： H01L29/41725 ,  H01L21/02414 ,  H01L21/02483 ,  H01L21/02565 ,  H01L21/02581 ,  H01L21/3115 ,  H01L21/8232 ,  H01L21/823418 ,  H01L29/0653 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/205 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66795 ,  H01L29/66977 ,  H01L29/7391 ,  H01L29/772 ,  H01L29/78 ,  H01L29/785 ,  H01L29/78681 ,  H01L29/7869 ,  H01L29/78693

摘要： The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO2 region.

公开(公告)号：US09613867B2

公开(公告)日：2017-04-04

申请号：US15084137

申请日：2016-03-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Mohit Bajaj ,  Suresh Gundapaneni ,  Aniruddha Konar ,  Narasimha R. Mavilla ,  Kota V. R. M. Murali ,  Edward J. Nowak

IPC分类号： H01L21/8234 ,  H01L21/3115 ,  H01L29/66 ,  H01L21/02 ,  H01L21/8232 ,  H01L29/786

CPC分类号： H01L29/41725 ,  H01L21/02414 ,  H01L21/02483 ,  H01L21/02565 ,  H01L21/02581 ,  H01L21/3115 ,  H01L21/8232 ,  H01L21/823418 ,  H01L29/0653 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/205 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66795 ,  H01L29/66977 ,  H01L29/7391 ,  H01L29/772 ,  H01L29/78 ,  H01L29/785 ,  H01L29/78681 ,  H01L29/7869 ,  H01L29/78693

摘要： The present disclosure relates to semiconductor structures and, more particularly, to a symmetric tunnel field effect transistor and methods of manufacture. The structure includes a gate structure including a source region and a drain region both of which comprise a doped VO2 region.

公开(公告)号：US09520527B1

公开(公告)日：2016-12-13

申请号：US15050655

申请日：2016-02-23

申请人： TAMURA CORPORATION ,  RIKEN

发明人： Yoshikatsu Morishima ,  Hideki Hirayama

IPC分类号： H01L29/66 ,  H01L21/336 ,  H01L31/18 ,  H01L31/0304

CPC分类号： H01L33/32 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262 ,  H01L31/03048 ,  H01L31/1848 ,  H01L33/12 ,  H01L2924/10344 ,  H01L2924/10356

摘要： A nitride semiconductor template includes a Ga2O3 substrate, a buffer layer that includes as a main component AlN and is formed on the Ga2O3 substrate, a first nitride semiconductor layer that includes as a main component AlxGa1-xN (0.2

摘要翻译： 氮化物半导体模板包括Ga 2 O 3衬底，包括作为主要组分AlN并形成在Ga 2 O 3衬底上的缓冲层，第一氮化物半导体层，其包含作为主要成分Al x Ga 1-x N（0.2

公开(公告)号：US20160315179A1

公开(公告)日：2016-10-27

申请号：US15084765

申请日：2016-03-30

申请人： FUJITSU LIMITED

发明人： Masato Nishimori ,  Tadahiro Imada ,  LEI ZHU

IPC分类号： H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/15 ,  H02M7/5387 ,  H01L29/66 ,  H01L21/02 ,  H03F3/21 ,  H02M1/08 ,  H01L29/207 ,  H01L29/36

CPC分类号： H03F3/21 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02414 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66462 ,  H01L29/7787 ,  H03F1/3205 ,  H03F1/3247 ,  H03F3/245

摘要： A compound semiconductor device includes: a substrate; a nucleation layer over the substrate; a first buffer layer over the nucleation layer; a second buffer layer between the nucleation layer and the first buffer layer, the second buffer layer containing an acceptor impurity element or a donor impurity element at a higher concentration than the first buffer layer; a carrier transit layer in contact with the first buffer layer; a carrier supply layer over the carrier transit layer; and a gate electrode, a source electrode, and a drain electrode above the carrier supply layer.

摘要翻译： 一种化合物半导体器件，包括：衬底; 基底上的成核层; 成核层上的第一缓冲层; 在所述成核层和所述第一缓冲层之间的第二缓冲层，所述第二缓冲层含有比所述第一缓冲层更高浓度的受主杂质元素或施主杂质元素; 与第一缓冲层接触的载流子迁移层; 载体运输层上的载体供应层; 以及在载体供给层上方的栅电极，源电极和漏电极。

公开(公告)号：US09217903B2

公开(公告)日：2015-12-22

申请号：US12972750

申请日：2010-12-20

申请人： Jun Koyama

发明人： Jun Koyama

IPC分类号： H01L27/15 ,  G02F1/1362 ,  H01L21/02 ,  H01L29/36 ,  G02F1/136

CPC分类号： G02F1/136286 ,  G02F2001/13606 ,  H01L21/02414 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631

摘要： To provide a display device which can realize multi-gray scale display by reducing voltage fluctuation of a pixel, a display device includes a plurality of source signal lines, a plurality of gate signal lines which is provided so as to intersect with the source signal lines, and a pixel electrode to which a signal voltage of the source signal line is applied through a transistor including an oxide semiconductor, which is provided near an intersection portion of the source signal line and the gate signal line; in which in the pixel electrode which is provided between a pair of the adjacent source signal lines, edge portions thereof overlap with edge portions of the source signal lines and an overlapped area with one of the source signal lines is substantially equal to an overlapped area with the other source signal line.

摘要翻译： 为了提供一种能够通过减少像素的电压波动来实现多灰度显示的显示装置，显示装置包括多条源极信号线，多条栅极信号线被设置为与源极信号线 以及像素电极，通过包括氧化物半导体的晶体管施加源极信号线的信号电压，所述晶体管设置在所述源极信号线和所述栅极信号线的交叉部附近; 其中，在设置在一对相邻源极信号线之间的像素电极中，其边缘部分与源极信号线的边缘部分重叠，并且与源极信号线之一的重叠区域基本上等于与 其他源信号线。

公开(公告)号：US20150171027A1

公开(公告)日：2015-06-18

申请号：US14466992

申请日：2014-08-23

申请人： Invensas Corporation

发明人： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

IPC分类号： H01L23/00 ,  H01L27/02

CPC分类号： H01L23/562 ,  H01L21/02002 ,  H01L21/02035 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02414 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0207 ,  H01L33/005 ,  H01L33/0062 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00

摘要： High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

摘要翻译： 高产量基板组件。 根据第一方法实施例，将多个搭载基板附接到载体基板。 多个搭载基板的边缘彼此接合。 将多个搭载基板从载体基板上移除以形成基板组件。 处理衬底组件以在衬底组件上产生多个集成电路器件。 处理可以使用设计成处理大于多个背负式基板的单独实例的晶片的制造设备。

公开(公告)号：US08941105B2

公开(公告)日：2015-01-27

申请号：US11886918

申请日：2006-03-23

申请人： Ken Nakahara

发明人： Ken Nakahara

IPC分类号： H01L29/10 ,  H01S5/327 ,  H01L33/28 ,  H01L21/02 ,  H01L33/16 ,  H01S5/042 ,  H01S5/22 ,  H01S5/223

CPC分类号： H01S5/327 ,  H01L21/02403 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02554 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02609 ,  H01L21/02631 ,  H01L33/16 ,  H01L33/28 ,  H01S5/0422 ,  H01S5/2224 ,  H01S5/2231

摘要： There is provided a semiconductor light emitting device in which light emitting efficiency is totally improved in case of emitting a light having a short wavelength of 400 nm or less by raising internal quantum efficiency by enhancing crystallinity of semiconductor layers laminated and by raising external quantum efficiency by taking out the light emitted by preventing the light emitted from being absorbed in the substrate or the like, as much as possible. In case of laminating ZnO compound semiconductor layers (2 to 6) so as to form a light emitting layer forming portion (7) for emitting the light having a wavelength of 400 nm or less on a substrate (1), a substrate composed of MgxZn1-xO (0≦x≦0.5) is used as the substrate (1).

摘要翻译： 提供了一种半导体发光器件，其中通过提高层叠的半导体层的结晶度并通过提高外部量子效率来提高内部量子效率，并且通过提高外部量子效率来发射具有400nm或更小的短波长的光的发光效率得到全面改善 通过防止发射的光被吸收在基板等中而发出的光被尽可能多地取出。 在层叠ZnO化合物半导体层（2〜6）以在基板（1）上形成发光波长为400nm以下的光的发光层形成部（7）的情况下，将由Mg x Zn 1 -xO（0＆nlE; x＆nlE; 0.5）用作衬底（1）。

公开(公告)号：US20140332823A1

公开(公告)日：2014-11-13

申请号：US14357176

申请日：2012-11-08

申请人： TAMURA CORPORATION

发明人： Masaru Takizawa ,  Akito Kuramata

IPC分类号： H01L29/872 ,  H01L29/267

CPC分类号： H01L29/24 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02631 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/267 ,  H01L29/47 ,  H01L29/66969 ,  H01L29/872

摘要： A Schottky barrier diode is provided with: an n-type semiconductor layer including Ga2O3-based compound semiconductors with n-type conductivity; and a Schottky electrode layer which is in Schottky-contact with the n-type semiconductor layer. An n−-type semiconductor layer, which has a relatively low electron carrier concentration and is brought into Schottky-contact with the Schottky electrode layer, and an n+ semiconductor layer, which has a higher electron carrier concentration than the n semiconductor layer, are formed in the n-type semiconductor layer.

摘要翻译： 肖特基势垒二极管具有：包含具有n型导电性的Ga 2 O 3系化合物半导体的n型半导体层; 以及与n型半导体层肖特基接触的肖特基电极层。 形成具有较低电子载流子浓度并与肖特基电极层肖特基接触的n型半导体层和具有比n个半导体层更高的电子载流子浓度的n +半导体层 在n型半导体层中。

公开(公告)号：US20140331919A1

公开(公告)日：2014-11-13

申请号：US14357180

申请日：2012-11-27

申请人： TAMURA CORPORATION

发明人： Kohei Sasaki

IPC分类号： C30B23/06

CPC分类号： C30B23/066 ,  C30B23/005 ,  C30B29/16 ,  H01L21/02414 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02631

摘要： A Ga2O3 crystal film is epitaxially grown on a Ga2O3 crystal substrate using an MBE method, while controlling the n-type conductivity with high accuracy. Provided is a method for producing a Ga2O3 crystal film, wherein a conductive Ga2O3 crystal film is formed by epitaxial growth using an MBE method. This method for producing a Ga2O3 crystal film comprises a step wherein a Ga2O3 single crystal film containing Sn is grown by producing a Ga vapor and an Sn vapor and supplying the Ga vapor and the Sn vapor to the surface of a Ga2O3 crystal substrate as molecular beams The Sn vapor is produced by heating Sn oxide that is filled in a cell of an MBE apparatus.

摘要翻译： 使用MBE法在Ga 2 O 3晶体基板上外延生长Ga 2 O 3晶体膜，同时以高精度控制n型导电性。 提供一种制造Ga 2 O 3晶体膜的方法，其中通过使用MBE方法的外延生长形成导电Ga 2 O 3晶体膜。 这种制造Ga 2 O 3晶体膜的方法包括以下步骤：通过产生Ga蒸气和Sn蒸气生长含有Sn的Ga 2 O 3单晶膜，并将Ga蒸气和Sn蒸气供给到Ga 2 O 3晶体基板的表面作为分子束 通过加热填充在MBE装置的电池中的Sn氧化物来生成Sn蒸气。

公开(公告)号：US08846505B2

公开(公告)日：2014-09-30

申请号：US12720399

申请日：2010-03-09

申请人： Moshe Einav

发明人： Moshe Einav

IPC分类号： H01L21/36

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/02403 ,  H01L21/02414 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02535 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/02628

摘要： A method for growing islands of semiconductor monocrystals from a solution on an amorphous substrate includes the procedures of depositing a semiconductor-metal mixture layer, applying lithography and etching for forming at least one platform, heating the at least one platform, and saturating the semiconductor-metal solution until a monocrystal of the semiconductor component is formed. The procedure of depositing a semiconductor-metal mixture layer, includes a semiconductor component and at least one other metal component, is performed on top of the amorphous substrate. The procedure of applying lithography and etching to the semiconductor-metal mixture layer and a portion of the amorphous substrate is performed for forming at least one platform, the at least one platform having a top view shape corresponding to crystal growth direction and habit respective of the semiconductor component. The procedure of heating the at least one platform is performed until the semiconductor-metal mixture layer of the at least one platform is melted and becomes a semiconductor-metal solution. The procedure of saturating the semiconductor-metal solution is performed until a monocrystal of the semiconductor component is formed from the solution on each of the at least one platform.

摘要翻译： 从非晶衬底上的溶液生长半导体单晶体岛的方法包括沉积半导体 - 金属混合物层，施加光刻和蚀刻以形成至少一个平台的步骤，加热至少一个平台，并使半导体 - 直到形成半导体部件的单晶。 沉积半导体 - 金属混合物层的步骤包括半导体组件和至少一种其它金属组分，在非晶衬底的顶部进行。 执行对半导体 - 金属混合物层和非晶衬底的一部分进行光刻和蚀刻的步骤以形成至少一个平台，所述至少一个平台具有对应于晶体生长方向的顶视图形状和相应于 半导体元件。 执行加热至少一个平台的步骤，直到至少一个平台的半导体 - 金属混合物层熔化并变成半导体金属溶液。 进行使半导体金属溶液饱和的工序，直到由至少一个平台中的每一个的溶液形成半导体部件的单晶。