摘要:
A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.
摘要:
A multi-chip module (MCM) is described in which at least two substrates are mechanically coupled by an adhesive layer that maintains alignment and a zero (or near zero) spacing between proximity connectors on surfaces of the substrates, thereby facilitating high signal quality during proximity communication between the substrates. In order to provide sufficient shear strength, the adhesive layer has a thickness that is larger than the spacing. This may be accomplished using one or more positive and/or negative features on the substrates. For example, the adhesive may be bonded to: one of the surfaces and an inner surface of a channel that is recessed below the other surface; inner surfaces of channels that are recessed below both of the surfaces; or both of the surfaces. In this last case, the zero (or near zero) spacing may be achieved by disposing proximity connectors on a mesa that protrudes above at least one of the substrate surfaces.
摘要:
The disclosed embodiments provide a synchronizer latch circuit that facilitates resolving metastability issues. This synchronizer latch circuit includes a set of lightly loaded, cross-coupled transistors that form a metastable resolving and state-holding element that is coupled to two outputs. An incoming synchronization signal creates a voltage difference between the two outputs, but does not directly force a state change for the outputs. Instead, the data and clock inputs control transistors that allow neighboring power sources and/or ground network connections to weakly influence the outputs. The cross-coupled transistors then amplify the resulting voltage difference to generate valid output voltages, even when the data input and clock signal are received at roughly the same time. Thus, the synchronizer latch circuit facilitates rapidly resolving metastability and improving synchronizer performance.
摘要:
A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, is electrically and mechanically coupled to the exposed pads. For example, the ramp component may be coupled to the semiconductor dies using: solder, microsprings and/or an anisotropic conducting film. Furthermore, each of the semiconductor dies includes a static bend so that an end segment of each of the semiconductor dies is parallel to the direction and is mechanically coupled to the ramp component. These end segments may facilitate high-bandwidth communication of signals between the chips and the ramp component, for example, via proximity communication.
摘要:
One embodiment of the present invention provides a system that facilitates capacitive communication between integrated circuit chips. The system includes a substrate having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The system additionally includes an integrated circuit chip having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. Additionally, the integrated circuit chip is pressed against the substrate such that the active face of the integrated circuit chip is parallel to and adjacent to the active face of the substrate, and capacitive signal pads on the active face of the integrated circuit chip overlap signal pads on the active face of the substrate. The arrangement of the substrate and integrated circuit chip facilitates communication between the integrated circuit chip and the substrate through capacitive coupling via the overlapping signal pads.
摘要:
A chip package is described. This chip package includes a stack of semiconductor dies or chips that are offset from each other, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, electrically couples to the exposed pads. For example, the ramp component may be electrically coupled to the semiconductor dies using: microsprings, an anisotropic film, and/or solder. Consequently, the electrical contacts may have a conductive, a capacitive or, in general, a complex impedance. Furthermore, the chips and/or the ramp component may be positioned relative to each other using a ball-and-pit alignment technique. By removing the need for costly and area-consuming through-silicon vias (TSVs) in the semiconductor dies, the chip package facilitates chips to be stacked in a manner that provides high bandwidth and low cost.
摘要:
An optical connector is described. This optical connector spatially segregates optical coupling between an optical fiber and an optical component, which relaxes the associated mechanical-alignment requirements. In particular, the optical connector includes an optical spreader component disposed on a substrate. This optical spreader component is optically coupled to the optical fiber at a first coupling region, and is configured to optically couple to the optical component at a second coupling region that is at a different location on the substrate than the first coupling region. Moreover, the first coupling region and the second coupling region are optically coupled by an optical waveguide.
摘要:
A system of protecting a proximity communication system against electrostatic discharge (ESD). The proximity communication system includes two chips, each having an array of electrical pads at its surface and covered by a thin dielectric layer such that capacitive coupling circuits are formed between the chips when they are joined together. In at least one of the chips, an additional protection pad is formed away from the array, and heavy protection circuitry is connected to it. Its surface is exposed through the dielectric surface over it such that, when an ESD aggressor approaches, the discharge occurs to the protection pad.
摘要:
A diversity proximity communication system formed on two juxtaposed chips, one having a two-dimensional array of transmit elements, the other having a two-dimensional array of receive elements. The receive and transmit elements need not be aligned and may have nominal alignment of one transmit element overlapping the corners of four receive elements. The elements may be electrical pads capacitively coupled across the interface. Signals of four different multiplexing groups, e.g., time-multiplexed, are supplied to transmitting elements in a 2×2 array. Signals from four receive elements in a 2×2 array are amplified, combined, and demultiplexed for the selected multiplexing group. The gains for the four signals to be combined are differentially controlled to increase the signal-to-noise ratio. The amplification may be determined by the overlap between each of the receive elements and the transmit element of the selected multiplexing group.
摘要:
One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system measures an alignment between a first chip and a second chip. The system then selects a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment. In this way, the system allows a data signal to be distributed to and transmitted by the mini-bars that form the transmitter bit position. The system also selects a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment. Next, the system associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment. In this way, the system allows data signals transmitted by the mini-bars within a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.