公开(公告)号：US08159016B2

公开(公告)日：2012-04-17

申请号：US11011479

申请日：2004-12-15

申请人： Sung-ho Park ,  Jung-hyun Lee

发明人： Sung-ho Park ,  Jung-hyun Lee

IPC分类号： H01L27/108

CPC分类号： H01L28/65 ,  H01L21/31604 ,  H01L21/31637 ,  H01L27/1085 ,  H01L28/75

摘要： A capacitor of a semiconductor device, and a method of manufacturing the capacitor of the semiconductor device, include a lower electrode layer, a dielectric layer, and an upper electrode layer, wherein the dielectric layer includes tantalum (Ta) oxide and an oxide of a Group 5 element, such as niobium (Nb) or vanadium (V).

摘要翻译： 半导体器件的电容器和制造半导体器件的电容器的方法包括下电极层，电介质层和上电极层，其中电介质层包括氧化钽（Ta）和氧化物 第5族元素，如铌（Nb）或钒（V）。

公开(公告)号：US08159012B2

公开(公告)日：2012-04-17

申请号：US12238822

申请日：2008-09-26

申请人： Jong-cheol Lee ,  Jun-noh Lee ,  Ki-vin Im ,  Ki-yeon Park ,  Sung-hae Lee ,  Sang-yeol Kang

发明人： Jong-cheol Lee ,  Jun-noh Lee ,  Ki-vin Im ,  Ki-yeon Park ,  Sung-hae Lee ,  Sang-yeol Kang

IPC分类号： H01L27/108

CPC分类号： H01L29/51 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/10852 ,  H01L28/65 ,  H01L29/513

摘要： Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode.

摘要翻译： 本发明提供一种半导体器件，其具有立方晶系或四方晶系的绝缘层，具有良好的电特性。 半导体器件包括：半导体衬底，包括有源区，形成在半导体衬底的有源区中的晶体管，形成在半导体衬底上的层间绝缘层和形成在层间绝缘层中的接触插塞;以及 其电连接到晶体管。 半导体器件可以包括形成在层间绝缘层上并且与电性连接的接触插塞的下电极，形成在下电极上的上电极和立方体系的绝缘层或包括 金属硅酸盐层。 绝缘层可以形成在下电极和上电极之间。

公开(公告)号：US20120075767A1

公开(公告)日：2012-03-29

申请号：US13247805

申请日：2011-09-28

申请人： Mihaela Ioana Popovici ,  Johan Swerts ,  Jorge Kittl ,  Sven Van Elshocht

发明人： Mihaela Ioana Popovici ,  Johan Swerts ,  Jorge Kittl ,  Sven Van Elshocht

IPC分类号： H01G4/30 ,  H01L21/02

CPC分类号： H01L21/02175 ,  C23C16/405 ,  C23C16/45527 ,  H01L21/02186 ,  H01L21/022 ,  H01L21/02244 ,  H01L21/0228 ,  H01L28/40 ,  H01L28/65 ,  H01L28/75

摘要： Methods of manufacturing metal-insulator-metal capacitor structures, and the metal-insulator-metal capacitor structures obtained, are disclosed. In one embodiment, a method includes providing a substrate, forming on the substrate a first metal layer comprising a first metal, and using atomic layer deposition with an H2O oxidant to deposit on the first metal layer a protective layer comprising TiO2. The method further includes using atomic layer deposition with an O3 oxidant to deposit on the protective layer a dielectric layer of a dielectric material, and forming on the dielectric layer a second metal layer comprising a second metal. In another embodiment, a metal-insulator-metal capacitor includes a bottom electrode comprising a first metal, a protective layer deposited on the bottom electrode and comprising TiO2, a dielectric layer deposited on the protective layer and comprising a dielectric material, and a top electrode formed on the dielectric layer and comprising a second metal.

摘要翻译： 公开了制造金属 - 绝缘体 - 金属电容器结构的方法以及所获得的金属 - 绝缘体 - 金属电容器结构。 在一个实施例中，一种方法包括提供衬底，在衬底上形成包括第一金属的第一金属层，并且使用与H 2 O氧化剂的原子层沉积在第一金属层上沉积包含TiO 2的保护层。 该方法还包括使用原子层沉积与O 3氧化剂在保护层上沉积电介质材料的电介质层，并在电介质层上形成包含第二金属的第二金属层。 在另一个实施例中，金属 - 绝缘体 - 金属电容器包括底部电极，其包括第一金属，沉积在底部电极上并包含TiO 2的保护层，沉积在保护层上并包括电介质材料的电介质层，以及顶部电极 形成在介电层上并且包括第二金属。

公开(公告)号：US20120064719A1

公开(公告)日：2012-03-15

申请号：US13256832

申请日：2010-03-17

申请人： Jorge A. Lubguban, JR. ,  Thomas M. Cameron ,  Chongying Xu ,  Weimin Li

发明人： Jorge A. Lubguban, JR. ,  Thomas M. Cameron ,  Chongying Xu ,  Weimin Li

IPC分类号： H01L21/28 ,  B05D5/12 ,  H01B1/00

CPC分类号： C23C16/0272 ,  C23C16/18 ,  C23C16/45534 ,  H01L28/65

摘要： A method of forming a ruthenium-containing film in a vapor deposition process, including depositing ruthenium with an assistive metal species that increases the rate and extent of ruthenium deposition in relation to deposition of ruthenium in the absence of such assistive metal species. An illustrative precursor composition useful for carrying out such method includes a ruthenium precursor and a strontium precursor in a solvent medium, wherein one of the ruthenium and strontium precursors includes a pendant functionality that coordinates with the central metal atom of the other precursor, so that ruthenium and strontium co-deposit with one another. The method permits incubation time for ruthenium deposition on non- metallic substrates to be very short, thereby accommodating very rapid film formation in processes such as atomic layer deposition.

摘要翻译： 一种在气相沉积工艺中形成含钌膜的方法，包括用辅助金属物质沉积钌，其在不存在这种辅助金属物质的情况下相对于沉积钌而增加钌沉积的速率和程度。 用于实施这种方法的说明性前体组合物包括在溶剂介质中的钌前体和锶前体，其中钌和锶前体之一包括与另一前体的中心金属原子配位的侧链官能团，使得钌 和锶共沉积。 该方法允许在非金属基底上钌沉积的孵育时间非常短，从而在诸如原子层沉积的过程中容纳非常快速的成膜。

公开(公告)号：US20120056299A1

公开(公告)日：2012-03-08

申请号：US13225451

申请日：2011-09-04

申请人： Emmanuel DEFAY ,  Gwenaël LE RHUN ,  Aurélien SUHM

发明人： Emmanuel DEFAY ,  Gwenaël LE RHUN ,  Aurélien SUHM

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/55 ,  H01L21/02197 ,  H01L21/02282 ,  H01L28/40 ,  H01L28/65

摘要： An integrated capacitor comprises a layer of dielectric material known as functional dielectric material based on crystallized material of perovskite type, between at least one first electrode known as a bottom electrode at the surface of a substrate and at least one second electrode known as a top electrode, said electrodes being electrically insulated by a layer of electrically insulating material in order to allow at least one contact on the top electrode. The electrically insulating material is made of an amorphous dielectric material of perovskite type having a dielectric constant lower than that of the crystallized material of perovskite type. The contact is formed from an etched contacting layer in contact with the electrically insulating dielectric layer level with its surface parallel to the plane of the layers. A process for manufacturing such an integrated capacitor is also provided.

摘要翻译： 集成电容器包括被称为基于钙钛矿型结晶材料的功能介电材料的介电材料层，位于衬底表面处的称为底部电极的至少一个第一电极和称为顶部电极的至少一个第二电极 所述电极通过电绝缘材料层电绝缘，以允许顶部电极上的至少一个接触。 电绝缘材料由钙钛矿型非晶介质材料制成，其介电常数低于钙钛矿型结晶材料的介电常数。 接触由与电绝缘介电层水平面接触的蚀刻接触层形成，其表面平行于层的平面。 还提供了一种用于制造这种集成电容器的工艺。

公开(公告)号：US20120012914A1

公开(公告)日：2012-01-19

申请号：US13185872

申请日：2011-07-19

申请人： Yongjun Jeff Hu

发明人： Yongjun Jeff Hu

IPC分类号： H01L27/108 ,  H01L21/02 ,  H01L29/92

CPC分类号： H01L27/10855 ,  H01L21/28568 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/7687 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/485 ,  H01L23/53238 ,  H01L28/65 ,  H01L28/75 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention includes methods of utilizing compositions containing iridium and tantalum in semiconductor constructions, and includes semiconductor constructions comprising compositions containing iridium and tantalum. The compositions containing iridium and tantalum can be utilized as barrier materials, and in some aspects can be utilized as barriers to copper diffusion.

摘要翻译： 本发明包括在半导体结构中使用含有铱和钽的组合物的方法，并且包括包含含有铱和钽的组合物的半导体构造。 含有铱和钽的组合物可用作阻挡材料，并且在一些方面可用作铜扩散的阻挡层。

公开(公告)号：US20110312148A1

公开(公告)日：2011-12-22

申请号：US13155520

申请日：2011-06-08

申请人： HOON KIM ,  SANG-HYEOB LEE ,  SANG HO YU ,  WEI TI LEE ,  SESHADRI GANGULI ,  HYOUNG-CHAN HA

发明人： HOON KIM ,  SANG-HYEOB LEE ,  SANG HO YU ,  WEI TI LEE ,  SESHADRI GANGULI ,  HYOUNG-CHAN HA

IPC分类号： H01L21/02 ,  B82Y40/00

CPC分类号： H01L28/65 ,  B82Y40/00 ,  C23C16/18 ,  C23C16/56 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76864 ,  H01L28/91

摘要： Methods for depositing ruthenium-containing films are provided herein. In some embodiments, a method of depositing a ruthenium-containing film on a substrate may include depositing a ruthenium-containing film on a substrate using a ruthenium-containing precursor, the deposited ruthenium-containing film having carbon incorporated therein; and exposing the deposited ruthenium-containing film to an oxygen-containing gas to remove at least some of the carbon from the deposited ruthenium-containing film. In some embodiments, the oxygen-containing gas exposed ruthenium-containing film may be annealed in a hydrogen-containing gas to remove at least some oxygen from the ruthenium-containing film. In some embodiments, the deposition, exposure, and annealing may be repeated to deposit the ruthenium-containing film to a desired thickness.

摘要翻译： 本文提供了沉积含钌膜的方法。 在一些实施方案中，在基材上沉积含钌膜的方法可以包括使用含钌前驱体将沉积的含钌膜沉积在基板上， 并将沉积的含钌膜暴露于含氧气体中以从沉积的含钌膜中除去至少一些碳。 在一些实施方案中，含氧气体暴露的含钌膜可以在含氢气体中退火以从含钌膜中除去至少一些氧。 在一些实施例中，可以重复沉积，曝光和退火，以将含钌膜沉积到期望的厚度。

公开(公告)号：US20110298090A1

公开(公告)日：2011-12-08

申请号：US12794251

申请日：2010-06-04

申请人： Chanro Park ,  Sangduk Park ,  Paul D. Kirsch ,  David Gilmer ,  Chang Yong Kang ,  Joel Barnett

发明人： Chanro Park ,  Sangduk Park ,  Paul D. Kirsch ,  David Gilmer ,  Chang Yong Kang ,  Joel Barnett

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/40 ,  H01L28/65

摘要： Capacitors, systems, and methods are disclosed. In one embodiment, the capacitor includes a first electrode. The capacitor may also include a first insulator layer having a positive VCC adjacent to the first electrode. The capacitor may further include a second insulator layer having a negative VCC adjacent to the first insulator layer. The capacitor may also include a third insulator layer having a positive VCC adjacent to the second insulator layer. The capacitor may also include a second electrode adjacent to the third insulator layer.

摘要翻译： 公开了电容器，系统和方法。 在一个实施例中，电容器包括第一电极。 电容器还可以包括具有与第一电极相邻的正VCC的第一绝缘体层。 电容器还可以包括具有与第一绝缘体层相邻的负VCC的第二绝缘体层。 电容器还可以包括具有与第二绝缘体层相邻的正VCC的第三绝缘体层。 电容器还可以包括与第三绝缘体层相邻的第二电极。

公开(公告)号：US20110177236A1

公开(公告)日：2011-07-21

申请号：US13074771

申请日：2011-03-29

申请人： David E. Lazovsky ,  Tony P. Chiang ,  Majid Keshavarz

发明人： David E. Lazovsky ,  Tony P. Chiang ,  Majid Keshavarz

IPC分类号： B05D5/12

CPC分类号： H01L23/5329 ,  B82Y30/00 ,  H01L21/31 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76873 ,  H01L21/76879 ,  H01L28/65 ,  H01L29/06 ,  H01L2924/0002 ,  Y10T428/249953 ,  H01L2924/00

摘要： Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, flouroalkyl groups, heteroarlyl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.

公开(公告)号：US20110165702A1

公开(公告)日：2011-07-07

申请号：US13046863

申请日：2011-03-14

申请人： Wensheng Wang

发明人： Wensheng Wang

IPC分类号： H01L21/02

CPC分类号： H01L27/11502 ,  G11C11/221 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： A ferroelectric capacitor is formed over a semiconductor substrate (10), and thereafter, interlayer insulating films (48, 50, 52) covering the ferroelectric capacitor are formed. Next, a contact hole (54) reaching a top electrode (40) is formed in the interlayer insulating films (48, 50, 52). Next, a wiring (58) electrically connected to the top electrode (40) through the contact hole (54) is formed on the interlayer insulating films (48, 50, 52). At the time of forming the top electrode (40), conductive oxide films (40a, 40b) are formed, and then a cap film (40c) composed of a noble metal exhibiting less catalytic action than Pt and having a thickness of 150 nm or less is formed on the conductive oxide films (40a, 40b).

摘要翻译： 在半导体衬底（10）上形成铁电电容器，然后形成覆盖铁电电容器的层间绝缘膜（48,50,52）。 接下来，在层间绝缘膜（48,50,52）中形成到达顶部电极（40）的接触孔（54）。 接下来，在层间绝缘膜（48,50,52）上形成有通过接触孔（54）电连接到顶部电极（40）的布线（58）。 在形成顶部电极（40）时，形成导电氧化物膜（40a，40b），然后形成由贵金属组成的覆盖膜（40c），该贵金属具有比Pt更小的催化作用并且具有150nm的厚度或 在导电氧化物膜（40a，40b）上形成较少。