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    Memory cell of nonvolatile semiconductor memory
    84.
    发明授权
    Memory cell of nonvolatile semiconductor memory 有权
    非易失性半导体存储器的存储单元

    公开(公告)号：US07842996B2

    公开(公告)日：2010-11-30

    申请号：US12142373

    申请日：2008-06-19

    Applicant: Shoko Kikuchi ,  Akira Takashima ,  Naoki Yasuda ,  Koichi Muraoka

    Inventor： Shoko Kikuchi ,  Akira Takashima ,  Naoki Yasuda ,  Koichi Muraoka

    IPC: H01L29/788 ,  H01L29/792

    CPC classification number: H01L29/7881 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513

    Abstract: A memory cell of a nonvolatile semiconductor memory includes a semiconductor region, source/drain areas arranged separately from each other in the semiconductor region, a tunnel insulating film arranged on a channel region between the diffusion areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulator arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulator. The inter-electrode insulator includes lanthanoid-based metal Ln, aluminum Al, and oxygen O, and a composition ratio Ln/(Al+Ln) between the lanthanoid-based metal and the aluminum takes a value within the range of 0.33 to 0.39.

    Abstract translation: 非易失性半导体存储器的存储单元包括半导体区域，在半导体区域中彼此分开排列的源极/漏极区域，布置在扩散区域之间的沟道区域上的隧道绝缘膜，布置在隧道绝缘层上的浮置栅电极 布置在浮置栅电极上的电极间绝缘体和布置在电极间绝缘体上的控制栅电极。 电极间绝缘体包含镧系金属Ln，铝Al和氧O，镧系金属与铝之间的组成比Ln /（Al + Ln）为0.33〜0.39的范围。

    Semiconductor device and method for manufacturing a semiconductor device
    85.
    发明授权
    Semiconductor device and method for manufacturing a semiconductor device 有权
    半导体装置及其制造方法

    公开(公告)号：US07821059B2

    公开(公告)日：2010-10-26

    申请号：US12234197

    申请日：2008-09-19

    Applicant: Masao Shingu ,  Shoko Kikuchi ,  Akira Takashima ,  Tsunehiro Ino ,  Koichi Muraoka

    Inventor： Masao Shingu ,  Shoko Kikuchi ,  Akira Takashima ,  Tsunehiro Ino ,  Koichi Muraoka

    IPC: H01L21/8247 ,  H01L29/788 ,  H01L29/792 ,  H01L29/78 ,  H01L27/115

    CPC classification number: H01L29/792 ,  H01L21/28282 ,  H01L21/31604 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66833

    Abstract: In a semiconductor device, the side walls are made of SiO2, SiN or SiON, and the top insulating film or gate insulating film is made of an oxide including Al, Si, and metal element M so that the number ratio Si/M is set to no less than a number ratio Si/M at a solid solubility limit of SiO2 composition in a composite oxide including metal element M and Al and set to no more than a number ratio Si/M at the condition that the dielectric constant is equal to the dielectric constant of Al2O3 and so that the number ratio Al/M is set to no less than a number ratio Al/M where the crystallization of an oxide of said metal element M is suppressed due to the Al element and set to no more than a number ratio Al/M where the crystallization of the Al2O3 is suppressed due to the metal element M.

    Abstract translation: 在半导体器件中，侧壁由SiO 2，SiN或SiON制成，并且顶部绝缘膜或栅极绝缘膜由包括Al，Si和金属元素M的氧化物制成，使得Si / M的数量比设定 在包含金属元素M和Al的复合氧化物中SiO 2组成的固溶度极限的Si / M的数量比不小于Si / M，在介电常数等于 Al 2 O 3的介电常数和Al / M的数量比被设定为不小于Al / M的数量比，其中所述金属元素M的氧化物的结晶由于Al元素而被抑制，并且设定为不大于 由于金属元素M而抑制了Al 2 O 3的结晶化的数值比Al / M

    NONVOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME
    86.
    发明申请
    NONVOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME 审中-公开
    非易失性存储元件及其制造方法

    公开(公告)号：US20090206393A1

    公开(公告)日：2009-08-20

    申请号：US12388040

    申请日：2009-02-18

    Applicant: Keiko Ariyoshi ,  Akira Takashima ,  Shoko Kikuchi ,  Koichi Muraoka

    Inventor： Keiko Ariyoshi ,  Akira Takashima ,  Shoko Kikuchi ,  Koichi Muraoka

    IPC: H01L29/792 ,  H01L21/28

    CPC classification number: H01L29/792 ,  H01L29/40117 ,  H01L29/4234 ,  H01L29/513

    Abstract: A nonvolatile memory element includes a semiconductor region, a source region and a drain region provided in the semiconductor region, a tunnel insulating layer provided on the semiconductor region between the source region and the drain region, a charge storage layer provided on the tunnel insulating layer, a block insulating layer provided on the charge storage layer, and a control gate electrode provided on the block insulating layer. The charge storage layer includes one of an oxide, a nitride and an oxynitride, which contains at least one material selected from the group consisting of Hf, Al, Zr, Ti and a rare-earth metal, and is entirely or partially crystallized. The block insulating layer includes one of an oxide, an oxynitride, a silicate and an aluminate, which contains at least one rare-earth metal.

    Abstract translation: 非易失性存储元件包括设置在半导体区域中的半导体区域，源极区域和漏极区域，设置在源极区域和漏极区域之间的半导体区域上的隧道绝缘层，设置在隧道绝缘层上的电荷存储层 设置在电荷存储层上的块绝缘层和设置在块绝缘层上的控制栅电极。 电荷存储层包括氧化物，氮化物和氧氮化物中的一种，其含有选自Hf，Al，Zr，Ti和稀土金属中的至少一种材料，并且完全或部分结晶。 该块绝缘层包含含有至少一种稀土金属的氧化物，氮氧化物，硅酸盐和铝酸盐中的一种。

    COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    87.
    发明申请
    COMPLEMENTARY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    补充半导体器件及其制造方法

    公开(公告)号：US20090114995A1

    公开(公告)日：2009-05-07

    申请号：US12200599

    申请日：2008-08-28

    Applicant: Masamichi Suzuki ,  Masato Koyama ,  Yoshinori Tsuchiya ,  Hirotaka Nishino ,  Reika Ichihara ,  Akira Takashima

    Inventor： Masamichi Suzuki ,  Masato Koyama ,  Yoshinori Tsuchiya ,  Hirotaka Nishino ,  Reika Ichihara ,  Akira Takashima

    IPC: H01L27/08 ,  H01L21/3205

    CPC classification number: H01L21/823857 ,  H01L21/26506 ,  H01L21/31155 ,  H01L21/823842 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7842 ,  H01L29/7846 ,  H01L29/785

    Abstract: A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and Al, formed on the first semiconductor region, and a first gate electrode formed on the gate insulating film, and a p-MIS transistor having a second gate insulating film including La and Al, formed on the second semiconductor region, and a second gate electrode formed on the gate insulating film, an atomic density ratio Al/La in the second gate insulating film being larger than an atomic density ratio Al/La in the first gate insulating film.

    Abstract translation: 互补半导体器件包括半导体衬底，形成在半导体衬底的表面上的第一半导体区域，形成在半导体衬底的离开第一半导体区域的表面上的第二半导体区域，具有第一栅极的n-MIS晶体管 形成在第一半导体区域上的包括La和Al的绝缘膜和形成在栅极绝缘膜上的第一栅电极和形成在第二半导体区上的具有包括La和Al的第二栅极绝缘膜的p-MIS晶体管， 以及形成在所述栅极绝缘膜上的第二栅电极，所述第二栅极绝缘膜中的原子密度比Al / La大于所述第一栅极绝缘膜中的原子密度比Al / La。

    Semiconductor memory device
    88.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US07518178B2

    公开(公告)日：2009-04-14

    申请号：US11531933

    申请日：2006-09-14

    Applicant: Akira Takashima ,  Hiroshi Watanabe ,  Tatsuo Shimizu ,  Takeshi Yamaguchi

    Inventor： Akira Takashima ,  Hiroshi Watanabe ,  Tatsuo Shimizu ,  Takeshi Yamaguchi

    IPC: H01L29/788

    CPC classification number: H01L29/51 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    Abstract: A semiconductor memory device includes a semiconductor substrate, a first insulating film which is formed on the semiconductor substrate, a floating gate electrode which is formed on the first insulating film and made of a conductive metal oxide, a second insulating film which is formed on the floating gate electrode, has a relative dielectric constant of not less than 7.8, and is made of an insulating metal oxide of a paraelectric material, and a control gate electrode which is formed on the second insulating film and made of one of a metal and a conductive metal oxide.

    Abstract translation: 半导体存储器件包括半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上并由导电金属氧化物制成的浮栅，形成在第一绝缘膜上的第二绝缘膜 浮栅电极具有不小于7.8的相对介电常数，并且由绝缘材料的绝缘金属氧化物制成，并且控制栅电极形成在第二绝缘膜上，由金属和 导电金属氧化物。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    89.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器件

    公开(公告)号：US20090057751A1

    公开(公告)日：2009-03-05

    申请号：US12199036

    申请日：2008-08-27

    Applicant: Keiko ARIYOSHI ,  Akira TAKASHIMA ,  Shoko KIKUCHI ,  Koichi MURAOKA

    Inventor： Keiko ARIYOSHI ,  Akira TAKASHIMA ,  Shoko KIKUCHI ,  Koichi MURAOKA

    IPC: H01L29/788 ,  H01L29/792

    CPC classification number: H01L29/7881 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/517

    Abstract: A nonvolatile semiconductor memory device according to an example of the present invention includes a semiconductor region, source/drain areas arranged separately in the semiconductor region, a tunnel insulating film arranged on a channel region between the source/drain areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulating film arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulating film. The inter-electrode insulating film includes La, Al and Si.

    Abstract translation: 根据本发明实施例的非易失性半导体存储器件包括半导体区域，在半导体区域中单独布置的源极/漏极区域，布置在源极/漏极区域之间的沟道区域上的隧道绝缘膜，布置成 在隧道绝缘膜上，布置在浮栅电极上的电极间绝缘膜和布置在电极间绝缘膜上的控制栅电极。 电极间绝缘膜包括La，Al和Si。

    MEMORY CELL OF NONVOLATILE SEMICONDUCTOR MEMORY
    90.
    发明申请
    MEMORY CELL OF NONVOLATILE SEMICONDUCTOR MEMORY 有权
    非易失性半导体存储器的存储单元

    公开(公告)号：US20080315288A1

    公开(公告)日：2008-12-25

    申请号：US12142373

    申请日：2008-06-19

    Applicant: Shoko KIKUCHI ,  Akira Takashima ,  Naoki Yasuda ,  Koichi Muraoka

    Inventor： Shoko KIKUCHI ,  Akira Takashima ,  Naoki Yasuda ,  Koichi Muraoka

    IPC: H01L29/788

    CPC classification number: H01L29/7881 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513

    Abstract: A memory cell of a nonvolatile semiconductor memory includes a semiconductor region, source/drain areas arranged separately from each other in the semiconductor region, a tunnel insulating film arranged on a channel region between the diffusion areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulator arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulator. The inter-electrode insulator includes lanthanoid-based metal Ln, aluminum Al, and oxygen O, and a composition ratio Ln/(Al+Ln) between the lanthanoid-based metal and the aluminum takes a value within the range of 0.33 to 0.39.

    Abstract translation: 非易失性半导体存储器的存储单元包括半导体区域，在半导体区域中彼此分开排列的源极/漏极区域，布置在扩散区域之间的沟道区域上的隧道绝缘膜，布置在隧道绝缘层上的浮置栅电极 布置在浮置栅电极上的电极间绝缘体和布置在电极间绝缘体上的控制栅电极。 电极间绝缘体包含镧系金属Ln，铝Al和氧O，镧系金属与铝之间的组成比Ln /（Al + Ln）为0.33〜0.39的范围。

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