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    Methods of forming patterns
    81.
    发明授权
    Methods of forming patterns 有权
    形成图案的方法

    公开(公告)号：US09034570B2

    公开(公告)日：2015-05-19

    申请号：US14192410

    申请日：2014-02-27

    Applicant: Micron Technology, Inc.

    Inventor： Scott E. Sills ,  Gurtej S. Sandhu ,  John Smythe ,  Ming Zhang

    IPC: G03F7/26 ,  H01L21/027 ,  G03F7/40 ,  H01L21/033 ,  G03F7/20

    CPC classification number: H01L21/0274 ,  G03F7/20 ,  G03F7/40 ,  H01L21/0337 ,  H01L21/0338

    Abstract: Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings.

    Abstract translation: 一些实施例包括形成开口图案的方法。 所述方法可以包括在衬底上形成间隔的特征。 特征可以具有顶部并且可以具有从顶部向下延伸的侧壁。 第一材料可以沿着特征的顶部和侧壁形成。 第一材料可以通过将特征上的第一材料的共形层旋转浇铸而形成，或通过相对于基底的特征的选择性沉积来形成。 在形成第一材料之后，可以在特征之间提供填充材料，同时使第一材料的区域暴露。 然后可以相对于填充材料和特征来选择性地去除第一材料的暴露区域以产生开口图案。

    Methods of manufacturing semiconductor structures and devices including nanotubes, and semiconductor structures, devices, and systems fabricated using such methods
    82.
    发明授权
    Methods of manufacturing semiconductor structures and devices including nanotubes, and semiconductor structures, devices, and systems fabricated using such methods 有权
    制造包括纳米管的半导体结构和器件的方法，以及使用这种方法制造的半导体结构，器件和系统

    公开(公告)号：US08993448B2

    公开(公告)日：2015-03-31

    申请号：US14091011

    申请日：2013-11-26

    Applicant: Micron Technology, Inc.

    Inventor： Gurtej S. Sandhu ,  Terry L. Gilton

    IPC: B82B3/00 ,  H01L21/768 ,  D01F9/12 ,  H01L51/00 ,  H01L29/06 ,  B82Y10/00

    CPC classification number: H01L21/76897 ,  B82Y10/00 ,  D01F9/12 ,  H01L29/0669 ,  H01L51/0048 ,  H01L2221/1094 ,  Y10S977/742 ,  Y10S977/745 ,  Y10S977/842 ,  Y10S977/843 ,  Y10S977/862

    Abstract: A method of forming a plurality of nanotubes is disclosed. Particularly, a substrate may be provided and a plurality of recesses may be formed therein. Further, a plurality of nanotubes may be formed generally within each of the plurality of recesses and the plurality of nanotubes may be substantially surrounded with a supporting material. Additionally, at least some of the plurality of nanotubes may be selectively shortened and at least a portion of the at least some of the plurality of nanotubes may be functionalized. Methods for forming semiconductor structures intermediate structures, and semiconductor devices are disclosed. An intermediate structure, intermediate semiconductor structure, and a system including nanotube structures are also disclosed.

    Abstract translation: 公开了形成多个纳米管的方法。 特别地，可以设置基板，并且可以在其中形成多个凹部。 此外，多个纳米管可以大致地形成在多个凹部中的每一个内，并且多个纳米管可以基本上被支撑材料包围。 另外，多个纳米管中的至少一些可以被选择性地缩短，并且多个纳米管中的至少一些纳米管的至少一部分可以被官能化。 公开了用于形成半导体结构中间结构和半导体器件的方法。 还公开了中间结构，中间半导体结构和包括纳米管结构的系统。

    MEMORY CELLS, METHODS OF FABRICATION, SEMICONDUCTOR DEVICES, MEMORY SYSTEMS, AND ELECTRONIC SYSTEMS
    83.
    发明申请
    MEMORY CELLS, METHODS OF FABRICATION, SEMICONDUCTOR DEVICES, MEMORY SYSTEMS, AND ELECTRONIC SYSTEMS 有权
    存储单元，制造方法，半导体器件，存储器系统和电子系统

    公开(公告)号：US20150076485A1

    公开(公告)日：2015-03-19

    申请号：US14026627

    申请日：2013-09-13

    Applicant: Micron Technology, Inc.

    Inventor： Gurtej S. Sandhu ,  Witold Kula

    IPC: H01L43/10 ,  G11C11/16 ,  H01L43/12

    CPC classification number: H01L43/10 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01L27/226 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

    Abstract: A magnetic cell includes a free region between an intermediate oxide region (e.g., a tunnel barrier) and a secondary oxide region. Both oxide regions may be configured to induce magnetic anisotropy (“MA”) with the free region, enhancing the MA strength of the free region. A getter material proximate to the secondary oxide region is formulated and configured to remove oxygen from the secondary oxide region to reduce an oxygen concentration and, thus, an electrical resistance of the secondary oxide region. Thus, the secondary oxide region contributes only minimally to the electrical resistance of the cell core. Embodiments of the present disclosure therefore enable a high effective magnetoresistance, low resistance area product, and low programming voltage along with the enhanced MA strength. Methods of fabrication, memory arrays, memory systems, and electronic systems are also disclosed.

    Abstract translation: 磁性电池包括中间氧化物区域（例如，隧道势垒）和次级氧化物区域之间的自由区域。 两个氧化物区域可以被配置为与自由区域引起磁各向异性（“MA”），从而提高自由区域的MA强度。 配置和配置接近次氧化物区域的吸气剂材料以从次氧化物区域除去氧气以降低氧气浓度，从而降低次级氧化物区域的电阻。 因此，次级氧化物区域对电池芯的电阻仅有最小的贡献。 因此，本公开的实施例使得能够实现高有效磁阻，低电阻面积乘积和低编程电压以及增强的MA强度。 还公开了制造方法，存储器阵列，存储器系统和电子系统。

    Methods of forming memory cells
    84.
    发明授权
    Methods of forming memory cells 有权
    形成记忆细胞的方法

    公开(公告)号：US08962387B2

    公开(公告)日：2015-02-24

    申请号：US14053847

    申请日：2013-10-15

    Applicant: Micron Technology, Inc.

    Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

    IPC: H01L21/00 ,  H01L45/00

    CPC classification number: H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1608

    Abstract: Some embodiments include methods of forming memory cells in which a metal oxide material is formed over a first electrode material, an oxygen-sink material is formed over and directly against the metal oxide material, and a second electrode material is formed over the oxygen-sink material. The second electrode material is of a different composition than the oxygen-sink material. The metal oxide material is treated to transfer oxygen from a region of the metal oxide material to the oxygen-sink material and thereby subdivide the metal oxide material into at least two regions, with one of the regions nearest the oxygen-sink material being relatively oxygen depleted relative to another of the regions.

    Abstract translation: 一些实施例包括形成其中在第一电极材料上形成金属氧化物材料的存储单元的方法，在金属氧化物材料之上并直接抵靠金属氧化物材料形成氧沉积材料，并且在氧气沉积物上方形成第二电极材料 材料。 第二电极材料具有与吸氧材料不同的组成。 处理金属氧化物材料以将氧从金属氧化物材料的区域转移到吸氧材料，从而将金属氧化物材料细分成至少两个区域，其中最靠近氧气沉积材料的区域之一是相对氧气 相对于另一个地区而言，

    Select devices including an open volume, and related methods, memory devices, and electronic systems
    85.
    发明授权
    Select devices including an open volume, and related methods, memory devices, and electronic systems 有权
    选择包括开放卷的设备，相关方法，存储设备和电子系统

    公开(公告)号：US08957403B2

    公开(公告)日：2015-02-17

    申请号：US13929348

    申请日：2013-06-27

    Applicant: Micron Technology, Inc.

    Inventor： Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: H01L29/06 ,  H01L31/00 ,  H01L21/02 ,  H01L29/88 ,  H01L27/102 ,  H01L21/3205

    CPC classification number: H01L29/88 ,  H01L21/3205 ,  H01L27/1021 ,  Y10S438/957

    Abstract: Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select devices may comprise, for example, a metal-insulator-insulator-metal (MIIM) diode. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices.

    Abstract translation: 公开了包括用作具有低介电常数的高带隙材料的开放体积的装置。 开放体积可以在选择装置中提供更非线性的非对称I-V曲线和增强的整流行为。 选择装置可以包括例如金属 - 绝缘体 - 绝缘体 - 金属（MIIM）二极管。 可以使用各种方法来形成包括这种选择装置的选择装置和存储器系统。 存储器件和电子系统包括这样的选择器件。

    METHOD FOR FORMING FINE PITCH STRUCTURES
    87.
    发明申请
    METHOD FOR FORMING FINE PITCH STRUCTURES 审中-公开

    公开(公告)号：US20150011085A1

    公开(公告)日：2015-01-08

    申请号：US14497773

    申请日：2014-09-26

    Applicant: Micron Technology, Inc.

    Inventor： Gurtej S. Sandhu

    IPC: H01L21/768 ,  H01L21/311

    CPC classification number: H01L21/76877 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76838 ,  H01L27/105 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: A mold having an open interior volume is used to define patterns. The mold has a ceiling, floor and sidewalls that define the interior volume and inhibit deposition. One end of the mold is open and an opposite end has a sidewall that acts as a seed sidewall. A first material is deposited on the seed sidewall. A second material is deposited on the deposited first material. The deposition of the first and second materials is alternated, thereby forming alternating rows of the first and second materials in the interior volume. The mold and seed layer are subsequently selectively removed. In addition, one of the first or second materials is selectively removed, thereby forming a pattern including free-standing rows of the remaining material. The free-standing rows can be utilized as structures in a final product, e.g., an integrated circuit, or can be used as hard mask structures to pattern an underlying substrate. The mold and rows of material can be formed on multiple levels. The rows on different levels can crisscross one another. Selectively removing material from some of the rows can from openings to form, e.g., contact vias.

    Memory Cells, Methods of Programming Memory Cells, and Methods of Forming Memory Cells
    89.
    发明申请
    Memory Cells, Methods of Programming Memory Cells, and Methods of Forming Memory Cells 有权
    记忆单元，记忆单元的编程方法和形成记忆单元的方法

    公开(公告)号：US20140332751A1

    公开(公告)日：2014-11-13

    申请号：US14444795

    申请日：2014-07-28

    Applicant: Micron Technology, Inc.

    Inventor： Roy E. Meade ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu

    IPC: H01L45/00

    CPC classification number: H01L45/085 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0069 ,  G11C2213/56 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146

    Abstract: Some embodiments include methods of programming a memory cell. A plurality of charge carriers may be moved within the memory cell, with an average charge across the moving charge carriers having an absolute value greater than 2. Some embodiments include methods of forming and programming an ionic-transport-based memory cell. A stack is formed to have programmable material between first and second electrodes. The programmable material has mobile ions which are moved within the programmable material to transform the programmable material from one memory state to another. An average charge across the moving mobile ions has an absolute value greater than 2. Some embodiments include memory cells with programmable material between first and second electrodes. The programmable material includes an aluminum nitride first layer, and includes a second layer containing a mobile ion species in common with the first layer.

    Abstract translation: 一些实施例包括编程存储器单元的方法。 多个电荷载体可以在存储器单元内移动，其中跨越移动电荷载流子的绝对值大于2的平均电荷。一些实施例包括形成和编程基于离子传输的存储单元的方法。 堆叠形成为在第一和第二电极之间具有可编程材料。 可编程材料具有在可编程材料内移动的移动离子，以将可编程材料从一个存储器状态转换到另一个。 移动移动离子上的平均电荷具有大于2的绝对值。一些实施例包括在第一和第二电极之间具有可编程材料的存储单元。 可编程材料包括氮化铝第一层，并且包括含有与第一层共同的可移动离子物质的第二层。

    Method for forming fine pitch structures
    90.
    发明授权
    Method for forming fine pitch structures 有权
    形成细间距结构的方法

    公开(公告)号：US08846537B2

    公开(公告)日：2014-09-30

    申请号：US13794084

    申请日：2013-03-11

    Applicant: Micron Technology, Inc.

    Inventor： Gurtej S. Sandhu

    IPC: H01L21/311 ,  H01L21/31 ,  H01L21/768 ,  H01L21/033 ,  H01L21/3213 ,  H01L27/105

    CPC classification number: H01L21/76877 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76838 ,  H01L27/105 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: A mold having an open interior volume is used to define patterns. The mold has a ceiling, floor and sidewalls that define the interior volume and inhibit deposition. One end of the mold is open and an opposite end has a sidewall that acts as a seed sidewall. A first material is deposited on the seed sidewall. A second material is deposited on the deposited first material. The deposition of the first and second materials is alternated, thereby forming alternating rows of the first and second materials in the interior volume. The mold and seed layer are subsequently selectively removed. In addition, one of the first or second materials is selectively removed, thereby forming a pattern including free-standing rows of the remaining material. The free-standing rows can be utilized as structures in a final product, e.g., an integrated circuit, or can be used as hard mask structures to pattern an underlying substrate. The mold and rows of material can be formed on multiple levels. The rows on different levels can crisscross one another. Selectively removing material from some of the rows can from openings to form, e.g., contact vias.

    Abstract translation: 使用具有敞开内部空间的模具来限定图案。 模具具有限定内部容积并抑制沉积的天花板，地板和侧壁。 模具的一端是开放的，相对的端部具有用作种子侧壁的侧壁。 第一种材料沉积在种子侧壁上。 第二种材料沉积在沉积的第一种材料上。 第一和第二材料的沉积是交替的，从而在内部容积中形成第一和第二材料的交替排。 随后选择性地除去模具和种子层。 此外，选择性地去除第一或第二材料中的一个，从而形成包括剩余材料的独立行的图案。 独立行可以用作最终产品中的结构，例如集成电路，或者可以用作硬掩模结构以图案化下面的基底。 模具和材料行可以在多个层次上形成。 不同级别的行可以相互交叉。 从一些行中选择性地去除材料可以从开口形成，例如接触通孔。

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