公开(公告)号：US5679043A

公开(公告)日：1997-10-21

申请号：US457962

申请日：1995-06-01

Applicant: Nalin Kumar

Inventor： Nalin Kumar

IPC: H01J1/304 ,  H01J1/316 ,  H01J9/02 ,  H01J61/067 ,  H01J63/06 ,  H01J1/30

CPC classification number: H01J9/027 ,  H01J1/304 ,  H01J1/316 ,  H01J61/0677 ,  H01J63/06 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2329/00

Abstract: A matrix addressable flat panel display includes a flat cathode operable for emitting electrons to an anode when an electric field is produced across the surface of the flat cathode by two electrodes placed on each side of the flat cathode. The flat cathode may consist of a cermet or amorphic diamond or some other combination of a conducting material and an insulating material such as a low effective work function material. The electric field produced causes electrons to hop on the surface of the cathode at the conducting-insulating interfaces. An electric field produced between the anode and the cathode causes these electrons to bombard a phosphor layer on the anode.

Abstract translation: 矩阵寻址平板显示器包括平面阴极，当通过放置在平面阴极的每一侧上的两个电极跨越平面阴极的表面产生电场时，可以将电子发射到阳极。 扁平阴极可以由金属陶瓷或非晶金刚石或导电材料和绝缘材料的一些其它组合构成，例如低有效功函数材料。 所产生的电场导致电子在导电绝缘界面处在阴极的表面上跳跃。 在阳极和阴极之间产生的电场使得这些电子轰击阳极上的磷光体层。

公开(公告)号：US5652083A

公开(公告)日：1997-07-29

申请号：US473911

申请日：1995-06-07

Applicant: Nalin Kumar ,  Chenggang Xie

Inventor： Nalin Kumar ,  Chenggang Xie

IPC: H01J9/02 ,  H01J17/06 ,  H01J19/02 ,  H01J29/04 ,  H01J31/12 ,  H04N1/00 ,  G03F7/00

CPC classification number: H01J9/025 ,  H01J31/127 ,  H01J2201/30457

Abstract: A method is provided for fabricating a display cathode which includes forming a conductive line adjacent a face of a substrate. A region of amorphic diamond is formed adjacent a selected portion of the conductive line.

Abstract translation: 提供了一种用于制造显示阴极的方法，包括在基板的表面附近形成导电线。 在导电线的选定部分附近形成非晶金刚石区域。

公开(公告)号：US5528099A

公开(公告)日：1996-06-18

申请号：US378333

申请日：1995-01-26

Applicant: Chenggang Xie ,  Nalin Kumar

Inventor： Chenggang Xie ,  Nalin Kumar

IPC: H01J1/304 ,  H01J3/02 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J3/022 ,  H01J2329/00

Abstract: Lateral luminescent field emitter devices for use in flat panel displays and a method of manufacturing are described. The device comprises a flat substrate, an anode disposed on the substrate, and a cathode disposed on the substrate, the cathode providing an electron emission surface capable of emitting electrons laterally across a gap to a major portion of an adjacent surface of the anode.

Abstract translation: 描述了用于平板显示器的侧面发光场发射器件和制造方法。 该器件包括平坦的衬底，设置在衬底上的阳极和设置在衬底上的阴极，阴极提供能够横向跨过阳极的相邻表面的主要部分的间隙发射电子的电子发射表面。

公开(公告)号：US5509071A

公开(公告)日：1996-04-16

申请号：US221849

申请日：1994-04-01

Applicant: Charles J. Petrie, Jr. ,  Wayne P. Allen

Inventor： Charles J. Petrie, Jr. ,  Wayne P. Allen

IPC: G07F7/10 ,  G07F17/16 ,  H04L9/32

CPC classification number: G07F7/1008 ,  G06Q20/341 ,  G06Q20/40975 ,  G07F17/16

Abstract: A system for use in an electronic cryptosystem for providing a sender with electronic proof of receipt by an intended recipient of an electronic artifact is disclosed. The process is initiated by the recipient's requesting an artifact from the sender, who then obtains the recipient's transmission key and separately encrypts the requested artifact and an acknowledgment such that they are decryptable with first and second strictly private keys, respectively, known to and controlled by the sender. Next, the sender encrypts the encrypted artifact and encrypted acknowledgment together using the transmission key such that the message is decryptable only with a third strictly private key known to and controlled by the recipient, and transmits the encrypted message to the recipient. The recipient decrypts the message to recover the encrypted artifact, as well as the encrypted acknowledgment which is returned to the sender. The sender decrypts the acknowledgment using the second strictly private key to verify receipt by the recipient of the encrypted artifact and then sends the first strictly private key to the recipient to enable decryption of the encrypted artifact. Additionally, at least one alternative embodiment is disclosed for enabling a sender to prove to third parties that the intended recipient in fact received the requested artifact.

Abstract translation: 公开了一种在电子密码系统中使用的系统，用于向发送者提供电子伪影的预期接收者的电子收据证明。 该过程由接收者从发送者请求工件发起，然后他们然后获得接收者的传输密钥，并分别加密所请求的伪影和确认，使得它们可以分别被第一和第二严格私钥解密，已知和受到 发件人。 接下来，发送者使用传输密钥一起加密加密的伪像和加密的确认，使得消息只能被接收者已知和控制的第三严格私有密钥解密，并将加密的消息发送给接收者。 收件人解密消息以恢复加密伪像，以及返回给发送方的加密确认。 发送方使用第二严格私钥对确认进行解密，以验证收件人是否收到加密伪像，然后将第一个严格私钥发送给接收者，以便对加密伪像进行解密。 此外，公开了至少一个备选实施例用于使发送者向第三方证明预期接收者实际上已经接收到所请求的伪像。

公开(公告)号：US5380546A

公开(公告)日：1995-01-10

申请号：US075062

申请日：1993-06-09

Applicant: Ajay Krishnan ,  Nalin Kumar

Inventor： Ajay Krishnan ,  Nalin Kumar

IPC: H01L21/768 ,  H05K3/38 ,  H05K3/46 ,  B05D5/12

CPC classification number: H01L21/76849 ,  H01L21/76843 ,  H01L21/76877 ,  H05K3/38 ,  H05K3/4644

Abstract: A maskless process for forming a protected metal feature in a planar insulating layer of a substrate is disclosed. A first barrier material is disposed in a recess in an insulating layer, a conductive metal is disposed on the first barrier material such that the entire metal feature is positioned within the recess below the top of the recess, a second barrier material is disposed on the metal feature such that the second barrier material occupies the entire portion of the recess above the metal feature and extends above the top surface of the insulating layer, and the second barrier material is then polished until the top of the second barrier material is in and aligned with the top of the insulating layer. As a result, the metal feature is surrounded and protected by the first and second barrier materials, and the substrate is planarized.

Abstract translation: 公开了一种用于在基板的平面绝缘层中形成受保护的金属特征的无掩模工艺。 第一阻挡材料设置在绝缘层的凹部中，导电金属设置在第一阻挡材料上，使得整个金属特征位于凹部下方的凹部内，第二阻挡材料设置在 金属特征使得第二阻挡材料占据金属部件上方的凹部的整个部分，并且在绝缘层的顶表面上方延伸，然后抛光第二阻挡材料直到第二阻挡材料的顶部处于并排列 与绝缘层的顶部。 结果，金属特征被第一和第二阻挡材料包围和保护，并且基板被平坦化。

公开(公告)号：US5328087A

公开(公告)日：1994-07-12

申请号：US38420

申请日：1993-03-29

Applicant: Richard D. Nelson ,  Thomas P. Dolbear ,  Robert W. Froehlich

Inventor： Richard D. Nelson ,  Thomas P. Dolbear ,  Robert W. Froehlich

IPC: C09J9/02 ,  H01B1/22 ,  H01R4/04 ,  H05K3/32 ,  H01L21/58

CPC classification number: H01L24/29 ,  C09J9/02 ,  H01B1/22 ,  H01L24/32 ,  H01R4/04 ,  H05K3/323 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29305 ,  H01L2224/29311 ,  H01L2224/29499 ,  H01L2224/83951 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01021 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K2201/0209 ,  H05K2201/023 ,  H05K2201/10719 ,  H05K2203/0425 ,  Y10T29/49126

Abstract: The present invention discloses a thermally and electrically conductive adhesive material comprising a hardened adhesive, and a non-solidified filler containing a liquid metal dispersed in separate spaced regions of the adhesive. The hardened adhesive provides a mechanical bond whereas the filler provides continuous thermal and electrical metal bridges, each bridge extending through the adhesive and contacting the bonded surfaces. The method includes (a) dispersing a filler containing a liquid metal into an unhardened adhesive, (b) contacting the unhardened adhesive and the filler in non-solidified state to the surfaces resulting in separate spaced regions of the non-solidified filler contacting both surfaces, and (c) hardening the adhesive.

Abstract translation: 本发明公开了一种导热粘合剂材料，其包括硬化粘合剂，以及含有液体金属的非固化填料，其分散在粘合剂的分开间隔的区域中。 硬化的粘合剂提供机械结合，而填料提供连续的热和电金属桥，每个桥延伸通过粘合剂并接触粘结表面。 该方法包括（a）将含有液态金属的填料分散在未硬化的粘合剂中，（b）将未硬化的粘合剂和非固化状态的填料接触到表面，从而形成与两个表面接触的非固化填料的分开的间隔区域 ，和（c）硬化粘合剂。

公开(公告)号：US5253199A

公开(公告)日：1993-10-12

申请号：US717302

申请日：1991-06-17

Applicant: David A. Gibson

Inventor： David A. Gibson

IPC: G11C11/44

CPC classification number: G11C11/44

Abstract: Apparatus for selecting memory cells in a MOS memory array and reading data contained therein. Superconducting Josephson junction devices switch between a superconducting and voltage gap mode for rapid selection of an addressed memory cell row and column, and then read out of the selected memory cell data contained therein.

Abstract translation: 用于选择MOS存储器阵列中的存储器单元并读取其中包含的数据的装置。 超导约瑟夫逊结器件在超导和电压间隙模式之间切换，用于快速选择寻址的存储器单元行和列，然后读出其中包含的所选择的存储器单元数据。

公开(公告)号：US5220490A

公开(公告)日：1993-06-15

申请号：US603614

申请日：1990-10-25

Applicant: William Weigler ,  Lawrence N. Smith

Inventor： William Weigler ,  Lawrence N. Smith

IPC: H01L23/538 ,  H05K1/00

CPC classification number: H01L23/5386 ,  H01L23/5382 ,  H01L23/5383 ,  H05K1/0289 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/029 ,  H05K2201/10689 ,  H05K2203/175

Abstract: A customizable interconnect circuit wherein a universal substrate of minimum layers is completely customized by programmable conductive links placed only on the top layer of the substrate. The customizable circuit having high density of orthogonally placed X- and Y-conductors capable of interconnecting closely spaced large-scale integrated circuits or discrete electrical components. By utilizing a plurality of interconnect cells regularly spaced throughout a universal, fixed substrate, interconnect routing from overlying electrical components or integrated circuits can be more directly routed to target areas.

Abstract translation: 一种可定制的互连电路，其中最小层的通用衬底由仅放置在衬底的顶层上的可编程导电链路完全定制。 可定制的电路具有高密度的正交放置的X和Y导体，能够互相紧密隔开的大规模集成电路或分立的电气部件。 通过利用在整个通用固定基板上规则间隔地布置的多个互连电池，可以将来自上覆电气元件或集成电路的互连路由更直接地路由到目标区域。

公开(公告)号：US5216803A

公开(公告)日：1993-06-08

申请号：US805167

申请日：1991-12-11

Applicant: Ernest R. Nolan ,  David H. Carey ,  Thomas A. Bishop

Inventor： Ernest R. Nolan ,  David H. Carey ,  Thomas A. Bishop

IPC: H05K13/04

CPC classification number: H05K13/0486 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49815 ,  Y10T29/49822 ,  Y10T29/53274

Abstract: Removing welded outer lead bonds of TAB tape leads to contacts on a substrate. The method includes separating the electrical leads adjacent the weld bonds leaving a remnant, engaging the remnant with a shear tool, and moving the tool and bond relative to each other shearing the remnant. In some cases the tool is ultrasonically vibrated in a direction transversely to the relative movement of the tool and bond.

Abstract translation: 去除TAB带焊接的外部引线接合导致衬底上的触点。 该方法包括分离邻近焊缝的电引线留下残留物，用剪切工具接合残余物，并且相对于彼此移动工具和结合来剪切残余物。 在一些情况下，该工具在横向于工具和结合的相对运动的方向上超声振动。

公开(公告)号：US5192581A

公开(公告)日：1993-03-09

申请号：US822383

申请日：1992-01-14

Applicant: Tom J. Hirsch ,  Charles W. C. Lin ,  Chung J. Lee ,  Heinrich G. O. Muller

Inventor： Tom J. Hirsch ,  Charles W. C. Lin ,  Chung J. Lee ,  Heinrich G. O. Muller

IPC: C23C18/16 ,  H05K3/18 ,  B05D3/06 ,  B05D5/12 ,  H01L21/306

CPC classification number: H05K3/185 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/204 ,  C23C18/2066 ,  C23C18/30 ,  C23C18/32 ,  C23C18/38 ,  C23C18/42 ,  H05K2203/107

Abstract: A dielectric substrate is coated with a protective layer and a catalyst film is formed in a laser irradiated predetermined pattern on the protective layer so that during electroless deposition a metal is plated on the catalyst film in the predetermined pattern whether or not the dielectric has unwanted catalytic sites. The protective layer is not removed by the electroless plating bath or prior etch steps but can subsequently be stripped by a separate etch without removing the plated metal or the dielectric from the substrate.

Abstract translation: 电介质基板被涂覆有保护层，并且在保护层上以激光照射的预定图案形成催化剂膜，使得在无电沉积期间，以预定图案将金属镀在催化剂膜上，无论电介质是否有不希望的催化 网站。 保护层不通过化学镀浴或先前的蚀刻步骤去除，但是随后可以通过单独的蚀刻来剥离保护层，而不从衬底去除镀覆的金属或电介质。