公开(公告)号：US08927414B2

公开(公告)日：2015-01-06

申请号：US13470487

申请日：2012-05-14

申请人： Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

发明人： Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

IPC分类号： H01L21/4763 ,  H01L23/52

CPC分类号： H01L29/1606 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/02164 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02491 ,  H01L21/02527 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02645 ,  H01L29/0673 ,  H01L29/66045 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

摘要： A graphene structure and a method of manufacturing the graphene structure, and a graphene device and a method of manufacturing the graphene device. The graphene structure includes a substrate; a growth layer disposed on the substrate and having exposed side surfaces; and a graphene layer disposed on the side surfaces of the growth layer.

公开(公告)号：US07192873B1

公开(公告)日：2007-03-20

申请号：US11240473

申请日：2005-10-03

申请人： Hoon Kim ,  In-jae Song ,  Won-joo Kim ,  Byoung-Iyong Choi

发明人： Hoon Kim ,  In-jae Song ,  Won-joo Kim ,  Byoung-Iyong Choi

IPC分类号： H01L21/311

CPC分类号： H01L21/8238 ,  H01L21/3212 ,  H01L33/08 ,  H01L33/24 ,  Y10S977/755 ,  Y10S977/758 ,  Y10S977/773

摘要： Provided is a method of manufacturing a nano scale semiconductor device, such as a nano scale P-N junction device or a CMOS using nano particles without using a mask or a fine pattern. The method includes dispersing uniformly a plurality of nano particles on a semiconductor substrate, forming an insulating layer covering the nano particles on the semiconductor substrate, partly removing the upper surfaces of the nano particles and the insulating layer, selectively removing the nano particles from the insulating layer, and partly forming doped semiconductor layers in the semiconductor substrate by partly doping the semiconductor substrate through spaces formed by removing the nano particles.

摘要翻译： 提供了一种使用纳米级P-N结器件或使用纳米颗粒的CMOS而不使用掩模或精细图案的纳米级半导体器件的制造方法。 该方法包括在半导体衬底上均匀分散多个纳米颗粒，形成覆盖半导体衬底上的纳米颗粒的绝缘层，部分去除纳米颗粒和绝缘层的上表面，从绝缘体中选择性地除去纳米颗粒 层，并且通过部分地通过去除纳米颗粒形成的空间将半导体衬底部分地掺杂在半导体衬底中部分地形成掺杂半导体层。

公开(公告)号：US09230801B2

公开(公告)日：2016-01-05

申请号：US13229183

申请日：2011-09-09

申请人： Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

发明人： Byoung-Iyong Choi ,  Eun-kyung Lee ,  Dong-mok Whang

IPC分类号： B32B9/00 ,  H01L21/02 ,  C01B31/04

CPC分类号： H01L21/02381 ,  C01B32/182 ,  H01L21/02428 ,  H01L21/02444 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02527 ,  H01L21/0259 ,  H01L21/02606 ,  H01L21/02664 ,  Y10T428/13 ,  Y10T428/24273 ,  Y10T428/24479 ,  Y10T428/30

摘要： A graphene structure and a method of forming the same may include a graphene formed in a three-dimensional (3D) shape, e.g., a column shape, a stacking structure, and a three-dimensionally connected structure. The graphene structure can be formed by using Ge.

摘要翻译： 石墨烯结构及其形成方法可以包括以三维（3D）形状形成的石墨烯，例如柱状，堆叠结构和三维连接的结构。 可以使用Ge形成石墨烯结构。

公开(公告)号：US08679976B2

公开(公告)日：2014-03-25

申请号：US12976874

申请日：2010-12-22

申请人： Eun-kyung Lee ,  Byoung-Iyong Choi ,  Dong-mok Whang ,  Jae-hyun Lee

发明人： Eun-kyung Lee ,  Byoung-Iyong Choi ,  Dong-mok Whang ,  Jae-hyun Lee

IPC分类号： H01L21/44

CPC分类号： H01L21/02527 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/186 ,  C01B2204/04 ,  C23C16/0272 ,  C23C16/26 ,  C30B25/02 ,  C30B29/08 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0262

摘要： A method of manufacturing graphene includes forming a germanium layer on a surface of a substrate, and forming the graphene directly on the germanium layer by supplying carbon-containing gas into a chamber in which the substrate is disposed.

摘要翻译： 制造石墨烯的方法包括在基板的表面上形成锗层，并且通过将含碳气体供给到其中设置基板的室中，直接在锗层上形成石墨烯。

公开(公告)号：US20090197416A1

公开(公告)日：2009-08-06

申请号：US12421662

申请日：2009-04-10

申请人： Eun-kyung LEE ,  Byoung-Iyong CHOI

发明人： Eun-kyung LEE ,  Byoung-Iyong CHOI

IPC分类号： H01L21/306

CPC分类号： C30B29/06 ,  B82Y30/00 ,  C30B11/12 ,  C30B25/00 ,  C30B29/60 ,  Y10T428/2933

摘要： Silicon nano wires having silicon nitride shells and a method of manufacturing the same are provided. Each silicon nano wire has a core portion formed of silicon, and a shell portion formed of silicon nitride surrounding the core portion. The method includes removing silicon oxide formed on the shell of the silicon nano wire and forming a silicon nitride shell.

摘要翻译： 提供了具有氮化硅壳的硅纳米线及其制造方法。 每个硅纳米线具有由硅形成的芯部分和由围绕芯部分的氮化硅形成的壳部分。 该方法包括去除形成在硅纳米线的外壳上并形成氮化硅壳的氧化硅。

公开(公告)号：US20060227837A1

公开(公告)日：2006-10-12

申请号：US11285176

申请日：2005-11-23

申请人： Eun-kyung Lee ,  Byoung-Iyong Choi

发明人： Eun-kyung Lee ,  Byoung-Iyong Choi

IPC分类号： H01S5/00

CPC分类号： B82Y20/00 ,  H01S5/026 ,  H01S5/041 ,  H01S5/18 ,  H01S5/34

摘要： A quantum dot vertical capacity surface emitting laser (QD-VCSEL) and a method of manufacturing the same are provided. The QD-VCSEL includes a substrate, a lower distributed brag reflector (DBR) mirror formed on the substrate, an electron transport layer (ETL) formed on the lower DBR mirror, an emitting layer (EML) formed of nano-particle type group II-VI compound semiconductor quantum dots on the ETL, a hole transport layer (HTL) formed on the EML, and an upper DBR mirror formed on the HTL.

摘要翻译： 提供量子点垂直容量表面发射激光器（QD-VCSEL）及其制造方法。 QD-VCSEL包括基板，形成在基板上的下分布式布拉格反射镜（DBR）反射镜，形成在下DBR反射镜上的电子传输层（ETL），由纳米颗粒型II组形成的发射层（EML） -VI化合物半导体量子点，在EML上形成的空穴传输层（HTL）和形成在HTL上的上DBR反射镜。

公开(公告)号：US20060212975A1

公开(公告)日：2006-09-21

申请号：US11369859

申请日：2006-03-08

申请人： Byoung-Iyong Choi ,  Eun-kyung Lee

发明人： Byoung-Iyong Choi ,  Eun-kyung Lee

IPC分类号： H01L51/40

CPC分类号： B82Y30/00 ,  C30B11/12 ,  C30B29/605 ,  Y10S977/721 ,  Y10S977/762 ,  Y10S977/768 ,  Y10S977/789 ,  Y10S977/81 ,  Y10S977/938

摘要： Provided are nano wires and a method of manufacturing the same. The method includes forming microgrooves having a plurality of microcavities, the microgrooves forming a regular pattern on a surface of a silicon substrate; forming a metal layer on the silicon substrate by depositing a material which acts as a catalyst to form nano wires on the silicon substrate; agglomerating the metal layer within the microgrooves on the surface of the silicon substrate by heating the metal layer to form catalysts; and growing the nano wires between the catalysts and the silicon substrate using a thermal process.

摘要翻译： 提供纳米线及其制造方法。 该方法包括形成具有多个微腔的微槽，微槽在硅衬底的表面上形成规则图案; 通过沉积作为催化剂的材料在硅衬底上形成纳米线，在硅衬底上形成金属层; 通过加热金属层以形成催化剂，将硅衬底表面上的微槽内的金属层凝集成形成催化剂; 并使用热处理在催化剂和硅衬底之间生长纳米线。

公开(公告)号：US07754508B2

公开(公告)日：2010-07-13

申请号：US11335503

申请日：2006-01-20

申请人： Eun-kyung Lee ,  Byoung-iyong Choi ,  Pil-soo Ahn ,  Jun-young Kim ,  Young-gu Jin

发明人： Eun-kyung Lee ,  Byoung-iyong Choi ,  Pil-soo Ahn ,  Jun-young Kim ,  Young-gu Jin

IPC分类号： H01L21/00

CPC分类号： H01L33/34 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  G01Q80/00 ,  H01L27/14601 ,  H01L27/14621 ,  H01L27/14645 ,  H01L27/14683 ,  H01L27/156 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/1804 ,  H01L33/0054 ,  H01L33/24 ,  Y02E10/547 ,  Y02P70/521

摘要： A method of manufacturing a silicon optoelectronic device, a silicon optoelectronic device manufactured by the method, and an image input and/or output apparatus including the silicon optoelectronic device are provided. The method includes preparing an n- or p-type silicon-based substrate, forming a microdefect pattern along a surface of the substrate by etching, forming a control film with an opening on the microdefect pattern, and forming a doping region on the surface of the substrate having the microdefect pattern in such a way that a predetermined dopant of the opposite type to the substrate is injected onto the substrate through the opening of the control film to be doped to a depth so that a photoelectric conversion effect leading to light emission and/or reception by quantum confinement effect in the p-n junction occurs. The silicon optoelectronic device has superior light-emitting efficiency, can be used as at least one of a light-emitting device and a light-receiving device, and has high wavelength selectivity. In addition, the silicon optoelectronic device panel having the two-dimensional array of the silicon optoelectronic devices can be applied in the image input and/or output apparatus capable of directly displaying an image and/or inputting optical information in a screen.

摘要翻译： 提供一种制造硅光电子器件的方法，通过该方法制造的硅光电子器件，以及包括硅光电子器件的图像输入和/或输出设备。 该方法包括制备n型或p型硅基衬底，通过蚀刻形成沿衬底表面的微观图案，在微缺陷图案上形成具有开口的控制膜，并在 具有微观图案的衬底，使得通过控制膜的开口将与衬底相反类型的预定掺杂剂注入到衬底上以被掺杂到深度，使得导致发光的光电转换效应和 /或在pn结中发生量子限制效应的接收。 硅光电子器件具有优异的发光效率，可以用作发光器件和光接收器件中的至少一种，并且具有高波长选择性。 此外，具有硅光电子器件的二维阵列的硅光电子器件面板可以应用于能够直接在屏幕中显示图像和/或输入光学信息的图像输入和/或输出设备。

公开(公告)号：US07670862B2

公开(公告)日：2010-03-02

申请号：US11284107

申请日：2005-11-22

申请人： In-jae Song ,  Byoung-Iyong Choi

发明人： In-jae Song ,  Byoung-Iyong Choi

IPC分类号： H01L21/00

CPC分类号： H01L31/1804 ,  H01L27/14621 ,  H01L27/14685 ,  H01L27/156 ,  H01L31/02162 ,  H01L31/0236 ,  H01L31/03529 ,  H01L31/1872 ,  H01L33/18 ,  Y02E10/547 ,  Y02P70/521

摘要： A method of manufacturing a silicon optoelectronic device, a silicon optoelectronic device manufactured by the method, and an image input and/or output apparatus having the silicon optoelectronic device are provided. The method includes: preparing an n-type or p-type silicon-based substrate; forming a polysilicon in one or more regions of the surface of the substrate; oxidizing the surface of the substrate where the polysilicon is formed, to form a silicon oxidation layer on the substrate, and forming a microdefect flection pattern at the interface between the substrate and the silicon oxidation layer, wherein the microdefect flection pattern is formed by the oxidation accelerated by oxygen traveling through boundaries of the grains in the polysilicon; exposing the microdefect flection pattern by etching the silicon oxidation layer; and forming a doping region by doping the exposed microdefect flection pattern with a dopant of the opposite type to the substrate.

摘要翻译： 提供一种制造硅光电子器件的方法，通过该方法制造的硅光电子器件以及具有硅光电器件的图像输入和/或输出装置。 该方法包括：制备n型或p型硅基衬底; 在所述衬底的表面的一个或多个区域中形成多晶硅; 氧化形成多晶硅的基板的表面，在基板上形成硅氧化层，在基板与硅氧化层之间的界面处形成微缺陷弯曲图案，其中通过氧化形成微缺陷弯曲图案 通过在多晶硅中的晶粒的边界移动的氧加速; 通过蚀刻硅氧化层暴露微缺陷弯曲图案; 以及通过将与所述衬底相反类型的掺杂剂掺杂所述暴露的微缺陷弯曲图案来形成掺杂区域。

公开(公告)号：US20060115916A1

公开(公告)日：2006-06-01

申请号：US11335503

申请日：2006-01-20

申请人： Eun-kyung Lee ,  Byoung-iyong Choi ,  Pil-soo Ahn ,  Jun-young Kim ,  Young-gu Jin

发明人： Eun-kyung Lee ,  Byoung-iyong Choi ,  Pil-soo Ahn ,  Jun-young Kim ,  Young-gu Jin

IPC分类号： H01L21/00

CPC分类号： H01L33/34 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  G01Q80/00 ,  H01L27/14601 ,  H01L27/14621 ,  H01L27/14645 ,  H01L27/14683 ,  H01L27/156 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/035281 ,  H01L31/1804 ,  H01L33/0054 ,  H01L33/24 ,  Y02E10/547 ,  Y02P70/521

摘要： A method of manufacturing a silicon optoelectronic device, a silicon optoelectronic device manufactured by the method, and an image input and/or output apparatus including the silicon optoelectronic device are provided. The method includes preparing an n- or p-type silicon-based substrate, forming a microdefect pattern along a surface of the substrate by etching, forming a control film with an opening on the microdefect pattern, and forming a doping region on the surface of the substrate having the microdefect pattern in such a way that a predetermined dopant of the opposite type to the substrate is injected onto the substrate through the opening of the control film to be doped to a depth so that a photoelectric conversion effect leading to light emission and/or reception by quantum confinement effect in the p-n junction occurs. The silicon optoelectronic device has superior light-emitting efficiency, can be used as at least one of a light-emitting device and a light-receiving device, and has high wavelength selectivity. In addition, the silicon optoelectronic device panel having the two-dimensional array of the silicon optoelectronic devices can be applied in the image input and/or output apparatus capable of directly displaying an image and/or inputting optical information in a screen.

摘要翻译： 提供一种制造硅光电子器件的方法，通过该方法制造的硅光电子器件，以及包括硅光电子器件的图像输入和/或输出设备。 该方法包括制备n型或p型硅基衬底，通过蚀刻形成沿衬底表面的微观图案，在微缺陷图案上形成具有开口的控制膜，并在 具有微观图案的衬底，使得通过控制膜的开口将与衬底相反类型的预定掺杂剂注入到衬底上以被掺杂到深度，使得导致发光的光电转换效应和 /或在pn结中发生量子限制效应的接收。 硅光电子器件具有优异的发光效率，可以用作发光器件和光接收器件中的至少一种，并且具有高波长选择性。 此外，具有硅光电子器件的二维阵列的硅光电子器件面板可以应用于能够直接在屏幕中显示图像和/或输入光学信息的图像输入和/或输出设备。