公开(公告)号：US20080111235A1

公开(公告)日：2008-05-15

申请号：US11978370

申请日：2007-10-29

申请人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

发明人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

摘要： A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

摘要翻译： 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

公开(公告)号：US20100105201A1

公开(公告)日：2010-04-29

申请号：US12650093

申请日：2009-12-30

申请人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

发明人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

IPC分类号： H01L21/60

CPC分类号： H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

摘要： A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

摘要翻译： 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

公开(公告)号：US07906423B2

公开(公告)日：2011-03-15

申请号：US12650093

申请日：2009-12-30

申请人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

发明人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

IPC分类号： H01L21/44

CPC分类号： H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

摘要： A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

摘要翻译： 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

公开(公告)号：US07663219B2

公开(公告)日：2010-02-16

申请号：US11978370

申请日：2007-10-29

申请人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

发明人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Seong-Chan Han ,  Jung-Hyeon Kim

IPC分类号： H01L23/48

CPC分类号： H05K3/303 ,  H05K2201/0305 ,  H05K2201/09781 ,  H05K2201/10689 ,  H05K2201/2036 ,  Y02P70/613

摘要： A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

摘要翻译： 半导体器件包括半导体封装，电路板和间隔保持元件。 半导体封装具有从主体突出的主体和引线。 电路板具有与引线电连接的第一焊盘。 间隔保持构件插入在电路板和主体之间。 间隔保持构件保持引线与第一焊盘之间的间隔。 因此，均匀地保持引线和焊盘之间的间隔，从而提高了半导体器件的热和/或机械可靠性。

公开(公告)号：US07791178B2

公开(公告)日：2010-09-07

申请号：US11984762

申请日：2007-11-21

申请人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Seong-Chan Han ,  Jung-Hyeon Kim ,  Sung-Hwan Kim

发明人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Seong-Chan Han ,  Jung-Hyeon Kim ,  Sung-Hwan Kim

IPC分类号： H01L23/495

CPC分类号： H01L23/3107 ,  H01L23/49541 ,  H01L23/49558 ,  H01L23/49586 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/3426 ,  H05K2201/10689 ,  H05K2201/10909 ,  H05K2201/2081 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A lead frame unit, a semiconductor package having a lead frame unit, a stacked semiconductor package having a semiconductor package, and methods of manufacturing the same are provided. The lead frame unit in a stacked semiconductor package may include a die pad supporting a semiconductor chip, an inner lead electrically connected to the semiconductor chip, an outer lead extending from the inner lead, and a heat-resistant insulation member surrounding the connection portion. The outer lead may include a connection portion connected to the inner lead and a junction portion connected to the connection portion and a circuit board. An external signal may be applied to the junction portion. If the lead frame unit is used in the stacked semiconductor package, the outer lead and a dummy outer lead in the stacked semiconductor package may have substantially the same shape.

摘要翻译： 提供引线框单元，具有引线框单元的半导体封装，具有半导体封装的堆叠半导体封装及其制造方法。 层叠半导体封装中的引线框架单元可以包括：支撑半导体芯片的管芯焊盘，与半导体芯片电连接的内部引线;从内部引线延伸的外部引线;以及围绕连接部分的耐热绝缘构件。 外引线可以包括连接到内引线的连接部分和连接到连接部分的接合部分和电路板。 外部信号可以施加到接合部分。 如果在叠层半导体封装中使用引线框架单元，则堆叠半导体封装中的外引线和虚外外引线可以具有基本相同的形状。

公开(公告)号：US20080116546A1

公开(公告)日：2008-05-22

申请号：US11984762

申请日：2007-11-21

申请人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Seong-Chan Han ,  Jung-Hyeon Kim ,  Sung-Hwan Kim

发明人： Hyo-Jae Bang ,  Heui-Seog Kim ,  Seong-Chan Han ,  Jung-Hyeon Kim ,  Sung-Hwan Kim

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L23/3107 ,  H01L23/49541 ,  H01L23/49558 ,  H01L23/49586 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/3426 ,  H05K2201/10689 ,  H05K2201/10909 ,  H05K2201/2081 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A lead frame unit, a semiconductor package having a lead frame unit, a stacked semiconductor package having a semiconductor package, and methods of manufacturing the same are provided. The lead frame unit in a stacked semiconductor package may include a die pad supporting a semiconductor chip, an inner lead electrically connected to the semiconductor chip, an outer lead extending from the inner lead, and a heat-resistant insulation member surrounding the connection portion. The outer lead may include a connection portion connected to the inner lead and a junction portion connected to the connection portion and a circuit board. An external signal may be applied to the junction portion. If the lead frame unit is used in the stacked semiconductor package, the outer lead and a dummy outer lead in the stacked semiconductor package may have substantially the same shape.

摘要翻译： 提供引线框单元，具有引线框单元的半导体封装，具有半导体封装的堆叠半导体封装及其制造方法。 层叠半导体封装中的引线框架单元可以包括：支撑半导体芯片的管芯焊盘，与半导体芯片电连接的内部引线;从内部引线延伸的外部引线;以及围绕连接部分的耐热绝缘构件。 外引线可以包括连接到内引线的连接部分和连接到连接部分的接合部分和电路板。 外部信号可以施加到接合部分。 如果在叠层半导体封装中使用引线框架单元，则堆叠半导体封装中的外引线和虚外外引线可以具有基本相同的形状。

公开(公告)号：US20090200362A1

公开(公告)日：2009-08-13

申请号：US12369257

申请日：2009-02-11

申请人： Ky-Hyun JUNG ,  Jae-Yong Park ,  Heui-Seog Kim ,  Wha-Su Sin ,  Jung-Hyeon Kim

发明人： Ky-Hyun JUNG ,  Jae-Yong Park ,  Heui-Seog Kim ,  Wha-Su Sin ,  Jung-Hyeon Kim

IPC分类号： B23K31/02 ,  B23K1/20

CPC分类号： B23K1/0016 ,  B23K1/0053 ,  B23K1/008 ,  B23K1/206 ,  B23K2101/42 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L25/105 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3651 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/10734 ,  H01L2224/05599

摘要： In a lead-free solder, a semiconductor package and a method of manufacturing the semiconductor package, the lead-free solder includes about 3.5 percent by weight to about 6 percent by weight of silver, about 0.05 percent by weight to about 0.5 percent by weight of copper and a remainder of tin. The lead-free solder is employed in the semiconductor package. The lead-free solder has high impact resistance and high heat resistance to reduce failures of the semiconductor package.

摘要翻译： 在无铅焊料，半导体封装和半导体封装的制造方法中，无铅焊料包括约3.5重量％至约6重量％的银，约0.05重量％至约0.5重量％ 的铜和余下的锡。 在半导体封装中采用无铅焊料。 无铅焊料具有高抗冲击性和高耐热性，以减少半导体封装的故障。

公开(公告)号：US20120108035A1

公开(公告)日：2012-05-03

申请号：US13228966

申请日：2011-09-09

申请人： Goon-Woo Kim ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Jeong-sam Lee ,  Sung-Soo Lee

发明人： Goon-Woo Kim ,  Heui-Seog Kim ,  Dong-Chun Lee ,  Jeong-sam Lee ,  Sung-Soo Lee

IPC分类号： H01L21/78

CPC分类号： H01L21/78 ,  B23K26/364 ,  B23K26/40 ,  B23K26/53 ,  B23K2103/50 ,  H01L21/67092 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/11

摘要： A method of fabricating a semiconductor device includes preparing a semiconductor wafer having a top surface and a bottom surface. The semiconductor wafer is loaded onto a wafer chuck, and the bottom surface of the loaded semiconductor wafer faces the wafer chuck. A groove is formed in the top surface of the loaded semiconductor wafer by irradiating a second laser onto the top surface, and a reforming region is formed in the loaded semiconductor wafer under the groove by irradiating a first laser through wafer chuck and bottom surface of the semiconductor wafer into a region in which the first laser is focused. The semiconductor wafer is unloaded from the wafer chuck. The bottom surface of the semiconductor wafer is ground to decrease a thickness of the semiconductor wafer. The semiconductor wafer is separated along the groove and the reforming region, thereby forming a plurality of unit chips.

摘要翻译： 制造半导体器件的方法包括制备具有顶表面和底表面的半导体晶片。 将半导体晶片装载到晶片卡盘上，并且加载的半导体晶片的底表面面向晶片卡盘。 通过将第二激光照射在顶面上，在负载的半导体晶片的顶面形成有槽，通过将晶片卡盘的第一激光照射到晶片卡盘的下表面， 半导体晶片进入第一激光器聚焦的区域。 半导体晶片从晶片卡盘卸载。 研磨半导体晶片的底面以减小半导体晶片的厚度。 半导体晶片沿着沟槽和重整区域分离，从而形成多个单元芯片。

公开(公告)号：US20090174078A1

公开(公告)日：2009-07-09

申请号：US12318635

申请日：2009-01-05

申请人： Hyeck-Jin Jeong ,  Seon-Ju Oh ,  Yong-Ki Park ,  Heui-Seog Kim

发明人： Hyeck-Jin Jeong ,  Seon-Ju Oh ,  Yong-Ki Park ,  Heui-Seog Kim

IPC分类号： H01L23/522

CPC分类号： G01R31/2884 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00014

摘要： Provided is a semiconductor device and method of manufacturing the same. The semiconductor device may include a base material and a compound layer on the base material including a mixture of a non-adhesive organic material and a non-oxidizing metal material.

摘要翻译： 提供一种半导体器件及其制造方法。 半导体器件可以包括基材和基材上的化合物层，包括非粘性有机材料和非氧化金属材料的混合物。

公开(公告)号：US07420814B2

公开(公告)日：2008-09-02

申请号：US11100525

申请日：2005-04-07

申请人： Jae-Hong Kim ,  Heui-Seog Kim ,  Wha-Su Sin ,  Jong-Keun Jeon

发明人： Jae-Hong Kim ,  Heui-Seog Kim ,  Wha-Su Sin ,  Jong-Keun Jeon

IPC分类号： H05K1/14

CPC分类号： H01L25/105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/3511

摘要： A package stack may include a first package and a second package. The first package may have an IC chip with an active surface and a back surface. The active surface may be connected to a first major surface of a first circuit substrate. The second package may include a second IC chip with an active surface and a back surface. The back surface of the second IC chip may be attached to a first major surface of a second circuit substrate and the active surface of the second IC chip may be electrically connected to the first major surface of the second circuit substrate. The first package may be stacked on the second package so that the active surface of the second package may be electrically connected to a second major surface of the first circuit substrate of the first package. A method may involve providing a first package having a first IC chip and a first circuit substrate and providing a second package having a second IC chip and a second circuit substrate. The first and the second packages may be stacked so that the active surface of the second IC may face and be electrically connected to a major surface of the first circuit substrate.

摘要翻译： 包装堆叠可以包括第一包装和第二包装。 第一封装可以具有带有活性表面和背面的IC芯片。 有源表面可以连接到第一电路基板的第一主表面。 第二封装可以包括具有有源表面和后表面的第二IC芯片。 第二IC芯片的背面可以附接到第二电路基板的第一主表面，并且第二IC芯片的有源表面可以电连接到第二电路基板的第一主表面。 第一封装可以堆叠在第二封装上，使得第二封装的有源表面可以电连接到第一封装的第一电路基板的第二主表面。 一种方法可以包括提供具有第一IC芯片和第一电路基板的第一封装，并提供具有第二IC芯片和第二电路基板的第二封装。 可以堆叠第一和第二封装，使得第二IC的有源表面可以面对并且电连接到第一电路基板的主表面。