公开(公告)号：US20060057843A1

公开(公告)日：2006-03-16

申请号：US11264517

申请日：2005-11-01

Applicant: Fusen Chen ,  Ling Chen ,  Walter Glenn ,  Praburam Gopalraja ,  Jianming Fu

Inventor： Fusen Chen ,  Ling Chen ,  Walter Glenn ,  Praburam Gopalraja ,  Jianming Fu

IPC: H01L21/4763 ,  H01L21/44

CPC classification number: H01L21/76844 ,  C23C14/022 ,  C23C14/046 ,  C23C16/34 ,  C23C16/45525 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76871 ,  H01L21/76873

Abstract: In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.

公开(公告)号：US06991709B2

公开(公告)日：2006-01-31

申请号：US10934231

申请日：2004-09-03

Applicant: Praburam Gopalraja ,  Jianming Fu ,  Fusen Chen ,  Girish Dixit ,  Zheng Xu ,  Wei Wang ,  Ashok K. Sinha

Inventor： Praburam Gopalraja ,  Jianming Fu ,  Fusen Chen ,  Girish Dixit ,  Zheng Xu ,  Wei Wang ,  Ashok K. Sinha

IPC: C23C14/34

CPC classification number: H01L21/76844 ,  C23C14/046 ,  C23C14/165 ,  C23C14/185 ,  C23C14/225 ,  C23C14/35 ,  H01J37/3405 ,  H01J37/342 ,  H01J37/3423 ,  H01J37/3452 ,  H01J37/3455 ,  H01J37/3458 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76873 ,  H01L2221/1089

Abstract: A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.

Abstract translation: 在等离子体溅射反应器中的多步骤溅射工艺，其具有可在两种模式中操作的靶和磁控管，例如在衬底溅射蚀刻和衬底溅射沉积中。 目标具有面向待溅射涂覆的晶片的环形保险库。 位于拱顶周围的各种类型的磁性装置产生一个支撑等离子体的磁场，该等离子体延伸在大容积的拱顶上。 与本发明的反应器或其它反应器的集成铜通孔填充方法包括铜的高度电离溅射沉积的第一步骤，其可任选地用于去除通孔底部的阻挡层，更中立的，更低的 铜的完全溅射沉积以完成种子层，以及将铜电镀到孔中以完成金属化的第三步骤。 前两个步骤也可以与阻隔金属一起使用。

公开(公告)号：US06974771B2

公开(公告)日：2005-12-13

申请号：US10894774

申请日：2004-07-20

Applicant: Fusen Chen ,  Ling Chen ,  Walter Benjamin Glenn ,  Praburam Gopalraja ,  Jianming Fu

Inventor： Fusen Chen ,  Ling Chen ,  Walter Benjamin Glenn ,  Praburam Gopalraja ,  Jianming Fu

IPC: C23C14/02 ,  C23C14/04 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/44 ,  H01L21/768 ,  C23C16/00 ,  H01L21/302 ,  H01L21/461 ,  H01L21/4763

CPC classification number: H01L21/76844 ,  C23C14/022 ,  C23C14/046 ,  C23C16/34 ,  C23C16/45525 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76871 ,  H01L21/76873

Abstract: In a first aspect, a method is provided that includes (1) forming a first barrier layer over the sidewalls and bottom of a via using atomic layer deposition within an atomic layer deposition (ALD) chamber; (2) removing at least a portion of the first barrier layer from the bottom of the via by sputter etching; and (3) depositing a second barrier layer on the sidewalls and bottom of the via within the ALD chamber. Numerous other embodiments are provided, as are systems, methods and computer program products in accordance with these and other aspects.

Abstract translation: 在第一方面，提供了一种方法，其包括（1）在原子层沉积（ALD）室内使用原子层沉积在通孔的侧壁和底部上形成第一阻挡层; （2）通过溅射蚀刻从所述通孔的底部去除所述第一阻挡层的至少一部分; 和（3）在ALD室内的通孔的侧壁和底部上沉积第二阻挡层。 提供了许多其它实施例，以及根据这些和其它方面的系统，方法和计算机程序产品。

公开(公告)号：US06884329B2

公开(公告)日：2005-04-26

申请号：US10340564

申请日：2003-01-10

Applicant: Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

Inventor： Wei D. Wang ,  Anantha K. Subramani ,  Jianming Fu ,  Praburam Gopalraja ,  Jick M. Yu ,  Fusen Chen

IPC: C23C14/04 ,  C23C14/34 ,  C23C14/54 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/76844 ,  C23C14/046 ,  C23C14/345 ,  C23C14/541 ,  H01L21/2855 ,  H01L21/76865 ,  H01L21/76877

Abstract: A method of filling copper into a high-aspect ratio via by a plasma sputter process and allowing the elimination of electrochemical plating. In one aspect of the invention, the sputtering is divided into a first step performed at a low temperature of no more than 100° C. and with at least portions of high wafer bias, thereby filling a lower half of the hole, and a second step performed at a higher temperature, e.g., at least 200° C. and with at least portions of low wafer bias to complete the hole filling. In another aspect of the invention, diffusion promoting gas such as hydrogen is added to the copper sputter plasma. In still another aspect, copper sputtering, even in the final fill phase, is performed through multiple cycles of low-level and high-level pedestal bias to deposit copper on exposed corners and to sputter from the corners.

Abstract translation: 一种通过等离子体溅射工艺将铜填充到高纵横比通孔并允许消除电化学电镀的方法。 在本发明的一个方面，溅射被分为在不超过100℃的低温下进行的第一步骤和至少部分高晶片偏压，从而填充孔的下半部分，并且第二步骤 步骤在较高的温度例如至少200℃进行，并且至少部分低晶片偏置以完成孔填充。 在本发明的另一方面，将扩散促进气体如氢气加入到铜溅射等离子体中。 在另一方面，即使在最终填充阶段，铜溅射也是通过多个低级和高级底座偏压循环进行的，以便在暴露的拐角上沉积铜并从拐角溅射。

公开(公告)号：US20050051424A1

公开(公告)日：2005-03-10

申请号：US10939832

申请日：2004-09-13

Applicant: Jianming Fu ,  Praburam Gopalraja ,  Fusen Chen ,  John Forster

Inventor： Jianming Fu ,  Praburam Gopalraja ,  Fusen Chen ,  John Forster

IPC: C23C14/35 ,  H01J37/34 ,  C23C14/32

CPC classification number: H01J37/3455 ,  H01J37/3408

Abstract: A sputtering process and magnetron especially advantageous for low-pressure plasma sputtering or sustained self-sputtering, in which the magnetron has a reduced area but full target coverage. The magnetron includes an outer pole face surrounding an inner pole face with a gap therebetween. The outer pole of the magnetron of the invention is smaller than that of a circular magnetron similarly extending from the center to the periphery of the target and has a substantially larger total magnetic intensity. Thereby, sputtering at low pressure and high ionization fraction is enabled.

Abstract translation: 溅射工艺和磁控管对于低压等离子体溅射或持续自溅射特别有利，其中磁控管具有减小的面积但是完全的目标覆盖。 磁控管包括围绕内极面的外极面，其间具有间隙。 本发明的磁控管的外极小于圆形磁控管的外极，其类似地从靶的中心延伸到周边，并具有基本上更大的总磁场强度。 由此，可以实现低压高离子化分级的溅射。

公开(公告)号：US20050006222A1

公开(公告)日：2005-01-13

申请号：US10495506

申请日：2002-11-14

Applicant: Peijun Ding ,  Rong Tao ,  Zheng Xu ,  Daniel Lubben ,  Suraj Rengarajan ,  Michael Miller ,  Arvind Sundarrajan ,  Xianmin Tang ,  John Forster ,  Jianming Fu ,  Roderick Mosely ,  Fusen Chen ,  Praburam Gopalraja

Inventor： Peijun Ding ,  Rong Tao ,  Zheng Xu ,  Daniel Lubben ,  Suraj Rengarajan ,  Michael Miller ,  Arvind Sundarrajan ,  Xianmin Tang ,  John Forster ,  Jianming Fu ,  Roderick Mosely ,  Fusen Chen ,  Praburam Gopalraja

IPC: C23C14/04 ,  C23C14/34 ,  C23C14/35 ,  C23C14/56 ,  H01J37/32 ,  H01J37/34 ,  H01L21/285 ,  H01L21/4763 ,  H01L21/768 ,  C23C14/00 ,  C23C14/32 ,  C25B9/00

CPC classification number: C23C14/046 ,  C23C14/345 ,  C23C14/3457 ,  C23C14/35 ,  C23C14/358 ,  C23C14/564 ,  C23C14/568 ,  H01J37/321 ,  H01J37/3402 ,  H01J37/3408 ,  H01J37/3441 ,  H01J2237/3327 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76871 ,  H01L21/76873 ,  H01L21/76876 ,  H01L21/76877 ,  H01L2221/1089

Abstract: A magnetron sputter reactor (410) and its method of use, in which SIP sputtering and ICP sputtering are promoted is disclosed. In another chamber (412) an array of auxiliary magnets positioned along sidewalls (414) of a magnetron sputter reactor on a side towards the wafer from the target is disclosed. The magnetron (436) preferably is a small one having a stronger outer pole (442) of a first polarity surrounding a weaker inner pole (440) of a second polarity all on a yoke (444) and rotates about the axis (438) of the chamber using rotation means (446, 448, 450). The auxiliary magnets (462) preferably have the first polarity to draw the unbalanced magnetic field (460) towards the wafer (424), which is on a pedestal (422) supplied with power (454). Argon (426) is supplied through a valve (428). The target (416) is supplied with power (434).

Abstract translation: 公开了一种促进SIP溅射和ICP溅射的磁控溅射反应器（410）及其使用方法。 在另一个室（412）中，公开了一种辅助磁体阵列，其沿着磁控溅射反应器的侧面（414）定位，所述磁控溅射反应器在朝向晶片的一侧朝向靶。 优选地，磁控管（436）是小的，其具有第一极性的更强的外极（442），其具有围绕轭（444）的第二极性的较弱内极（440），并且围绕轴线（438）旋转 所述室使用旋转装置（446,448,450）。 辅助磁体（462）优选地具有第一极性，以将不平衡磁场（460）朝着被提供电力（454）的基座（422）上的晶片（424）拉出。 氩（426）通过阀（428）供应。 目标（416）被供电（434）。

公开(公告)号：US06514390B1

公开(公告)日：2003-02-04

申请号：US08733620

申请日：1996-10-17

Applicant: Zheng Xu ,  Fusen Chen ,  Jaim Nulman

Inventor： Zheng Xu ,  Fusen Chen ,  Jaim Nulman

IPC: C23C1435

CPC classification number: H01J37/321 ,  H01J37/3405

Abstract: A magnetic shield to reduce sputtering of an RF coil for a plasma chamber in a semiconductor fabrication system is provided. The magnetic shield also reduces deposition of material onto the coil which in turn leads to a reduction in particulate matter shed by the coil onto the workpiece.

Abstract translation: 提供了用于减少半导体制造系统中的等离子体室的RF线圈的溅射的磁屏蔽。 磁屏蔽还减少了材料在线圈上的沉积，这又导致线圈在工件上散落的颗粒物质的减少。

公开(公告)号：US06238803B1

公开(公告)日：2001-05-29

申请号：US09501566

申请日：2000-02-09

Applicant: Jianming Fu ,  Zheng Xu ,  Fusen Chen

Inventor： Jianming Fu ,  Zheng Xu ,  Fusen Chen

IPC: C23C1406

CPC classification number: H01L21/76856 ,  C23C14/0641 ,  H01L21/2855 ,  H01L21/76843

Abstract: Improved titanium nitride barrier layers are formed by depositing a first titanium layer; treating this layer with an oxygen plasma to form an oxygen-containing titanium layer thereover; depositing a titanium nitride layer over the oxygen-containing titanium layer; and treating the titanium nitride layer with an oxygen-containing plasma. Robust titanium nitride barrier layers are formed that can prevent spiking by an overlying aluminum contact layer even after heat treatment up to 550° C.

Abstract translation: 通过沉积第一钛层形成改进的氮化钛阻挡层; 用氧等离子体处理该层以在其上形成含氧钛层; 在含氧钛层上沉积氮化钛层; 并用含氧等离子体处理氮化钛层。 形成了坚固的氮化钛阻挡层，即使在高达550℃的热处理之后也可以防止由上覆的铝接触层引起的尖峰。

公开(公告)号：US5851344A

公开(公告)日：1998-12-22

申请号：US717525

申请日：1996-09-24

Applicant: Zheng Xu ,  Fusen Chen

Inventor： Zheng Xu ,  Fusen Chen

IPC: C23C14/00 ,  H01L21/203 ,  H01L21/28 ,  H01L21/768 ,  H01L21/463

CPC classification number: H01L21/76882

Abstract: A method of eliminating or substantially eliminating voids formed in the bottom of high aspect ratio holes following the physical vapor deposition of a material over the surface of a substrate. The method includes placing the substrate in an ultrasonic processing chamber filled with a fluid and having an ultrasonic source. The ultrasonic source is used to generate ultrasonic waves at a frequency no higher than is sufficient to cause a flow of the material adjacent the voids into these voids, without significantly affecting the deposited material elsewhere on the substrate.

Abstract translation: 在材料表面上物理气相沉积之后，消除或基本消除在高纵横比孔的底部形成的空隙。 该方法包括将衬底放置在填充有流体并具有超声波源的超声处理室中。 超声波源用于产生超过足以导致邻近空隙的材料流入这些空隙中的频率的超声波，而不会显着影响衬底上其它地方的沉积材料。

公开(公告)号：US5391520A

公开(公告)日：1995-02-21

申请号：US139268

申请日：1993-10-18

Applicant: Fusen Chen ,  Fu-Tai Liou ,  Girish Dixit

Inventor： Fusen Chen ,  Fu-Tai Liou ,  Girish Dixit

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532 ,  H01L21/283 ,  H01L21/302

CPC classification number: H01L23/53257 ,  H01L21/76889 ,  H01L2924/0002 ,  Y10S148/019 ,  Y10S257/915

Abstract: A method for fabrication of local interconnects in an integrated circuit, and an integrated circuit formed according to the same, is disclosed. According to the disclosed embodiment, a first and a second conductive structure are formed over the integrated circuit. An insulating layer is formed over the integrated. A first photoresist layer is formed over the insulating layer, patterned and developed. The insulating layer is etched to expose selected regions of the first and second conductive structures. A refractory metal layer is formed over the integrated circuit. A barrier layer is formed over the refractory metal layer, and optionally a refractory metal silicide layer is formed over the barrier layer. A second photoresist layer is formed over the barrier layer, patterned and developed. The refractory metal layer and barrier layer, and the refractory metal silicide layer if formed, are etched to define a conductive interconnect between the exposed selected regions of the first and second conductive structures.

Abstract translation: 公开了一种用于制造集成电路中的局部互连的方法，以及根据该集成电路形成的集成电路。 根据所公开的实施例，在集成电路上形成第一和第二导电结构。 在整合上形成绝缘层。 第一光致抗蚀剂层形成在绝缘层上，被图案化和显影。 蚀刻绝缘层以暴露第一和第二导电结构的选定区域。 在集成电路上形成难熔金属层。 在耐火金属层之上形成阻挡层，并且可选地在阻挡层上形成难熔金属硅化物层。 第二光致抗蚀剂层形成在阻挡层上，被图案化和显影。 难熔金属层和阻挡层以及如果形成的难熔金属硅化物层被蚀刻以在第一和第二导电结构的暴露的选定区域之间限定导电互连。