摘要:
A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
摘要:
A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
摘要:
A semiconductor package includes: a semiconductor chip having a first surface, and a second surface that is opposite to the first surface and allows a semiconductor device to be formed thereon; bonding pads disposed on the second surface of the semiconductor chip; and a metal ion barrier layer disposed on the first surface of the semiconductor chip, and preventing metal ions from penetrating into the semiconductor chip through the first surface of the semiconductor chip. Accordingly, the semiconductor package can obtain a superior semiconductor device by minimizing moisture absorption and effectively blocking the penetration of metal ions.
摘要:
Provided are mutant strains derived from Escherichia sp. GPU1114 (Accession No. KCCM-10536), having cumulative inactivation of deoD, aphA, appA, and hprt genes, and methods of using the same.
摘要:
A novel alkaline protease VapK suitable for a laundry detergent is disclosed. The gene vapk coding for the protease VapK, the recombinant plasmids containing said gene, and the transformed V. metshnikovii KS1 (pSBCm) with said recombinant plasmid are also disclosed. In addition, a process for producing the protease VapK is disclosed.
摘要:
Disclosed herein are ammonia-specific 5′-XMP aminase mutants and a method for preparing the same. A mutation is introduced into the active site of glutamine-dependent catalysis in 5′-XMP aminase. The resulting 5′-XMP aminase mutant is devoid of the glutamine-dependent activity and specifically reacts with external ammonia in converting 5′-XMP into 5′-GMP. Thus, the ammonia-specific 5′-XMP aminase mutant is stabler within cells compared to the wild type, and can be useful in the industrial conversion of 5′-XMP into 5′-GMP.
摘要:
Disclosed herein are ammonia-specific 5′-XMP aminase mutants and a method for preparing the same. A mutation is introduced into the active site of glutamine-dependent catalysis in 5′-XMP aminase. The resulting 5′-XMP aminase mutant is devoid of the glutamine-dependent activity and specifically reacts with external ammonia in converting 5′-XMP into 5′-GMP. Thus, the ammonia-specific 5′-XMP aminase mutant is stabler within cells compared to the wild type, and can be useful in the industrial conversion of 5′-XMP into 5′-GMP.
摘要:
A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
摘要:
A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
摘要:
A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.