公开(公告)号：US08940148B2

公开(公告)日：2015-01-27

申请号：US12820516

申请日：2010-06-22

申请人： Ali Afzali-Ardakani ,  Stefan Harrer ,  Binquan Luan ,  Glenn J. Martyna ,  Dennis M. Newns ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Gustavo Stolovitzky

发明人： Ali Afzali-Ardakani ,  Stefan Harrer ,  Binquan Luan ,  Glenn J. Martyna ,  Dennis M. Newns ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Gustavo Stolovitzky

IPC分类号： B03C5/02 ,  G01N33/487 ,  B01L3/00 ,  B82Y15/00

CPC分类号： G01N27/44756 ,  B01L3/502761 ,  B01L2200/0663 ,  B01L2300/0645 ,  B01L2300/0816 ,  B01L2300/0896 ,  B01L2400/0421 ,  B01L2400/0424 ,  B82Y15/00 ,  G01N27/447 ,  G01N27/44791 ,  G01N33/48721

摘要： The present invention provides a nano-fluidic field effective device. The device includes a channel having a first side and a second side, a first set of electrodes adjacent to the first side, a second set of electrodes adjacent to the second side, a control unit for applying electric potentials to the electrodes and a fluid within the channel containing a charge molecule. The first set of electrodes is disposed such that application of electric potentials produces a spatially varying electric field that confines a charged molecule within a predetermined area of said channel. The second set of electrodes is disposed such that application of electric potentials relative to the electric potentials applied to the first set of electrodes creates an electric field that confines the charged molecule to an area away from the second side of the channel.

摘要翻译： 本发明提供一种纳米流体场有效装置。 该装置包括具有第一侧和第二侧的通道，与第一侧相邻的第一组电极，与第二侧相邻的第二组电极，用于向电极施加电势的控制单元和 该通道含有电荷分子。 第一组电极被布置成使得施加电势产生空间变化的电场，该电场将带电分子限制在所述通道的预定区域内。 第二组电极被布置成使得施加相对于施加到第一组电极的电位的电势产生将带电分子限制在远离通道的第二侧的区域的电场。

公开(公告)号：US08404589B2

公开(公告)日：2013-03-26

申请号：US12754912

申请日：2010-04-06

申请人： Andrew J. Kellock ,  Christian Lavoie ,  Ahmet Ozcan ,  Stephen Rossnagel ,  Bin Yang ,  Zhen Zhang ,  Yu Zhu ,  Stefan Zollner

发明人： Andrew J. Kellock ,  Christian Lavoie ,  Ahmet Ozcan ,  Stephen Rossnagel ,  Bin Yang ,  Zhen Zhang ,  Yu Zhu ,  Stefan Zollner

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L29/66795 ,  H01L29/785 ,  H01L2029/7858 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming a silicide contact includes depositing a metal layer on silicon such that the metal layer intermixes with the silicon to form an intermixed region on the silicon; removing an unintermixed portion of the metal layer from the intermixed region; and annealing the intermixed region to form a silicide contact on the silicon. A semiconductor device comprising a silicide contact located over a silicon layer of the semiconductor device, the silicide contact comprising nickel (Ni) and silicon (Si) and having Ni amount equivalent to a thickness of about 21 angstroms or less.

摘要翻译： 形成硅化物接触的方法包括在硅上沉积金属层，使得金属层与硅混合以在硅上形成混合区; 从所述混合区域去除所述金属层的未混合部分; 并且对所述混合区进行退火以在所述硅上形成硅化物接触。 一种半导体器件，包括位于所述半导体器件的硅层上方的硅化物触点，所述硅化物触点包含镍（Ni）和硅（Si），并且具有相当于约21埃或更小的厚度的Ni量。

公开(公告)号：US20090014878A1

公开(公告)日：2009-01-15

申请号：US12130381

申请日：2008-05-30

申请人： Cyril Cabral, JR. ,  Hariklia Deligianni ,  Randolph F. Knarr ,  Sandra G. Malhotra ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Anna Topol ,  Philippe M. Vereecken

发明人： Cyril Cabral, JR. ,  Hariklia Deligianni ,  Randolph F. Knarr ,  Sandra G. Malhotra ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Anna Topol ,  Philippe M. Vereecken

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/485 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/53252 ,  H01L2924/0002 ,  H01L2924/00

摘要： A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and making contact to the silicide or germanide layer on the bottom; a diffusion barrier layer located on top of the contact layer and inside the cavities; optionally a seed layer for plating located on top of the barrier layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer is electrodeposited with at least one member selected from the group consisting of copper, rhodium, ruthenium, iridium, molybdenum, gold, silver, nickel, cobalt, silver, gold, cadmium and zinc and alloys thereof. When the metal fill layer is rhodium, ruthenium, or iridium, an effective diffusion barrier layer is not required between the fill metal and the dielectric. When the barrier layer is platable, such as ruthenium, rhodium, platinum, or iridium, the seed layer is not required.

摘要翻译： 一种接触式冶金结构，包括在基底上具有空腔的图案化电介质层; 位于空腔底部的硅化物或锗化物层，例如钴和/或镍; 接触层，其包含位于介电层顶部并且在空腔内并与底部的硅化物或锗化物层接触的Ti或Ti / TiN; 位于所述接触层顶部和所述空腔内的扩散阻挡层; 可选地，位于阻挡层顶部的用于电镀的种子层; 提供通孔中的金属填充层以及制造方法。 金属填充层用选自铜，铑，钌，铱，钼，金，银，镍，钴，银，金，镉和锌中的至少一种电池和其合金电沉积。 当金属填充层是铑，钌或铱时，在填充金属和电介质之间不需要有效的扩散阻挡层。 当阻挡层是可镀的，例如钌，铑，铂或铱时，不需要种子层。

公开(公告)号：US20060264048A1

公开(公告)日：2006-11-23

申请号：US11461220

申请日：2006-07-31

申请人： Cyril Cabral ,  Steffen Kaldor ,  Hyungjun Kim ,  Stephen Rossnagel

发明人： Cyril Cabral ,  Steffen Kaldor ,  Hyungjun Kim ,  Stephen Rossnagel

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76843 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an interconnect structure of an integrated circuit, a diffusion barrier film in a damascene structure is formed of a film having the composition TaNx, where x is greater than 1.2 and with a thickness of 0.5 to 5 nm.

摘要翻译： 在集成电路的互连结构中，镶嵌结构中的扩散阻挡膜由具有组成TaN x x的膜形成，其中x大于1.2，厚度为0.5至5nm 。

公开(公告)号：US20050112862A1

公开(公告)日：2005-05-26

申请号：US10707119

申请日：2003-11-21

申请人： Lawrence Clevenger ,  Andrew Cowley ,  Timothy Dalton ,  Mark Hoinkis ,  Steffen Kaldor ,  Kaushik Kumar ,  Stephen Rossnagel ,  Andrew Simon ,  Douglas La Tulipe

发明人： Lawrence Clevenger ,  Andrew Cowley ,  Timothy Dalton ,  Mark Hoinkis ,  Steffen Kaldor ,  Kaushik Kumar ,  Stephen Rossnagel ,  Andrew Simon ,  Douglas La Tulipe

IPC分类号： G03F9/00 ,  H01L21/033 ,  H01L21/285 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/544

CPC分类号： H01L23/544 ,  G03F9/7076 ,  G03F9/708 ,  G03F9/7084 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/2855 ,  H01L21/76841 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A hardmask layer in the back end of an integrated circuit is formed from TaN having a composition of less than 50% Ta and a resistivity greater than 400 μOhm-cm, so that it is substantially transparent in the visible and permits visual alignment of upper and lower alignment marks through the hardmask and intervening layer(s) of ILD. A preferred method of formation of the hardmask is by sputter deposition of Ta in an ambient containing N2 and a flow rate such that (N2 flow)/(N2+carrier flow)>0.5.

摘要翻译： 集成电路后端的硬掩模层由具有小于50％Ta且电阻率大于400μΩ·cm的组成的TaN形成，使得其在可见光中基本上是透明的并且允许上和 通过硬掩模和ILD的中间层降低对准标记。 形成硬掩模的优选方法是通过在含有N 2 O 2的环境中溅射沉积Ta并使流速使得（N 2 N 2 O 2）/（N _{2 +载体流）> 0.5。}

公开(公告)号：US08354336B2

公开(公告)日：2013-01-15

申请号：US12820543

申请日：2010-06-22

申请人： Ali Afzali-Ardakani ,  Shafaat Ahmed ,  Hariklia Deligianni ,  Dario L. Goldfarb ,  Stefan Harrer ,  Binquan Luan ,  Glenn J. Martyna ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Gustavo A. Stolovitzky

发明人： Ali Afzali-Ardakani ,  Shafaat Ahmed ,  Hariklia Deligianni ,  Dario L. Goldfarb ,  Stefan Harrer ,  Binquan Luan ,  Glenn J. Martyna ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Gustavo A. Stolovitzky

IPC分类号： H01L21/28 ,  H01L21/3205

CPC分类号： B82Y10/00 ,  H01L21/76834 ,  H01L29/0665 ,  H01L51/0093 ,  H01L51/0504 ,  H01L51/102

摘要： Accordingly, the present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A substrate which has a conductive layer disposed thereon is provided and the conductive layer has an oxide layer with an exposed surface. The exposed surface of the oxide layer contacts a solution of an organic surface active compound in an organic solvent to form a protective layer of the organic surface active compound over the oxide layer. The protective layer has a thickness of from about 0.5 nm to about 5 nm and ranges therebetween depending on a chemical structure of the surface active compound.

摘要翻译： 因此，本发明提供一种在其表面上形成具有降低的腐蚀和水分解的电极的方法。 提供了具有设置在其上的导电层的衬底，并且导电层具有具有暴露表面的氧化物层。 氧化物层的暴露表面接触有机表面活性化合物在有机溶剂中的溶液，以在氧化物层上形成有机表面活性化合物的保护层。 根据表面活性化合物的化学结构，保护层的厚度为约0.5nm至约5nm，并且其范围。

公开(公告)号：US20110308969A1

公开(公告)日：2011-12-22

申请号：US12820574

申请日：2010-06-22

申请人： Ali Afzali-Azdakani ,  Shafaat Ahmed ,  Hariklia Deligianni ,  Stefan Harrer ,  Binquan Luan ,  Glenn J. Martyna ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Gustavo A. Stolovitzky

发明人： Ali Afzali-Azdakani ,  Shafaat Ahmed ,  Hariklia Deligianni ,  Stefan Harrer ,  Binquan Luan ,  Glenn J. Martyna ,  Hongbo Peng ,  Stanislav Polonsky ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Gustavo A. Stolovitzky

IPC分类号： G01N17/04

CPC分类号： G01N17/04

摘要： The present invention provides a method of reducing corrosion and water decomposition on a surface of an electrode having a titanium nitride conductive layer disposed on a substrate and estimating extent of reduction thereof. The electrode is immersed into a solution containing a hydroxyl-functional compound. Thereafter, a voltage is applied to the titanium nitride conductive layer of the electrode. The extent of oxidation of the titanium nitride conductive layer is correlated with the extent of formation of oxide of titanium nitride and/or the extent of oxidation of the titanium nitride conductive layer is correlated with the increase of surface roughness. The extent of water decomposition is correlated with formation of hydrogen and oxygen bubbles.

摘要翻译： 本发明提供了在具有设置在基板上的具有氮化钛导电层的电极的表面上减少腐蚀和水分解的方法，并且估计其还原程度。 将电极浸入含有羟基官能化合物的溶液中。 然后，向电极的氮化钛导电层施加电压。 氮化钛导电层的氧化程度与氮化钛的氧化物的形成程度和/或氮化钛导电层的氧化程度与表面粗糙度的增加有关。 水分解的程度与氢气和氧气泡的形成有关。

公开(公告)号：US07405154B2

公开(公告)日：2008-07-29

申请号：US11308433

申请日：2006-03-24

申请人： Cyril Cabral, Jr. ,  Hariklia Deligianni ,  Randolph F. Knarr ,  Sandra G. Malhotra ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Anna Topol ,  Philippe M. Vereecken

发明人： Cyril Cabral, Jr. ,  Hariklia Deligianni ,  Randolph F. Knarr ,  Sandra G. Malhotra ,  Stephen Rossnagel ,  Xiaoyan Shao ,  Anna Topol ,  Philippe M. Vereecken

IPC分类号： H01L21/4763

CPC分类号： H01L23/485 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76877 ,  H01L23/53252 ,  H01L2924/0002 ,  H01L2924/00

摘要： A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and making contact to the silicide or germanide layer on the bottom; a diffusion barrier layer located on top of the contact layer and inside the cavities; optionally a seed layer for plating located on top of the barrier layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer is electrodeposited with at least one member selected from the group consisting of copper, rhodium, ruthenium, iridium, molybdenum, gold, silver, nickel, cobalt, silver, gold, cadmium and zinc and alloys thereof. When the metal fill layer is rhodium, ruthenium, or iridium, an effective diffusion barrier layer is not required between the fill metal and the dielectric. When the barrier layer is platable, such as ruthenium, rhodium, platinum, or iridium, the seed layer is not required.

摘要翻译： 一种接触式冶金结构，包括在基底上具有空腔的图案化电介质层; 位于空腔底部的硅化物或锗化物层，例如钴和/或镍; 接触层，其包含位于介电层顶部并且在空腔内并与底部的硅化物或锗化物层接触的Ti或Ti / TiN; 位于所述接触层顶部和所述空腔内的扩散阻挡层; 可选地，位于阻挡层顶部的用于电镀的种子层; 提供通孔中的金属填充层以及制造方法。 金属填充层用选自铜，铑，钌，铱，钼，金，银，镍，钴，银，金，镉和锌中的至少一种电池和其合金电沉积。 当金属填充层是铑，钌或铱时，在填充金属和电介质之间不需要有效的扩散阻挡层。 当阻挡层是可镀的，例如钌，铑，铂或铱时，不需要种子层。

公开(公告)号：US20050118807A1

公开(公告)日：2005-06-02

申请号：US10724438

申请日：2003-11-28

申请人： Hyungiun Kim ,  Stephen Rossnagel

发明人： Hyungiun Kim ,  Stephen Rossnagel

IPC分类号： C23C16/18 ,  H01L21/285 ,  H01L21/768 ,  H01L23/532 ,  H01L21/44 ,  H01L21/302 ,  H01L21/461 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76843 ,  C23C16/18 ,  C23C16/45525 ,  C23C16/45529 ,  C23C16/45542 ,  H01L21/28562 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method to deposit nucleation problem free ruthenium by ALD. The nucleation problem free, relatively smooth ruthenium ALD film is deposited by the use of plasma-enhanced ALD of ruthenium underlay for consequent thermal ruthenium ALD layer. In addition, oxygen or nitrogen plasma treatments of SiO2 or other dielectrics leads to uniform ALD ruthenium deposition. The method has application as a direct plating layer for a copper interconnect or metal gate structure for advanced CMOS devices.

摘要翻译： 通过ALD沉积成核问题的无钌钌的方法。 通过使用等离子体增强的钌底层ALD沉积成核问题，比较平滑的钌ALD膜，用于随后的热钌ALD层。 此外，SiO 2或其他电介质的氧或氮等离子体处理导致均匀的ALD钌沉积。 该方法作为用于铜互连的直接电镀层或用于高级CMOS器件的金属栅极结构的应用。

公开(公告)号：US20120301706A1

公开(公告)日：2012-11-29

申请号：US13568808

申请日：2012-08-07

申请人： Andrew J. Kellock ,  Hyungjun Kim ,  Dae-Gyu Park ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Stephen Rossnagel ,  Oscar Van Der Straten

发明人： Andrew J. Kellock ,  Hyungjun Kim ,  Dae-Gyu Park ,  Satyanarayana V. Nitta ,  Sampath Purushothaman ,  Stephen Rossnagel ,  Oscar Van Der Straten

IPC分类号： C23C16/50 ,  B32B3/26

CPC分类号： C23C16/45536 ,  C23C16/36 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02315 ,  H01L21/3141 ,  H01L21/3148 ,  H01L21/31695 ,  H01L21/3185 ,  H01L21/76826 ,  H01L21/76831 ,  Y10T428/24999

摘要： A method of depositing a SiNxCy liner on a porous low thermal conductivity (low-k) substrate by plasma-enhanced atomic layer deposition (PE-ALD), which includes forming a SiNxCy liner on a surface of a low-k substrate having pores on a surface thereon, in which the low-k substrate is repeatedly exposed to a aminosilane-based precursor and a plasma selected from nitrogen, hydrogen, oxygen, helium, and combinations thereof until a thickness of the liner is obtained, and wherein the liner is prevented from penetrating inside the pores of a surface of the substrate. A porous low thermal conductivity substrate having a SiNxCy liner formed thereon by the method is also disclosed.

摘要翻译： 一种通过等离子体增强原子层沉积（PE-ALD）在多孔低热导率（低k）衬底上沉积SiNxCy衬垫的方法，其包括在具有孔的低k衬底的表面上形成SiN xCy衬垫 其中低k衬底反复暴露于基于氨基硅烷的前体和选自氮，氢，氧，氦及其组合的等离子体，直到获得衬垫的厚度，并且其中衬垫是 防止在基板的表面的孔内渗透。 还公开了通过该方法在其上形成SiN xCy衬垫的多孔低热导率衬底。