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公开(公告)号：US08766107B2
公开(公告)日：2014-07-01
申请号：US13446727
申请日：2012-04-13
Applicant: Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
Inventor： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
IPC: H05K1/11
CPC classification number: H05K3/0094 , H05K1/0234 , H05K1/0242 , H05K1/0251 , H05K1/09 , H05K1/167 , H05K3/0047 , H05K3/244 , H05K3/429 , H05K2201/0391 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , Y10T156/1057 , Y10T428/12528
Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.
Abstract translation: 描述了例如多层印刷电路板（“PCB”），以及制造和使用这种包括层压层的PCB的方法; 穿过层压体层的至少一个通孔，以及包含在通孔内的通孔导体，所述通孔导体包括使用部分和未使用部分，所述通孔导体包括涂覆有电导率低于 铜。
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公开(公告)号：US08568244B2
公开(公告)日：2013-10-29
申请号：US13023837
申请日：2011-02-09
Applicant: Tae Hong Kim , Hun Hee Lee , Il Hun Ryu , Jose Da Silva
Inventor： Tae Hong Kim , Hun Hee Lee , Il Hun Ryu , Jose Da Silva
IPC: F16D3/205
CPC classification number: F16D3/2055
Abstract: A constant velocity joint for a drive system comprises: a tripod housing coupled to the first rotating shaft and having a plurality of guide grooves therein, each guide groove extending in an axial direction of the tripod housing; a spider coupled to the second rotating shaft and having a plurality of trunnions, each trunnion positioned in a corresponding guide groove of the tripod housing; and a spherical roller disposed between the trunnion and the guide groove of the tripod housing, and a plurality of needle rollers disposed between the trunnion and spherical roller. Each spherical roller is in angular contact with the guide groove of the tripod housing with two contact points displaced relative to a pitch circle diameter line of the tripod housing. The ratio of the length (CL) between two contact points of tripod housing groove to the length (SL) between two edges of spherical roller is between 0.5 and 0.85, and the ratio of the radius (TGR2) of the guide groove of the tripod housing to the radius (SRR) of the spherical roller is between 1.1 and 1.4.
Abstract translation: 用于驱动系统的恒速接头包括：三脚架壳体，其联接到第一旋转轴并且在其中具有多个引导槽，每个引导槽沿三角架壳体的轴向方向延伸; 一个与所述第二旋转轴相连并且具有多个耳轴的蜘蛛，每个耳轴位于所述三脚架壳体的对应引导槽中; 以及设置在三角架壳体的耳轴和引导槽之间的球面滚子，以及设置在耳轴和球面滚子之间的多个滚针。 每个球面滚子与三脚架壳体的引导槽成角度接触，两个接触点相对于三脚架外壳的节圆直径线移动。 三脚架壳体槽的两个接触点与球面滚子的两个边缘之间的长度（SL）之间的长度（CL）的比率在0.5和0.85之间，并且三脚架的引导槽的半径（TGR2） 外壳到球面滚子的半径（SRR）在1.1和1.4之间。
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3.发明授权公开(公告)号：US08558345B2
公开(公告)日：2013-10-15
申请号：US12614883
申请日：2009-11-09
Applicant: Tae Hong Kim , Edmund J. Sprogis , Michael F. McAllister , Michael J. Shapiro
Inventor： Tae Hong Kim , Edmund J. Sprogis , Michael F. McAllister , Michael J. Shapiro
IPC: H01L27/108 , H01L29/94 , H01L23/04 , H01L21/02
CPC classification number: H01L28/40 , H01L21/76898 , H01L23/481 , H01L23/49827 , H01L23/642 , H01L24/16 , H01L25/0657 , H01L2224/13025 , H01L2225/06513 , H01L2225/06541 , H01L2924/01078 , H01L2924/10253 , H01L2924/12044 , H01L2924/1301 , H01L2924/1305 , H01L2924/15311 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00
Abstract: A capacitor in a semiconductor substrate employs a conductive through-substrate via (TSV) as an inner electrode and a columnar doped semiconductor region as an outer electrode. The capacitor provides a large decoupling capacitance in a small area, and does not impact circuit density or a Si3D structural design. Additional conductive TSV's can be provided in the semiconductor substrate to provide electrical connection for power supplies and signal transmission therethrough. The capacitor has a lower inductance than a conventional array of capacitors having comparable capacitance, thereby enabling reduction of high frequency noise in the power supply system of stacked semiconductor chips.
Abstract translation: 半导体衬底中的电容器采用导电贯穿衬底通孔（TSV）作为内部电极和柱状掺杂半导体区域作为外部电极。 电容器在小面积上提供大的去耦电容，并且不影响电路密度或Si3D结构设计。 可以在半导体衬底中提供附加的导电TSV，以提供用于电源和通过其的信号传输的电连接。 电容器具有比具有相当电容的传统电容器阵列更低的电感，从而能够降低层叠半导体芯片的电源系统中的高频噪声。
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4.发明授权公开(公告)号：US08288660B2
公开(公告)日：2012-10-16
申请号：US12244854
申请日：2008-10-03
Applicant: Tae Hong Kim
Inventor： Tae Hong Kim
IPC: H05K1/11
CPC classification number: H05K1/0236 , H05K2201/09309 , H05K2201/09518 , H05K2201/09663 , Y10T29/49155
Abstract: The stopband characteristics of an electromagnetic bandgap structure in a printed circuit board may be preserved by selectively forming slots in an additional conductive layer of the printed circuit board. For example, an electromagnetic bandgap structure may include a layer with a continuous conductive region and another layer with a periodically patterned region having a plurality of spaced-apart patches interconnected by branches. Additional conductive layers may be included within the printed circuit board without neutralizing the bandgap by forming slots in the conductive layers in general alignment with spaces between the patches.
Abstract translation: 可以通过在印刷电路板的附加导电层中选择性地形成槽来保留印刷电路板中的电磁带隙结构的阻带特性。 例如，电磁带隙结构可以包括具有连续导电区域的层和具有周期性图案化区域的另一层，其具有通过分支互连的多个间隔开的贴片。 附加的导电层可以包括在印刷电路板中，而不会通过在导电层中形成与填隙之间的空间对准的槽而中和带隙。
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公开(公告)号：US20120020042A1
公开(公告)日：2012-01-26
申请号：US12840861
申请日：2010-07-21
Applicant: Nickolaus J. Gruendler , Paul M. Harvey , Tae Hong Kim , Sang Y. Lee , Michael J. Shapiro
Inventor： Nickolaus J. Gruendler , Paul M. Harvey , Tae Hong Kim , Sang Y. Lee , Michael J. Shapiro
CPC classification number: G01L9/12 , H01L2224/16227 , H01L2224/16235 , H01L2924/1531 , H01L2924/3025 , H05K1/0228 , H05K1/0231 , H05K1/0251 , Y10T29/49139 , Y10T29/49142
Abstract: One or more decoupling capacitors are coupled to a low inductance mount that is connected to the bottom layer of a printed circuit board (PCB) on which a semiconductor module is mounted. The low inductance mount includes a magnetic planar structure with vias that are coupled to the one or more decoupling capacitors and to like vias positioned on the PCB.
Abstract translation: 一个或多个去耦电容器耦合到低电感安装座，该低电感安装件连接到其上安装有半导体模块的印刷电路板（PCB）的底层。 低电感安装座包括磁性平面结构，其具有耦合到一个或多个去耦电容器的过孔以及位于PCB上的相似通孔。
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Patent Agency Ranking
公开(公告)号：US08060457B2
公开(公告)日：2011-11-15
申请号：US11854997
申请日：2007-09-13
Applicant: Tae Hong Kim , Ege Engin , Madhavan Swaminathan
Inventor： Tae Hong Kim , Ege Engin , Madhavan Swaminathan
CPC classification number: G06F17/5068
Abstract: The present invention describes methods and apparatus for electromagnetic band gap structure synthesis. An exemplary embodiment of the present invention provides a method of electromagnetic band gap structure synthesis, which includes the step of providing a set of desired characteristics for an electromagnetic band gap structure. Furthermore, the method includes generating populations of patch shape members with a genetic algorithm routine and solving one or more of patch shape members of the populations with an electrodynamics modeling technique. Thereafter, the method includes the step of converting the output of the electrodynamics modeling technique into a set of response data for one or more of the patch shape members and calculating a fitness level for one or more of the sets of response data in comparison to the set of desired characteristics for the electromagnetic band gap structure. Next, the method includes the step of determining whether the fitness level of one of the patch shape members is within a predetermined tolerance. Subsequently, if none of the patch shape members provides a fitness level within the predetermined tolerance, then the steps of generating, solving, converting, calculating, and determining are repeated.
Abstract translation: 本发明描述了用于电磁带隙结构合成的方法和装置。 本发明的一个示例性实施例提供了一种电磁带隙结构合成方法，其包括为电磁带隙结构提供一组所需特性的步骤。 此外，该方法包括使用遗传算法程序生成斑块形状成员的群体，并用电动力学建模技术解决群体中的一个或多个斑块形状成员。 此后，该方法包括以下步骤：将电动力学建模技术的输出转换成用于一个或多个补片形状构件的一组响应数据，并计算一组或多组响应数据的适应度水平，与 设置电磁带隙结构的所需特性。 接下来，该方法包括以下步骤：确定一个贴片形状构件的适合度是否在预定的容限内。 随后，如果贴片形状构件中没有一个在预定公差内提供适合度，则重复生成，求解，转换，计算和确定的步骤。
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公开(公告)号：US20110222224A1
公开(公告)日：2011-09-15
申请号：US12720386
申请日：2010-03-09
Applicant: Kevin Bills , Mahesh Bohra , Jinwoo Choi , Tae Hong Kim , Rohan Mandrekar
Inventor： Kevin Bills , Mahesh Bohra , Jinwoo Choi , Tae Hong Kim , Rohan Mandrekar
CPC classification number: H01L23/49822 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L24/16 , H01L2224/16 , H01L2224/16235 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/3011 , H05K1/0231 , H05K1/024 , H05K1/0251 , H05K1/113 , H05K1/144 , H05K2201/0187 , H05K2201/041 , H05K2201/09481 , H05K2201/09718 , H05K2201/10734 , Y10T29/49124 , Y10T29/49151 , H01L2924/00
Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.
Abstract translation: 多层互连衬底具有至少两个间隔开的金属层，每个金属层上具有导电焊盘。 在金属层之间放置两种不同类型的绝缘层。 这种放置使得两种不同类型的绝缘层中的一种被放置在导电焊盘之间，另一种类型的绝缘层被放置在两个间隔开的金属层之间。
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8.发明申请INTEGRATED DECOUPLING CAPACITOR EMPLOYING CONDUCTIVE THROUGH-SUBSTRATE VIAS 有权采用导电穿透基板VIAS的集成式解除电容器公开(公告)号：US20110108948A1
公开(公告)日：2011-05-12
申请号：US12614883
申请日：2009-11-09
Applicant: Tae Hong Kim , Edmund J. Sprogis , Michael F. McAllister , Michael J. Shapiro
Inventor： Tae Hong Kim , Edmund J. Sprogis , Michael F. McAllister , Michael J. Shapiro
IPC: H01L29/92 , H01L21/02 , H01L21/768
CPC classification number: H01L28/40 , H01L21/76898 , H01L23/481 , H01L23/49827 , H01L23/642 , H01L24/16 , H01L25/0657 , H01L2224/13025 , H01L2225/06513 , H01L2225/06541 , H01L2924/01078 , H01L2924/10253 , H01L2924/12044 , H01L2924/1301 , H01L2924/1305 , H01L2924/15311 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00
Abstract: A capacitor in a semiconductor substrate employs a conductive through-substrate via (TSV) as an inner electrode and a columnar doped semiconductor region as an outer electrode. The capacitor provides a large decoupling capacitance in a small area, and does not impact circuit density or a Si3D structural design. Additional conductive TSV's can be provided in the semiconductor substrate to provide electrical connection for power supplies and signal transmission therethrough. The capacitor has a lower inductance than a conventional array of capacitors having comparable capacitance, thereby enabling reduction of high frequency noise in the power supply system of stacked semiconductor chips.
Abstract translation: 半导体衬底中的电容器采用导电贯穿衬底通孔（TSV）作为内部电极和柱状掺杂半导体区域作为外部电极。 电容器在小面积上提供大的去耦电容，并且不影响电路密度或Si3D结构设计。 可以在半导体衬底中提供附加的导电TSV，以提供用于电源和通过其的信号传输的电连接。 电容器具有比具有相当电容的传统电容器阵列更低的电感，从而能够降低层叠半导体芯片的电源系统中的高频噪声。
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公开(公告)号：US20110073359A1
公开(公告)日：2011-03-31
申请号：US12570029
申请日：2009-09-30
Applicant: Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
Inventor： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
CPC classification number: H05K3/0094 , H05K1/0234 , H05K1/0242 , H05K1/0251 , H05K1/09 , H05K1/167 , H05K3/0047 , H05K3/244 , H05K3/429 , H05K2201/0391 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , Y10T156/1057 , Y10T428/12528
Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.
Abstract translation: 描述了例如多层印刷电路板（“PCB”），以及制造和使用这种包括层压层的PCB的方法; 穿过层压体层的至少一个通孔，以及包含在通孔内的通孔导体，所述通孔导体包括使用部分和未使用部分，所述通孔导体包括涂覆有电导率低于 铜。
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10.发明申请公开(公告)号：US20100084176A1
公开(公告)日：2010-04-08
申请号：US12244854
申请日：2008-10-03
Applicant: Tae Hong Kim
Inventor： Tae Hong Kim
CPC classification number: H05K1/0236 , H05K2201/09309 , H05K2201/09518 , H05K2201/09663 , Y10T29/49155
Abstract: The stopband characteristics of an electromagnetic bandgap structure in a printed circuit board may be preserved by selectively forming slots in an additional conductive layer of the printed circuit board. For example, an electromagnetic bandgap structure may include a layer with a continuous conductive region and another layer with a periodically patterned region having a plurality of spaced-apart patches interconnected by branches. Additional conductive layers may be included within the printed circuit board without neutralizing the bandgap by forming slots in the conductive layers in general alignment with spaces between the patches.
Abstract translation: 可以通过在印刷电路板的附加导电层中选择性地形成槽来保留印刷电路板中的电磁带隙结构的阻带特性。 例如，电磁带隙结构可以包括具有连续导电区域的层和具有周期性图案化区域的另一层，其具有通过分支互连的多个间隔开的贴片。 附加的导电层可以包括在印刷电路板中，而不会通过在导电层中形成与填隙之间的空间对准的槽而中和带隙。
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