公开(公告)号：US08435839B2

公开(公告)日：2013-05-07

申请号：US12320316

申请日：2009-01-23

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L21/00

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10161 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacturing a semiconductor device which can reduce the number of times of resin-injection, thereby facilitating the miniaturization of the semiconductor device, and the semiconductor device. After resin is injected into a space between at least two second semiconductor chips flip-chip joined to a first semiconductor chip through an injection opening, the resin is hardened.

公开(公告)号：US07781880B2

公开(公告)日：2010-08-24

申请号：US12591396

申请日：2009-11-18

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L25/065

CPC分类号： H01L25/50 ,  H01L21/6835 ,  H01L23/552 ,  H01L24/81 ,  H01L24/86 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2223/6627 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor package according to the present invention includes a substrate; first and second semiconductor chips mounted on a first surface of the substrate; and a heat-radiation sheet. The heat-radiation sheet includes a heat-transferable conductive layer and first and second insulating layers formed on top and bottom surfaces of the heat-transferable conductive layer, respectively. The heat-radiation sheet includes a first portion arranged between the first semiconductor chip and the second semiconductor chip; and a second portion extending at least a side of the first portion. The second portion is connected to the substrate. The second insulating layer of the second portion is formed to expose a part of the heat-transferable conductive layer.

摘要翻译： 根据本发明的半导体封装包括基板; 安装在基板的第一表面上的第一和第二半导体芯片; 和散热片。 散热片包括分别在可热转印导电层的顶表面和底表面上形成的可传热导电层和第一和第二绝缘层。 散热片包括布置在第一半导体芯片和第二半导体芯片之间的第一部分; 以及延伸至第一部分的至少一侧的第二部分。 第二部分连接到基板。 形成第二部分的第二绝缘层以暴露部分可热转移导电层。

公开(公告)号：US20100038017A1

公开(公告)日：2010-02-18

申请号：US12461088

申请日：2009-07-31

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： B32B37/06

CPC分类号： H04N5/2253 ,  G02B7/025 ,  H01L27/14618 ,  H01L27/14625 ,  H01L31/02325 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2924/00014 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： There is provided a method of manufacturing a camera module including a sensor package having an image pickup element, and a lens configuration in which a lens holder, and a receptacle accommodating the sensor package are integrally formed, the sensor package being fixed within the receptacle, the method including: applying a photo-curing resin to predetermined portions of the receptacle; performing alignment of a relative position of the sensor package to the lens configuration; a first joining whereby the photo-curing resin is cured so that the sensor package is fixed within the receptacle while maintaining the relative position of the sensor package to the lens configuration; and a second joining whereby a thermosetting resin is applied so as to fill a space formed between the sensor package and the lens configuration, and then curing the thermosetting resin.

摘要翻译： 提供了一种制造相机模块的方法，所述相机模块包括具有图像拾取元件的传感器封装以及透镜保持器和容纳所述传感器封装的容器一体形成的透镜构造，所述传感器封装被固定在所述插座内， 该方法包括：将光固化树脂施加到容器的预定部分; 执行传感器封装的相对位置与透镜构造的对准; 使光固化树脂固化的第一接合，使得传感器封装固定在插座内，同时保持传感器封装相对于透镜构型的相对位置; 以及第二接合，由此施加热固性树脂以填充形成在传感器封装和透镜构造之间的空间，然后固化热固性树脂。

公开(公告)号：US20070184583A1

公开(公告)日：2007-08-09

申请号：US11593039

申请日：2006-11-06

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L21/00

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3135 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/73203 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00

摘要： According to this invention, a method for fabricating a semiconductor package, in which a plurality of semiconductor chips having a through electrode is layered on a semiconductor interposer, comprising: mounting and layering a plurality of semiconductor chips on a first surface of a semiconductor wafer, which is to be used for a semiconductor interposer; forming a mold resin over the semiconductor chips to cover the semiconductor chips entirely; and dicing the semiconductor wafer to form a plurality of individual semiconductor packages.

摘要翻译： 根据本发明，一种半导体封装的制造方法，其中具有贯通电极的多个半导体芯片层叠在半导体插入件上，包括：在半导体晶片的第一表面上安装和分层多个半导体芯片， 其用于半导体插入器; 在半导体芯片上形成模制树脂以完全覆盖半导体芯片; 并切割半导体晶片以形成多个单独的半导体封装。

公开(公告)号：US07215031B2

公开(公告)日：2007-05-08

申请号：US10985020

申请日：2004-11-10

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/49 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/83139 ,  H01L2224/85205 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45688 ,  H01L2924/01006

摘要： A multi chip package includes a substrate; a first semiconductor chip mounted on the substrate; a second semiconductor chip mounted above the first semiconductor chip; a first bonding wire electrically coupled to a first bonding pad on the first semiconductor chip; and a second bonding wire electrically coupled to a second bonding pad on the second semiconductor chip. At least the first bonding wire is of a coated wire, which comprises a conductive core and an outer insulation coating. At least the first bonding pad is of a multi layered pad, comprising a base pad formed on the first semiconductor chip; a first conductive layer formed on the base pad; and a second conductive layer formed on the first conductive layer.

摘要翻译： 多芯片封装包括基板; 安装在所述基板上的第一半导体芯片; 安装在所述第一半导体芯片上方的第二半导体芯片; 电耦合到第一半导体芯片上的第一焊盘的第一接合线; 以及电耦合到第二半导体芯片上的第二接合焊盘的第二接合线。 至少第一接合线是涂覆线，其包括导电芯和外绝缘涂层。 至少第一焊盘是多层焊盘，包括形成在第一半导体芯片上的基座焊盘; 形成在所述基座上的第一导电层; 以及形成在所述第一导电层上的第二导电层。

公开(公告)号：US20070075413A1

公开(公告)日：2007-04-05

申请号：US11525868

申请日：2006-09-25

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/02

CPC分类号： H01L25/50 ,  H01L21/6835 ,  H01L23/552 ,  H01L24/81 ,  H01L24/86 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2223/6627 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor package according to the present invention includes a substrate; first and second semiconductor chips mounted on a first surface of the substrate; and a heat-radiation sheet. The heat-radiation sheet includes a heat-transferable conductive layer and first and second insulating layers formed on top and bottom surfaces of the heat-transferable conductive layer, respectively. The heat-radiation sheet includes a first portion arranged between the first semiconductor chip and the second semiconductor chip; and a second portion extending at least a side of the first portion. The second portion is connected to the substrate. The second insulating layer of the second portion is formed to expose a part of the heat-transferable conductive layer.

摘要翻译： 根据本发明的半导体封装包括基板; 安装在基板的第一表面上的第一和第二半导体芯片; 和散热片。 散热片包括分别在可热转印导电层的顶表面和底表面上形成的可传热导电层和第一和第二绝缘层。 散热片包括布置在第一半导体芯片和第二半导体芯片之间的第一部分; 以及延伸至第一部分的至少一侧的第二部分。 第二部分连接到基板。 形成第二部分的第二绝缘层以暴露部分可热转移导电层。

公开(公告)号：US20060223232A1

公开(公告)日：2006-10-05

申请号：US11276828

申请日：2006-03-15

申请人： Yoshimi EGAWA

发明人： Yoshimi EGAWA

IPC分类号： H01L21/00

CPC分类号： H01L21/563 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/73203 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041

摘要： A method for manufacturing a semiconductor device includes the steps of (a) preparing a wafer including a first circuit formation region and a first surrounding region, (b) laminating a first chip on the first circuit formation region, (c) pouring a first underfill into a first space between the first circuit formation region and the first chip from the first surrounding region, (d) hardening the first underfill, (e) forming a laminated structure comprised of a first chip block that includes a second chip including the first circuit formation region, the first chip, and the first underfill by conducting dicing with respect to the wafer; and (f) laminating the laminated structure on a substrate.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：（a）制备包括第一电路形成区域和第一周围区域的晶片，（b）在第一电路形成区域上层叠第一芯片，（c）倾倒第一底部填充物 （d）硬化第一底部填充物，（e）形成由第一芯片块组成的叠层结构，所述第一芯片块包括第二芯片，所述第二芯片包括第一电路，所述第一芯片包括第一电路 形成区域，第一芯片和第一底部填充物，通过相对于晶片进行切割; 和（f）将层叠结构层叠在基板上。

公开(公告)号：US07002251B2

公开(公告)日：2006-02-21

申请号：US10796058

申请日：2004-03-10

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/13 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06586 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532

摘要： A semiconductor device includes a substrate, and a recess is formed in the substrate. A back surface of the substrate is covered with an insulating film, and wiring, pads and posts are formed on the insulating film. The pads are connected to the posts by the wiring. The entire back surface of the substrate except for areas of the pads and the posts is covered with the insulating film. External terminals, such as solder balls, are formed on the posts. A first chip is fixed to the pads within the recess, and a second chip is adhered to the first chip with an adhesive. The first chip and the second chip respectively have a wafer level chip size package (WCSP) structure where external terminals are arranged planarly by rewiring from internal electrodes which are provided with an insulating coating.

摘要翻译： 半导体器件包括衬底，并且在衬底中形成凹部。 基板的背面被绝缘膜覆盖，并且在绝缘膜上形成布线，焊盘和支柱。 焊盘通过接线连接到柱上。 除了焊盘和柱的区域之外的基板的整个背面被绝缘膜覆盖。 在柱上形成外部端子，例如焊球。 第一芯片固定在凹槽内的焊盘上，第二芯片用粘合剂粘附到第一芯片上。 第一芯片和第二芯片分别具有通过从设置有绝缘涂层的内部电极重新布线而平面地布置外部端子的晶片级芯片尺寸封装（WCSP）结构。

公开(公告)号：US20050046035A1

公开(公告)日：2005-03-03

申请号：US10796058

申请日：2004-03-10

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/12 ,  H01L23/13 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L23/06

CPC分类号： H01L25/0657 ,  H01L23/13 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06586 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532

摘要： A semiconductor device includes a substrate, and a recess is formed in the substrate. A back surface of the substrate is covered with an insulating film, and wiring, pads and posts are formed on the insulating film. The pads are connected to the posts by the wiring. The entire back surface of the substrate except for areas of the pads and the posts is covered with the insulating film. External terminals, such as solder balls, are formed on the posts. A first chip is fixed to the pads within the recess, and a second chip is adhered to the first chip with an adhesive. The first chip and the second chip respectively have a wafer level chip size package (WCSP) structure where external terminals are arranged planarly by rewiring from internal electrodes which are provided with an insulating coating.

摘要翻译： 半导体器件包括衬底，并且在衬底中形成凹部。 基板的背面被绝缘膜覆盖，并且在绝缘膜上形成布线，焊盘和支柱。 焊盘通过接线连接到柱上。 除了焊盘和柱的区域之外的基板的整个背面被绝缘膜覆盖。 在柱上形成外部端子，例如焊球。 第一芯片固定在凹槽内的焊盘上，第二芯片用粘合剂粘附到第一芯片上。 第一芯片和第二芯片分别具有通过从设置有绝缘涂层的内部电极重新布线而平面地布置外部端子的晶片级芯片尺寸封装（WCSP）结构。

公开(公告)号：US06376278B1

公开(公告)日：2002-04-23

申请号：US09497685

申请日：2000-02-04

申请人： Yoshimi Egawa ,  Kazumi Shinchi ,  Takeshi Niigaki

发明人： Yoshimi Egawa ,  Kazumi Shinchi ,  Takeshi Niigaki

IPC分类号： H01L2150

CPC分类号： H01L21/6836 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L24/28 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2224/11 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00

摘要： A first adhesive tape is attached to a first major surface of a semiconductor wafer, the semiconductor wafer having a plurality of semiconductor chip regions. Protrusion electrodes are formed on a second major surface of the semiconductor wafer within the plurality of semiconductor chip regions. Portions of the semiconductor wafer located between the plurality of chip regions are removed to form a plurality of semiconductor chips. Intervals between the semiconductor chips are then expanded. Respective first major surfaces of the wiring substrates are coupled to the corresponding second major surfaces of the semiconductor chips by the protrusion electrodes to form preliminarily structures each of which is comprised of the semiconductor chip and the wiring substrate. A second adhesive tape is attached to second major surfaces of the wiring substrates. The first adhesive tape is removed from the semiconductor chips. A resin is applied to gaps between the semiconductor chips and the wiring substrates, and the second adhesive tape is removed from the wiring substrates to form the semiconductor devices.

摘要翻译： 第一粘合带附着到半导体晶片的第一主表面，半导体晶片具有多个半导体芯片区域。 突起电极形成在多个半导体芯片区域内的半导体晶片的第二主表面上。 位于多个芯片区域之间的半导体晶片的部分被去除以形成多个半导体芯片。 然后扩展半导体芯片之间的间隔。 布线基板的各个第一主表面通过突起电极耦合到半导体芯片的对应的第二主表面，以形成由半导体芯片和布线基板构成的预定结构。 第二粘合带附接到布线基板的第二主表面。 第一胶带从半导体芯片上去除。 将树脂施加到半导体芯片和布线基板之间的间隙，并且将第二粘合带从布线基板移除以形成半导体器件。