公开(公告)号：US20090209062A1

公开(公告)日：2009-08-20

申请号：US12320316

申请日：2009-01-23

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L21/02

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10161 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacturing a semiconductor device which can reduce the number of times of resin-injection, thereby facilitating the miniaturization of the semiconductor device, and the semiconductor device. After resin is injected into a space between at least two second semiconductor chips flip-chip joined to a first semiconductor chip through an injection opening, the resin is hardened.

摘要翻译： 一种制造半导体器件的方法，其可以减少树脂注入的次数，从而有助于半导体器件的小型化以及半导体器件。 将树脂注射到通过注射开口连接到第一半导体芯片的至少两个第二半导体芯片倒装芯片之间的空间中，树脂被硬化。

公开(公告)号：US07413925B2

公开(公告)日：2008-08-19

申请号：US11593039

申请日：2006-11-06

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L29/40

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3135 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/73203 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00

摘要： According to this invention, a method for fabricating a semiconductor package, in which a plurality of semiconductor chips having a through electrode is layered on a semiconductor interposer, comprising: mounting and layering a plurality of semiconductor chips on a first surface of a semiconductor wafer, which is to be used for a semiconductor interposer; forming a mold resin over the semiconductor chips to cover the semiconductor chips entirely; and dicing the semiconductor wafer to form a plurality of individual semiconductor packages.

摘要翻译： 根据本发明，一种半导体封装的制造方法，其中具有贯通电极的多个半导体芯片层叠在半导体插入件上，包括：在半导体晶片的第一表面上安装和分层多个半导体芯片， 其用于半导体插入器; 在半导体芯片上形成模制树脂以完全覆盖半导体芯片; 并切割半导体晶片以形成多个单独的半导体封装。

公开(公告)号：US20070231966A1

公开(公告)日：2007-10-04

申请号：US11723526

申请日：2007-03-20

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L21/784

CPC分类号： H01L23/3128 ,  H01L21/76898 ,  H01L23/3135 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014

摘要： To improve the fabrication yield of semiconductor devices. A semiconductor device where a desired number of semiconductor chips are laminated in the thickness direction thereof is fabricated by repeating, an arbitrary number of times such as one time or two or more times, a step of bonding and mounting another support substrate laminate on first bumps exposed by separating and removing one support substrate from a support substrate laminate composite where second bumps of two support substrate laminates including plural semiconductor wafers mounted on support substrates have been made to face each other and are electrically connected.

摘要翻译： 提高半导体器件的制造成本。 通过重复任意次数，例如一次或两次或更多次，制造在其厚度方向上层叠期望数量的半导体芯片的半导体器件，将另一个支撑基板层叠体接合并安装在第一凸块上的步骤 通过从支撑基板层压复合体中分离和除去一个支撑基板而暴露出来，其中两个支撑基板层压体的第二凸起包括安装在支撑基板上的多个半导体晶片已被制成彼此面对并且电连接。

公开(公告)号：US06777797B2

公开(公告)日：2004-08-17

申请号：US10330321

申请日：2002-12-30

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L2302

CPC分类号： H01L24/32 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

摘要： A stacked multi-chip package includes a substrate, a first chip and a second chip. The first chip is fixed to the substrate, and is provided with a collar portion which opposes an upper face of the substrate in a state such that a gap is formed between the upper face of the substrate and the collar portion. The second chip is disposed in a region below the collar portion. The second chip is fixed to the substrate and does not make contact with the first chip.

摘要翻译： 堆叠的多芯片封装包括衬底，第一芯片和第二芯片。 第一芯片被固定到基板上，并且设置有在基板的上表面和轴环部之间形成间隙的状态下与基板的上表面相对的轴环部。 第二芯片设置在套环部分下方的区域中。 第二芯片固定在基板上，不与第一芯片接触。

公开(公告)号：US06259163B1

公开(公告)日：2001-07-10

申请号：US09167529

申请日：1998-10-07

申请人： Shinji Ohuchi ,  Yoshimi Egawa ,  Noritaka Anzai

发明人： Shinji Ohuchi ,  Yoshimi Egawa ,  Noritaka Anzai

IPC分类号： H01L2348

CPC分类号： H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0384 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05567 ,  H01L2224/13076 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16238 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/30107 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4007 ,  H05K2201/0191 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/099 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A metal pattern 4 is formed at a rear surface of a substrate 3 at a front surface of which a molded semiconductor chip is mounted, the metal pattern 4 is covered with an insulating film 5 except at its connecting area 4a and a solder ball 6 is bonded to the connecting area 4a. The area of the metal pattern 4 other than the connecting area 4a inclines toward the substrate 3 and gradually becomes thinner toward the outside. Stress, which is applied to the solder ball 6, is imparted in a diagonal direction and is dispersed. As a result, the number of occurrences of cracks X is reduced and the solder ball which is used to achieve connection with an external substrate is effectively prevented from becoming electrically disconnected.

摘要翻译： 金属图案4形成在基板3的背面，其表面上安装有模制的半导体芯片，除了连接区域4a之外，金属图案4被绝缘膜5覆盖，焊球6是 结合到连接区域4a。 连接区域4a以外的金属图案4的面积朝向基板3倾斜，朝向外侧逐渐变薄。 应用于焊球6的应力被赋予对角线方向并分散。 结果，可以有效地防止裂纹X的发生次数和用于与外部基板连接的焊球变得电断开。

公开(公告)号：US08143718B2

公开(公告)日：2012-03-27

申请号：US11406232

申请日：2006-04-19

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/34

CPC分类号： H01L25/0657 ,  H01L23/147 ,  H01L23/481 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device having a semiconductor substrate including a first surface and a second surface corresponding to a back surface with respect to the first surface and having first through electrodes which extend through the first surface and the second surface, semiconductor chips which are mounted over the first surface of the semiconductor substrate and each of which is constituted of a material of the same kind as the semiconductor substrate and has a circuit element electrically connected to the first through electrodes, stress relaxing sections which are provided with first conductors formed over the second surface of the semiconductor substrate and electrically connected to the first through electrodes of the semiconductor substrate and having flexibility, and external connecting terminals provided over the stress relaxing sections and connected to the first conductors respectively.

摘要翻译： 一种半导体器件，具有包括第一表面和第二表面的半导体衬底，所述第一表面和第二表面相对于所述第一表面对应于背面，并且具有延伸穿过所述第一表面和所述第二表面的第一通孔电极， 所述半导体基板的表面由与所述半导体基板相同的材料构成，并且具有与所述第一贯通电极电连接的电路元件，所述应力缓和部具有形成在所述第一贯通电极的第二表面的第二表面上的第一导体 半导体基板，与半导体基板的第一贯通电极电连接并具有柔性，外部连接端子分别设置在应力缓和部分上并连接到第一导体。

公开(公告)号：US07646086B2

公开(公告)日：2010-01-12

申请号：US11525868

申请日：2006-09-25

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/02

CPC分类号： H01L25/50 ,  H01L21/6835 ,  H01L23/552 ,  H01L24/81 ,  H01L24/86 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2223/6627 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06589 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor package according to the present invention includes a substrate; first and second semiconductor chips mounted on a first surface of the substrate; and a heat-radiation sheet. The heat-radiation sheet includes a heat-transferable conductive layer and first and second insulating layers formed on top and bottom surfaces of the heat-transferable conductive layer, respectively. The heat-radiation sheet includes a first portion arranged between the first semiconductor chip and the second semiconductor chip; and a second portion extending at least a side of the first portion. The second portion is connected to the substrate. The second insulating layer of the second portion is formed to expose a part of the heat-transferable conductive layer.

公开(公告)号：US20090321266A1

公开(公告)日：2009-12-31

申请号：US12490470

申请日：2009-06-24

申请人： Yoshimi Egawa ,  Harufumi Kobayashi

发明人： Yoshimi Egawa ,  Harufumi Kobayashi

IPC分类号： H05K3/00

CPC分类号： H05K3/242 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/111 ,  H05K1/114 ,  H05K3/06 ,  H05K3/42 ,  H05K2201/09254 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/1572 ,  H05K2203/175 ,  Y10T29/49156 ,  Y10T29/49162 ,  H01L2924/00014

摘要： There is provided a method for manufacturing a printed circuit board having an insulative board and a plurality of electroconductive pads arranged in a grid shape on the insulative board, the method comprising: a step for forming an electroconductive film on the insulative board; a step for forming a pattern on the electroconductive film so as to form the electroconductive pads, a lead wire connected to at least one of the electroconductive pads, and inter-pad wiring for electrically connecting each of the electroconductive pads not connected to the lead wire to any of the electroconductive pads connected to the lead wire, the inter-pad wiring being disposed between mutually adjacent electroconductive pads; a step for plating each of the electroconductive pads by immersing the insulative board in a plating bath and energizing each of the electroconductive pads through the lead wire; and a step for removing the inter-pad wiring.

摘要翻译： 提供了一种用于制造印刷电路板的方法，所述印刷电路板具有绝缘板和在所述绝缘板上排列成格子状的多个导电焊盘，所述方法包括：在所述绝缘板上形成导电膜的步骤; 用于在导电膜上形成图形以形成导电焊盘的步骤，连接到至少一个导电焊盘的引线和用于电连接未连接到引线的每个导电焊盘的衬垫布线 连接到引线的任何导电焊盘，衬垫布线设置在相互相邻的导电焊盘之间; 通过将绝缘板浸入电镀槽中并对每个导电焊盘进行电镀，并通过引线激励每个导电焊盘; 以及去除垫间布线的步骤。

公开(公告)号：US07317244B2

公开(公告)日：2008-01-08

申请号：US10341463

申请日：2003-01-14

申请人： Yasufumi Uchida ,  Yoshimi Egawa

发明人： Yasufumi Uchida ,  Yoshimi Egawa

IPC分类号： H01L23/02

CPC分类号： H01L24/48 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48472 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49429 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/0103 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20648 ,  H01L2924/20649 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/2075 ,  H01L2924/20754

摘要： In a semiconductor device having a semiconductor chip mounted on a printed circuit board, the semiconductor chip has a plurality of electrodes and the printed circuit board has a plurality of conductive patterns. Metallic plated layers are formed on the electrodes of the semiconductor chip. The metallic plated layers on the electrodes of the semiconductor chip are electrically connected with the conductive patterns of the printed circuit board by metallic wires.

摘要翻译： 在具有安装在印刷电路板上的半导体芯片的半导体器件中，半导体芯片具有多个电极，印刷电路板具有多个导电图案。 金属镀层形成在半导体芯片的电极上。 半导体芯片的电极上的金属镀层通过金属线与印刷电路板的导电图案电连接。

公开(公告)号：US20060220261A1

公开(公告)日：2006-10-05

申请号：US11406232

申请日：2006-04-19

申请人： Yoshimi Egawa

发明人： Yoshimi Egawa

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/147 ,  H01L23/481 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device according to the invention of the present application comprises a semiconductor substrate including a first surface and a second surface corresponding to a back surface with respect to the first surface and having first through electrodes which extend through the first surface and the second surface, semiconductor chips which are mounted over the first surface of the semiconductor substrate and each of which is constituted of a material of the same kind as the semiconductor substrate and has a circuit element electrically connected to the first through electrodes, stress relaxing sections which are provided with first conductors formed over the second surface of the semiconductor substrate and electrically connected to the first through electrodes of the semiconductor substrate and having flexibility, and external connecting terminals provided over the stress relaxing sections and connected to the first conductors respectively.

摘要翻译： 根据本发明的本发明的半导体器件包括半导体衬底，其包括相对于第一表面对应于后表面的第一表面和第二表面，并且具有延伸穿过第一表面和第二表面的第一贯通电极， 半导体芯片，其安装在半导体基板的第一表面上，并且每个半导体芯片由与半导体基板相同种类的材料构成，并且具有与第一贯通电极电连接的电路元件，应力缓和部分设置有 第一导体形成在半导体衬底的第二表面上并电连接到半导体衬底的第一贯通电极并具有柔性，以及设置在应力缓和部分上并分别连接到第一导体的外部连接端子。