公开(公告)号：US20130005085A1

公开(公告)日：2013-01-03

申请号：US13549001

申请日：2012-07-13

申请人： Akinobu SHIBUYA ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

发明人： Akinobu SHIBUYA ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

IPC分类号： H01L21/60 ,  H01L21/56

CPC分类号： H01L21/563 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83385 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A substrate and a semiconductor chip are connected by means of flip-chip interconnection. Around connecting pads of the substrate and input/output terminals of the semiconductor chip, an underfill material is injected. The underfill material is a composite material of filler and resin. Also, a first main surface of the substrate, which is not covered with the underfill material, and the side surfaces of the semiconductor chip are encapsulated with a molding material. The molding material is a composite material of filler and resin. An integrated body of the substrate and the semiconductor chip, which are covered with the molding material, is thinned from above and below.

摘要翻译： 衬底和半导体芯片通过倒装芯片互连连接。 在衬底的连接焊盘和半导体芯片的输入/输出端子之间，注入底部填充材料。 底部填充材料是填料和树脂的复合材料。 此外，未被底部填充材料覆盖的基板的第一主表面和半导体芯片的侧表面被模制材料封装。 成型材料是填料和树脂的复合材料。 由模制材料覆盖的衬底和半导体芯片的集成体从上方和下方变薄。

公开(公告)号：US08237292B2

公开(公告)日：2012-08-07

申请号：US12526236

申请日：2008-02-29

申请人： Akinobu Shibuya ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

发明人： Akinobu Shibuya ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

IPC分类号： H01L23/488

CPC分类号： H01L21/563 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83385 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A substrate (1) and a semiconductor chip (5) are connected by means of flip-chip interconnection. Around connecting pads (3) of the substrate (1) and input/output terminals (10) of the semiconductor chip (5), an underfill material (7) is injected. The underfill material (7) is a composite material of filler and resin in which the maximum particle diameter of the filler is 5 μm or below and whose filler content is 40 to 60 wt %. Also, a first main surface of the substrate (1), which is not covered with the underfill material (7), and the side surfaces of the semiconductor chip (5) are encapsulated with a molding material (8). The molding material (8) is a composite material of filler and resin whose filler content is over 75 wt % and in which the glass transition temperature of the resin is over 180° C. An integrated body of the substrate (1) and the semiconductor chip (5), which are covered with the molding material (8), is thinned from above and below.

摘要翻译： 基板（1）和半导体芯片（5）通过倒装芯片互连连接。 在衬底（1）的连接焊盘（3）和半导体芯片（5）的输入/输出端子（10）之间，注入底部填充材料（7）。 底部填充材料（7）是填料和树脂的复合材料，其中填料的最大粒径为5μm以下，填料含量为40〜60重量％。 此外，未被底部填充材料（7）覆盖的基板（1）的第一主表面和半导体芯片（5）的侧表面被模制材料（8）封装。 成型材料（8）是填料和树脂的复合材料，其填料含量超过75重量％，树脂的玻璃化转变温度超过180℃。基板（1）和半导体 由模制材料（8）覆盖的芯片（5）从上方和下方变薄。

公开(公告)号：US08669138B2

公开(公告)日：2014-03-11

申请号：US13549001

申请日：2012-07-13

申请人： Akinobu Shibuya ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

发明人： Akinobu Shibuya ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

IPC分类号： H01L21/60

CPC分类号： H01L21/563 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83385 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A substrate and a semiconductor chip are connected by means of flip-chip interconnection. Around connecting pads of the substrate and input/output terminals of the semiconductor chip, an underfill material is injected. The underfill material is a composite material of filler and resin. Also, a first main surface of the substrate, which is not covered with the underfill material, and the side surfaces of the semiconductor chip are encapsulated with a molding material. The molding material is a composite material of filler and resin. An integrated body of the substrate and the semiconductor chip, which are covered with the molding material, is thinned from above and below.

摘要翻译： 衬底和半导体芯片通过倒装芯片互连连接。 在衬底的连接焊盘和半导体芯片的输入/输出端子之间，注入底部填充材料。 底部填充材料是填料和树脂的复合材料。 此外，未被底部填充材料覆盖的基板的第一主表面和半导体芯片的侧表面被模制材料封装。 成型材料是填料和树脂的复合材料。 由模制材料覆盖的衬底和半导体芯片的集成体从上方和下方变薄。

公开(公告)号：US20100308474A1

公开(公告)日：2010-12-09

申请号：US12526236

申请日：2008-02-29

申请人： Akinobu Shibuya ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

发明人： Akinobu Shibuya ,  Koichi Takemura ,  Akira Ouchi ,  Tomoo Murakami

IPC分类号： H01L23/488 ,  H01L21/56 ,  H01L21/60

CPC分类号： H01L21/563 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83385 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A substrate (1) and a semiconductor chip (5) are connected by means of flip-chip interconnection. Around connecting pads (3) of the substrate (1) and input/output terminals (10) of the semiconductor chip (5), an underfill material (7) is injected. The underfill material (7) is a composite material of filler and resin in which the maximum particle diameter of the filler is 5 μm or below and whose filler content is 40 to 60 wt %. Also, a first main surface of the substrate (1), which is not covered with the underfill material (7), and the side surfaces of the semiconductor chip (5) are encapsulated with a molding material (8). The molding material (8) is a composite material of filler and resin whose filler content is over 75 wt % and in which the glass transition temperature of the resin is over 180° C. An integrated body of the substrate (1) and the semiconductor chip (5), which are covered with the molding material (8), is thinned from above and below.

摘要翻译： 基板（1）和半导体芯片（5）通过倒装芯片互连连接。 在衬底（1）的连接焊盘（3）和半导体芯片（5）的输入/输出端子（10）之间，注入底部填充材料（7）。 底部填充材料（7）是填料和树脂的复合材料，其中填料的最大粒径为5μm以下，填料的含量为40〜60重量％。 此外，未被底部填充材料（7）覆盖的基板（1）的第一主表面和半导体芯片（5）的侧表面被模制材料（8）封装。 成型材料（8）是填料和树脂的复合材料，其填料含量超过75重量％，树脂的玻璃化转变温度超过180℃。基板（1）和半导体 由模制材料（8）覆盖的芯片（5）从上方和下方变薄。

公开(公告)号：US08621730B2

公开(公告)日：2014-01-07

申请号：US13203018

申请日：2010-02-12

申请人： Akinobu Shibuya ,  Koichi Takemura ,  Takashi Manako

发明人： Akinobu Shibuya ,  Koichi Takemura ,  Takashi Manako

IPC分类号： H01G7/00

CPC分类号： H01G7/00 ,  H01L22/14 ,  H01L22/20 ,  H01L27/016 ,  H01L2924/0002 ,  Y10T29/43 ,  Y10T29/435 ,  H01L2924/00

摘要： In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.

摘要翻译： 在电容器制造方法中，在基板上沉积底电极，薄膜电介质和顶电极以形成电容器，其中包括在底电极和顶电极之间的颗粒和电短路的缺陷是 在电容器分为电容器单元之前检测。 接下来，在将电容器分成电容器单元之前，去除在底部电极和顶部电极之间的诸如颗粒和电气短路的缺陷。

公开(公告)号：US20110302753A1

公开(公告)日：2011-12-15

申请号：US13203018

申请日：2010-02-12

申请人： Akinobu Shibuya ,  Koichi Takemura ,  Takashi Manako

发明人： Akinobu Shibuya ,  Koichi Takemura ,  Takashi Manako

IPC分类号： H01G7/00

CPC分类号： H01G7/00 ,  H01L22/14 ,  H01L22/20 ,  H01L27/016 ,  H01L2924/0002 ,  Y10T29/43 ,  Y10T29/435 ,  H01L2924/00

摘要： In a capacitor producing method, a bottom electrode, a thin-film dielectric, and a top electrode are deposited on a substrate so as to form a capacitor, wherein defects including particles and electrical short-circuits between the bottom electrode and the top electrode are detected before the capacitor is divided into capacitor cells. Next, defects such as particles and electrical short-circuits between the bottom electrode and the top electrode are removed before the capacitor is divided into capacitor cells.

摘要翻译： 在电容器制造方法中，在基板上沉积底电极，薄膜电介质和顶电极以形成电容器，其中包括在底电极和顶电极之间的颗粒和电短路的缺陷是 在电容器分为电容器单元之前检测。 接下来，在将电容器分成电容器单元之前，去除在底部电极和顶部电极之间的诸如颗粒和电气短路的缺陷。

公开(公告)号：US20100044089A1

公开(公告)日：2010-02-25

申请号：US12529378

申请日：2008-02-28

申请人： Akinobu Shibuya ,  Yasuhiro Ishii ,  Toru Mori ,  Koichi Takemura

发明人： Akinobu Shibuya ,  Yasuhiro Ishii ,  Toru Mori ,  Koichi Takemura

IPC分类号： H05K1/16 ,  H05K3/30

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L27/016 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K3/4614 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/09763 ,  H05K2201/10378 ,  H05K2203/061 ,  Y10T29/4913 ,  H01L2924/00014

摘要： An interposer integrated with capacitors (100) includes a plug substrate (10) in which via-plugs (12) is formed, and a capacitor substrate (20) in which capacitors are formed. The capacitor substrate (20) includes a substrate body (21), capacitors (22) formed on the main surface of the substrate body, a cover insulating film (25) that covers the capacitors, a terminal electrodes (26) connected to the electrodes of the capacitor and formed on the cover insulating film, electrode pads (24) formed on the rear surface of the substrate body, and via-plugs 23 connecting together the terminal electrodes and electrode pads. The plug substrate (10) includes a substrate body (11), and electrode pads (13) formed on the main surface of the substrate body corresponding to the terminal electrodes of the capacitor substrate, and via-plugs (12) penetrating the substrate body and connected to the electrode pads.

摘要翻译： 与电容器（100）集成的插入器包括其中形成有通孔（12）的插头基板（10）和形成有电容器的电容器基板（20）。 电容器基板（20）包括基板主体（21），形成在基板主体的主表面上的电容器（22），覆盖电容器的覆盖绝缘膜（25），与电极连接的端子电极 的电容器，形成在覆盖绝缘膜上，形成在基板主体的后表面上的电极焊盘（24）以及将端子电极和电极焊盘连接在一起的通孔塞23。 插头基板（10）包括基板主体（11），和形成在基板主体的与主电极基板的端子电极对应的主面上的电极焊盘（13）以及穿过基板体的通孔（12） 并连接到电极焊盘。

公开(公告)号：US08345184B2

公开(公告)日：2013-01-01

申请号：US12663731

申请日：2008-06-10

申请人： Masayuki Shinohara ,  Yasuhiro Tanoue ,  Kazuhide Hirota ,  Koichi Takemura ,  Takuma Iwase ,  Takako Ishikawa ,  Yoshihiro Ueno ,  Morihisa Ota ,  Jun Kishimoto ,  Gouo Kurata ,  Yukihiro Takahashi ,  Hiroyuki Miyamoto

发明人： Masayuki Shinohara ,  Yasuhiro Tanoue ,  Kazuhide Hirota ,  Koichi Takemura ,  Takuma Iwase ,  Takako Ishikawa ,  Yoshihiro Ueno ,  Morihisa Ota ,  Jun Kishimoto ,  Gouo Kurata ,  Yukihiro Takahashi ,  Hiroyuki Miyamoto

IPC分类号： G02F1/1335 ,  F21V7/04

CPC分类号： G02B6/0035 ,  G02B6/0016 ,  G02B6/0018 ,  G02B6/002 ,  G02B6/0036 ,  G02B6/0038

摘要： A light guide plate (63) includes a light introducing section (65), which is at a position facing a point light source (62), for confining light from the point light source, and a light guide plate main body (64), which has a thickness smaller than a thickness at an end of the light introducing section on the point light source side, for outputting the confined light to an outside from a light outputting surface by light outputting means (70). The light introducing section (65) has an inclined surface (67), which is inclined from a surface of the light introducing section towards a surface of the light guide plate main body (64). The inclined surface (67) has a directivity converting pattern (68) for converting a directivity expansion in a thickness direction of the light guide plate of the light entered to the light introducing section (65) to directivity characteristics tilted towards a direction parallel to a surface direction of the light guide plate. The directivity converting pattern (68) has a structure in which a plurality of V-shaped groove structures (68a) are lined.

摘要翻译： 导光板（63）包括位于与点光源（62）相对的位置的用于限制来自点光源的光的光导入部（65）和导光板主体（64）， 其厚度小于点光源侧的光导入部分的端部的厚度，用于通过光输出装置（70）从光输出表面将限制的光输出到外部。 光导入部65具有从导光部的表面朝向导光板主体64的表面倾斜的倾斜面67。 倾斜面（67）具有指向性转换图案（68），用于将入射到光导入部（65）的光的导光板的厚度方向的方向性扩展转换成朝向与 导光板的表面方向。 方向转换图案（68）具有多个V形槽结构（68a）被排列的结构。

公开(公告)号：US20080289434A1

公开(公告)日：2008-11-27

申请号：US12028539

申请日：2008-02-08

申请人： Koichi Takemura ,  Daisuke Bessyo ,  Fumikazu Shiba ,  Yuji Nakabayashi

发明人： Koichi Takemura ,  Daisuke Bessyo ,  Fumikazu Shiba ,  Yuji Nakabayashi

IPC分类号： G01F1/66

CPC分类号： G01F1/667

摘要： A measurement control section comprises a time measuring section for controlling an operation of measuring a travel time of an ultrasonic wave. The measurement control section operations, based on a high rate clock signal supplied from a ceramic oscillation circuit during the time measuring operation. A clock control section stops the high rate clock signal supplied from the ceramic oscillation circuit every time when the time measuring section completes its time measuring operation, and uses a low rate clock signal supplied from a quartz oscillation circuit to count a standby time between the end of measuring the travel time and the start of carrying out the next measuring operation.

摘要翻译： 测量控制部分包括用于控制测量超声波行进时间的操作的时间测量部分。 测量控制部分基于在时间测量操作期间从陶瓷振荡电路提供的高速率时钟信号进行操作。 每当时间测量部分完成其时间测量操作时，时钟控制部分停止从陶瓷振荡电路提供的高速率时钟信号，并且使用从石英振荡电路提供的低速率时钟信号来计数结束之间的待机时间 测量行驶时间和开始进行下一次测量操作。

公开(公告)号：US06772643B2

公开(公告)日：2004-08-10

申请号：US10410529

申请日：2003-04-09

申请人： Osamu Eguchi ,  Koichi Takemura ,  Shuji Ab

发明人： Osamu Eguchi ,  Koichi Takemura ,  Shuji Ab

IPC分类号： G01F166

CPC分类号： G01F1/668

摘要： A flow meter measures a flow rate of fluid flowing through a flow passage based on a duration of propagation of an ultrasonic wave along the flow passage. A signal of the received ultrasonic wave is then compared with a reference voltage to detect an arrival of the ultrasonic wave. A voltage setting unit determines the reference voltage to an appropriate level according to a signal output from a propagation measuring unit which measures a duration of propagation of the ultrasonic wave along the flow passage from the start of transmission of the ultrasonic wave to the output of a signal from a judging unit as the reference voltage being changed. The reference voltage is determined readily and accurately, the flow meter measures the flow rate with the appropriate reference voltage.

摘要翻译： 流量计基于超声波沿着流路的传播持续时间来测量流过流道的流体的流量。 然后将接收到的超声波的信号与参考电压进行比较，以检测超声波的到达。 电压设定单元根据从传播测量单元输出的信号来确定参考电压到适当的电平，该传播测量单元测量从超声波的发射开始到超声波的输出的超声波沿着流路的传播持续时间 当参考电压被改变时来自判断单元的信号。 参考电压被容易且准确地确定，流量计用适当的参考电压来测量流量。