公开(公告)号：US08316907B2

公开(公告)日：2012-11-27

申请号：US12527932

申请日：2007-11-13

申请人： Akitsugu Hatano ,  Yoshiki Nakatani ,  Hisao Ochi

发明人： Akitsugu Hatano ,  Yoshiki Nakatani ,  Hisao Ochi

IPC分类号： B65H69/00

CPC分类号： B65H19/1852 ,  B29C65/02 ,  B29C65/48 ,  B29C65/5042 ,  B29C66/1142 ,  B29C66/43 ,  B29C66/71 ,  B29C66/8322 ,  B29C66/853 ,  B29C2035/0827 ,  B29K2079/08 ,  B65H19/28 ,  B65H19/30 ,  B65H20/30 ,  B65H23/048 ,  B65H2301/414227 ,  Y10T156/1712 ,  B29K2081/06 ,  B29K2069/00 ,  B29K2067/003 ,  B29K2067/00 ,  B29K2033/08

摘要： Substrate material processing equipment includes: a substrate material conveying section receiving a substrate material from a first line and conveying it to a second line; a first substrate material dividing section dividing the substrate material; a substrate material recovery section recovering the substrate material from its start edge formed by division; a substrate material supply section supplying a substrate material to an end edge of the substrate material which is formed by division; a first substrate material joining section joining the end edge of the substrate material to a start edge of the substrate material supplied from the substrate material supply section; a second substrate material dividing section provided between the substrate material supply section and the first substrate material joining section; a third substrate material dividing section provided between the first line and the substrate material recovery section; and a second substrate material joining section joining a start edge of the substrate material which is formed by division by the third substrate material dividing section to an end edge of the substrate material which is formed by division by the second substrate material dividing section.

摘要翻译： 基板材料加工设备包括：基板材料输送部分，从第一线路接收基板材料并将其输送到第二线路; 分割所述基板材料的第一基板材料分割部; 基板材料回收部，从通过分割形成的起始边缘回收所述基板材料; 基板材料供给部，其将基板材料供给到通过分割而形成的基板材料的端部边缘; 将基板材料的端缘连接到从基板材料供给部供给的基板材料的起始边缘的第一基板材料接合部; 第二基板材料分割部，设置在所述基板材料供给部与所述第一基板材料接合部之间; 第三基板材料分割部，设置在第一线和基板材料回收部之间; 以及第二基板材料接合部，其将通过由第三基板材料分割部分割形成的基板材料的起始边缘接合到由第二基板材料分割部分分割形成的基板材料的端部边缘。

公开(公告)号：US20100065191A1

公开(公告)日：2010-03-18

申请号：US12527932

申请日：2007-11-13

申请人： Akitsugu Hatano ,  Yoshiki Nakatani ,  Hisao Ochi

发明人： Akitsugu Hatano ,  Yoshiki Nakatani ,  Hisao Ochi

IPC分类号： B65H21/00 ,  B32B38/10 ,  B29C65/00 ,  B32B38/00 ,  B65H20/00

CPC分类号： B65H19/1852 ,  B29C65/02 ,  B29C65/48 ,  B29C65/5042 ,  B29C66/1142 ,  B29C66/43 ,  B29C66/71 ,  B29C66/8322 ,  B29C66/853 ,  B29C2035/0827 ,  B29K2079/08 ,  B65H19/28 ,  B65H19/30 ,  B65H20/30 ,  B65H23/048 ,  B65H2301/414227 ,  Y10T156/1712 ,  B29K2081/06 ,  B29K2069/00 ,  B29K2067/003 ,  B29K2067/00 ,  B29K2033/08

摘要： Substrate material processing equipment includes: a substrate material conveying section receiving a substrate material from a first line and conveying it to a second line; a first substrate material dividing section dividing the substrate material; a substrate material recovery section recovering the substrate material from its start edge formed by division; a substrate material supply section supplying a substrate material to an end edge of the substrate material which is formed by division; a first substrate material joining section joining the end edge of the substrate material to a start edge of the substrate material supplied from the substrate material supply section; a second substrate material dividing section provided between the substrate material supply section and the first substrate material joining section; a third substrate material dividing section provided between the first line and the substrate material recovery section; and a second substrate material joining section joining a start edge of the substrate material which is formed by division by the third substrate material dividing section to an end edge of the substrate material which is formed by division by the second substrate material dividing section.

摘要翻译： 基板材料加工设备包括：基板材料输送部分，从第一线路接收基板材料并将其输送到第二线路; 分割所述基板材料的第一基板材料分割部; 基板材料回收部，从通过分割形成的起始边缘回收所述基板材料; 基板材料供给部，其将基板材料供给到通过分割而形成的基板材料的端部边缘; 将基板材料的端缘连接到从基板材料供给部供给的基板材料的起始边缘的第一基板材料接合部; 第二基板材料分割部，设置在所述基板材料供给部与所述第一基板材料接合部之间; 第三基板材料分割部，设置在第一线和基板材料回收部之间; 以及第二基板材料接合部，其将通过由第三基板材料分割部分割形成的基板材料的起始边缘接合到由第二基板材料分割部分分割形成的基板材料的端部边缘。

公开(公告)号：US20100051330A1

公开(公告)日：2010-03-04

申请号：US12447977

申请日：2007-07-18

申请人： Kenichi Yamashita ,  Yoshiki Nakatani ,  Akitsugu Hatano

发明人： Kenichi Yamashita ,  Yoshiki Nakatani ,  Akitsugu Hatano

IPC分类号： H05K1/03

CPC分类号： H05K3/323 ,  C09J9/02 ,  G02F1/13452 ,  H01L24/31 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/29399 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83851 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/3511 ,  H05K1/0366 ,  H05K3/361 ,  H05K2201/09036 ,  H05K2201/10674 ,  H01L2924/0665 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A wiring board formed by mounting an IC chip on a mounting substrate includes a resin substrate and a wiring pattern. The resin substrate includes having a reinforcing material obtained by impregnating glass fibers with a resin and an organic layer provided on a surface of the reinforcing material. The wiring pattern is disposed on a surface of the resin substrate through a coating layer. The IC chip includes a bump electrode for connection with the wiring pattern. The resin substrate includes a fiber exposure portion through which the reinforcing material is exposed, and the IC chip is fixed to the mounting substrate through an ACF adhered to the fiber exposure portion with the connection electrode being connected to the wiring pattern.

摘要翻译： 通过将IC芯片安装在安装基板上而形成的布线基板包括树脂基板和布线图案。 树脂基板包括具有通过用设置在增强材料的表面上的树脂和有机层浸渍玻璃纤维而获得的增强材料。 布线图案通过涂层设置在树脂基板的表面上。 IC芯片包括用于与布线图案连接的凸块电极。 树脂基板包括曝光了增强材料的光纤曝光部，并且通过连接电极与布线图案连接的光纤曝光部分的ACF将IC芯片固定在安装基板上。

公开(公告)号：US20090039495A1

公开(公告)日：2009-02-12

申请号：US12089059

申请日：2006-06-13

申请人： Kenichi Yamashita ,  Yoshiki Nakatani ,  Tetsuya Aita

发明人： Kenichi Yamashita ,  Yoshiki Nakatani ,  Tetsuya Aita

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/81 ,  G02F1/1345 ,  G02F2202/28 ,  H01L23/49838 ,  H01L23/5387 ,  H01L24/12 ,  H01L24/17 ,  H01L24/28 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/10135 ,  H01L2224/10155 ,  H01L2224/10165 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/26145 ,  H01L2224/26152 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83139 ,  H01L2224/8314 ,  H01L2224/83141 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3511 ,  H05K3/303 ,  H05K3/323 ,  H05K2201/09709 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K2201/2036 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2224/2919 ,  H01L2924/00 ,  H01L2224/29099

摘要： An active matrix substrate includes a first substrate and a driving integrated circuit chip mounted on the first substrate. A support member is provided between the active matrix substrate and the driving IC chip so as to be in contact with both the active matrix substrate and the driving IC chip.

摘要翻译： 有源矩阵基板包括安装在第一基板上的第一基板和驱动集成电路芯片。 在有源矩阵基板和驱动IC芯片之间设置有与有源矩阵基板和驱动IC芯片接触的支撑部件。

公开(公告)号：US07431158B2

公开(公告)日：2008-10-07

申请号：US10779693

申请日：2004-02-18

申请人： Kimihiko Yamada ,  Yoshiki Nakatani ,  Tetsuya Aita

发明人： Kimihiko Yamada ,  Yoshiki Nakatani ,  Tetsuya Aita

IPC分类号： B65D85/48

CPC分类号： H01L21/67383 ,  B65D25/107

摘要： A flexible substrate storage equipment of the present invention includes at least a pair of opposed members that constitute an outer frame of a storage equipment main body, wherein the pair of opposed members are disposed so as to maintain a predetermined interval to wedge a plurality of flexible substrates in between to hold them in a shape of a curve. As a result, a flexible substrate storage equipment for surely storing and holding a plastic substrate or other flexible substrate with a simple structure, and a storing method of such substrate can be realized.

摘要翻译： 本发明的柔性基板储存装置包括构成储存装置主体的外框的至少一对相对的构件，其中一对相对的构件被设置成保持预定间隔以楔住多个柔性 衬底之间以将其保持为曲线的形状。 结果，可以实现用于可靠地存储和保持具有简单结构的塑料基板或其它柔性基板的柔性基板存储设备以及这种基板的存储方法。

公开(公告)号：US20140151682A1

公开(公告)日：2014-06-05

申请号：US13810113

申请日：2011-04-13

申请人： Yuichi Saito ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Tetsuya Okamoto ,  Yoshiki Nakatani ,  Yoshimasa Chikama

发明人： Yuichi Saito ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Tetsuya Okamoto ,  Yoshiki Nakatani ,  Yoshimasa Chikama

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L27/1225 ,  G02F1/133345 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/136295 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/32134 ,  H01L21/44 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/53233 ,  H01L23/53238 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

摘要翻译： 本发明提供一种具有优异生产率的电路板，特别是相对于半导体层和源层形成步骤具有优异的生产率的电路板，显示装置和用于制造电路板的工艺。 本发明的电路基板是包括氧化物半导体层和连接到氧化物半导体层的电极的电路板，其中电极通过基本上层压由铜以外的金属制成的层和含有铜的层而形成。

公开(公告)号：US20120223316A1

公开(公告)日：2012-09-06

申请号：US13509367

申请日：2010-07-08

申请人： Yohsuke Kanzaki ,  Yudai Takanishi ,  Yoshiki Nakatani

发明人： Yohsuke Kanzaki ,  Yudai Takanishi ,  Yoshiki Nakatani

IPC分类号： H01L29/786

CPC分类号： H01L29/78618 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： Disclosed is a thin film transistor wherein an ON current is increased and a leak current is reduced. The channel layer 60 of the TFT 10 is formed of a crystalline silicon, and the lower surface of one end of the channel layer 60 is electrically connected to the surface of an n+ silicon layer 40a, and the lower surface of the other end is electrically connected to the surface of an n+ silicon layer 40b. Furthermore, the side surface of said end of the channel layer 60 is electrically connected to a source electrode 50a, and the side surface of the other end is electrically connected to a drain electrode 50b. Thus, a barrier that makes electrons, which act as carriers, not easily transferred is formed on the boundary between the source electrode 50a and the channel layer 60. As a result, the ON current that flows when the TFT 10 is in the ON state can be increased, and the leak current that flows when the TFT is in the OFF state can be reduced.

摘要翻译： 公开了一种薄膜晶体管，其中导通电流增加并且漏电流减小。 TFT10的沟道层60由结晶硅形成，沟道层60的一端的下表面与n +硅层40a的表面电连接，另一端的下表面电气 连接到n +硅层40b的表面。 此外，沟道层60的端部的侧表面电连接到源电极50a，另一端的侧表面电连接到漏电极50b。 因此，在源电极50a和沟道层60之间的边界上形成有作为载流子的电子不容易转移的势垒。其结果是，当TFT10处于导通状态时导通的导通电流 可以降低当TFT处于OFF状态时流过的漏电流。

公开(公告)号：US08623681B2

公开(公告)日：2014-01-07

申请号：US13808375

申请日：2011-07-01

申请人： Yoshiki Nakatani ,  Yuhichi Saitoh ,  Tetsuya Okamoto ,  Yohsuke Kanzaki ,  Yudai Takanishi

发明人： Yoshiki Nakatani ,  Yuhichi Saitoh ,  Tetsuya Okamoto ,  Yohsuke Kanzaki ,  Yudai Takanishi

IPC分类号： H01L21/00

CPC分类号： H01L27/1255 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1368 ,  G02F2001/133397 ,  G02F2001/13606 ,  G02F2001/136236 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1288

摘要： An auxiliary capacitor (6a) includes a capacitor line (11ba), a gate insulating film (12) provided so as to cover the capacitor line (11ba), a semiconductor layer (13b) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b), and a drain electrode (14ba) provided on the semiconductor layer (13b) and connected to a pixel electrode (16a). The semiconductor layer (13b) made of an oxide semiconductor and the pixel electrode (16a) made of an oxide conductor contact each other.

摘要翻译： 辅助电容器（6a）包括电容器线（11ba），设置为覆盖电容器线（11ba）的栅极绝缘膜（12），设置在栅极绝缘膜（12）上的半导体层（13b） 与电容器线（11b）重叠，以及设置在半导体层（13b）上并连接到像素电极（16a）的漏电极（14ba）。 由氧化物半导体构成的半导体层（13b）和由氧化物导体构成的像素电极（16a）彼此接触。

公开(公告)号：US08605028B2

公开(公告)日：2013-12-10

申请号：US12998340

申请日：2009-06-16

申请人： Mayuko Sakamoto ,  Yasuaki Iwase ,  Yoshiki Nakatani ,  Yoshihisa Takahashi

发明人： Mayuko Sakamoto ,  Yasuaki Iwase ,  Yoshiki Nakatani ,  Yoshihisa Takahashi

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

摘要： There is provided a display device capable of preventing a malfunction and a display defect due to an off-leak from occurring even when a circuit in a shift register is configured utilizing thin film transistors of relatively large off-leaks. In at least one embodiment, each of bistable circuits that constitute the shift register includes: a thin film transistor for increasing a potential of an output terminal based on a first clock; a thin film transistor for decreasing the potential of the output terminal; a thin film transistor for increasing a potential of a range netA connected to a gate terminal of the thin film transistor based on a start signal; thin film transistors for decreasing the potential of the range netA; a capacitor for increasing the potential of a range netB connected to a gate terminal of the thin film transistor; and a thin film transistor for decreasing the potential of the range netB.

摘要翻译： 即使使用相对较大的泄漏的薄膜晶体管构成移位寄存器中的电路，也提供了一种能够防止因泄漏而引起的故障和显示缺陷的显示装置。 在至少一个实施例中，构成移位寄存器的双稳态电路中的每一个包括：用于基于第一时钟增加输出端子的电位的薄膜晶体管; 用于降低输出端子的电位的薄膜晶体管; 薄膜晶体管，用于基于开始信号增加连接到薄膜晶体管的栅极端子的范围netA的电位; 用于降低范围netA的电位的薄膜晶体管; 用于增加连接到薄膜晶体管的栅极端子的范围netB的电位的电容器; 以及用于降低范围netB的电位的薄膜晶体管。

公开(公告)号：US20120138931A1

公开(公告)日：2012-06-07

申请号：US13387371

申请日：2010-04-21

申请人： Yoshiki Nakatani ,  Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi

发明人： Yoshiki Nakatani ,  Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/78696 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78675

摘要： The present invention aims at reducing an OFF current in a thin film transistor while maintaining an ON-state current.A TFT (100) includes a glass substrate (101) formed thereon with a source electrode (110) and a drain electrode (112) having their respective upper surfaces formed with n-type silicon layers (120, 121) of microcrystalline silicon. Microcrystalline silicon regions (135, 136) are formed respectively on the n-type silicon layers (120, 121) while an amorphous silicon region (130) is formed on the glass substrate (101), and these are covered by a microcrystalline silicon layer (145). Therefore, ON-state current flows from the drain electrode (112), through the microcrystalline silicon region (135), the microcrystalline silicon layer (145) and the microcrystalline silicon region (136) in this order, and then to the source electrode (110). Also, OFF current is limited by the amorphous silicon region (130).

摘要翻译： 本发明旨在在保持导通状态电流的同时减小薄膜晶体管中的截止电流。 TFT（100）包括形成有源电极（110）的玻璃基板（101）和形成有微晶硅的n型硅层（120,121）的各自上表面的漏电极（112）。 分别在n型硅层（120,121）上形成微晶硅区域（135,136），同时在玻璃基板（101）上形成非晶硅区域（130），并且这些区域被微晶硅层 （145）。 因此，导通状态电流依次通过微晶硅区域（135），微晶硅层（145）和微晶硅区域（136）从漏电极（112）流过，然后流到源电极 110）。 此外，OFF电流受到非晶硅区域（130）的限制。