利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

15 条记录 (耗时 0.015 秒)

    Method for improving oxide layer flatness
    1.
    发明申请
    Method for improving oxide layer flatness 审中-公开
    改善氧化层平整度的方法

    公开(公告)号：US20050059235A1

    公开(公告)日：2005-03-17

    申请号：US10918434

    申请日：2004-08-16

    申请人： Been-Jon Woo ,  Mon-Chin Tsai

    发明人： Been-Jon Woo ,  Mon-Chin Tsai

    IPC分类号： H01L21/304 ,  H01L21/306 ,  H01L21/316 ,  H01L21/321 ,  H01L21/4763 ,  H01L21/8242 ,  H01S3/08

    CPC分类号： H01L21/32105 ,  H01L21/3212

    摘要： A method for improving the flatness of an oxide layer comprising the steps of providing a semiconductor structure, forming a polysilicon layer on the semiconductor structure, utilizing chemical mechanical polishing to planarize the polysilicon layer, and forming an oxide layer on the polysilicon layer. As a result of using chemical mechanical polishing on the polysilicon layer, an improved flatness of the subsequently formed oxide layer is achieved.

    摘要翻译： 一种用于提高氧化物层的平坦度的方法，包括以下步骤：提供半导体结构，在半导体结构上形成多晶硅层，利用化学机械抛光来平坦化多晶硅层，以及在多晶硅层上形成氧化物层。 作为在多晶硅层上使用化学机械抛光的结果，实现随后形成的氧化物层的改善的平坦度。

    Method of enhancing gate lithography performance by polysilicon chemical-mechanical polishing
    2.
    发明申请
    Method of enhancing gate lithography performance by polysilicon chemical-mechanical polishing 审中-公开
    通过多晶硅化学机械抛光增强栅极光刻性能的方法

    公开(公告)号：US20070281403A1

    公开(公告)日：2007-12-06

    申请号：US11444323

    申请日：2006-06-01

    申请人： Mon-Chin Tsai ,  Been-Jon Woo

    发明人： Mon-Chin Tsai ,  Been-Jon Woo

    IPC分类号： H01L21/84 ,  H01L21/302

    CPC分类号： H01L21/32139 ,  H01L21/28123

    摘要： A method of enhancing gate lithography performance by polysilicon chemical-mechanical polishing includes depositing a gate polysilicon layer on a semiconductor substrate which has a field oxide isolation structure, and then performing a polysilicon chemical-mechanical polishing after a gate polysilicon layer is deposited in order to smooth the uneven polysilicon surface resulting from the field oxide isolation structure so as to lessen the next lithography process fault because of the non-flatness.

    摘要翻译： 通过多晶硅化学机械抛光增强栅极光刻性能的方法包括在具有场氧化物隔离结构的半导体衬底上沉积栅极多晶硅层，然后在沉积栅极多晶硅层之后执行多晶硅化学机械抛光，以便 平滑由场氧化物隔离结构产生的不均匀的多晶硅表面，以便由于非平坦度而减小下一个光刻工艺故障。

    Method of forming trench isolation device capable of reducing corner recess
    3.
    发明申请
    Method of forming trench isolation device capable of reducing corner recess 审中-公开
    形成能够减少角凹部的沟槽隔离装置的方法

    公开(公告)号：US20060134881A1

    公开(公告)日：2006-06-22

    申请号：US11013415

    申请日：2004-12-17

    申请人： Been-Jon Woo ,  Hao Fang ,  Mon-Chin Tsai

    发明人： Been-Jon Woo ,  Hao Fang ,  Mon-Chin Tsai

    IPC分类号： H01L21/762

    CPC分类号： H01L21/76232

    摘要： A method of forming a trench isolation device capable of reducing corner recess comprising forming a pad oxide layer and a silicon nitride mask layer on a semiconductor base, and forming a trench by etching. Next, a liner oxide layer is formed on the semiconductor base and on the surface of the shallow trench. Then, the silicon nitride mask layer will be etched to reveal the corner. Finally, a layer of oxide is formed on the base to fill up the trench so that the trench isolation device can be completed. The present invention is designed to solve the corner recess problem, reduce generation of kick effect, and enhance the device characteristics and electrical quality.

    摘要翻译： 一种形成能够减少角凹部的沟槽隔离装置的方法，包括在半导体基底上形成衬垫氧化物层和氮化硅掩模层，并通过蚀刻形成沟槽。 接下来，在半导体基底和浅沟槽的表面上形成衬垫氧化物层。 然后，将蚀刻氮化硅掩模层以露出拐角。 最后，在基底上形成一层氧化物以填充沟槽，从而可以完成沟槽隔离装置。 本发明旨在解决拐角凹陷问题，减少踢球效应的产生，提高装置特性和电气质量。