Microelectronic assemblies having very fine pitch stacking
    5.
    发明授权
    Microelectronic assemblies having very fine pitch stacking 有权
    微电子组件具有非常细的间距堆积

    公开(公告)号:US08067267B2

    公开(公告)日:2011-11-29

    申请号:US11318164

    申请日:2005-12-23

    IPC分类号: H01L21/00

    摘要: A method of making a stacked microelectronic assembly includes providing a first microelectronic package that includes a first substrate having a first dielectric layer, conductive posts, and conductive traces extending along the surface of the first dielectric layer; providing a second microelectronic package including a second substrate that includes a second dielectric layer; securing a microelectronic element to one of the surfaces of at least one of the first or second substrates; and joining the conductive posts of the first substrate with the fusible masses of the second substrate. The posts may include a plurality of aligned posts which are aligned in a first row extending in a single orthogonal direction along a surface of the first substrate away from a portion of the first substrate that faces a face of the microelectronic element. The aligned posts are disposed beyond one of the edges of the microelectronic element.

    摘要翻译: 制造堆叠的微电子组件的方法包括提供第一微电子封装,其包括具有第一电介质层的第一衬底,导电柱和沿着第一电介质层的表面延伸的导电迹线; 提供包括第二衬底的第二微电子封装,所述第二衬底包括第二介电层; 将微电子元件固定到所述第一或第二基板中的至少一个的一个表面上; 以及将第一基板的导电柱与第二基板的可熔块接合。 柱可以包括多个对准的柱,其在沿着第一基板的表面沿着单个正交方向延伸的第一行中排列,远离第一基板的面对微电子元件的表面的部分。 对准的柱被设置在微电子元件的边缘之一之外。