公开(公告)号：US20090071707A1

公开(公告)日：2009-03-19

申请号：US12228537

申请日：2008-08-13

申请人： Kimitaka Endo ,  Philip Damberg ,  Craig S. Mitchell ,  Sean Moran ,  Christopher Wade ,  Belgacem Haba ,  John Riley

发明人： Kimitaka Endo ,  Philip Damberg ,  Craig S. Mitchell ,  Sean Moran ,  Christopher Wade ,  Belgacem Haba ,  John Riley

IPC分类号： H05K1/11 ,  C25D5/02

CPC分类号： H05K3/4007 ,  C25D5/02 ,  H01L21/4846 ,  H01L24/73 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/112 ,  H05K3/06 ,  H05K3/20 ,  H05K3/243 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method is provided for manufacturing a multilayer substrate. An insulating layer can have a hole overlying a patterned second metal layer. In turn, the second metal layer can overlie a first metal layer. A third metal layer can be electroplated onto the patterned second metal layer within the hole, the third metal layer extending from the second metal layer onto a wall of the hole. When plating the third metal layer, the first and second metal layers can function as a conductive commoning element.

摘要翻译： 提供了制造多层基板的方法。 绝缘层可以具有覆盖图案化的第二金属层的孔。 反过来，第二金属层可以覆盖在第一金属层上。 第三金属层可以电镀在孔内的图案化的第二金属层上，第三金属层从第二金属层延伸到孔的壁上。 当电镀第三金属层时，第一和第二金属层可以用作导电共用元件。

公开(公告)号：US08299626B2

公开(公告)日：2012-10-30

申请号：US11894036

申请日：2007-08-16

申请人： Ilyas Mohammed ,  Belgacem Haba ,  Sean Moran ,  Wei-Shun Wang ,  Ellis Chau ,  Christopher Wade

发明人： Ilyas Mohammed ,  Belgacem Haba ,  Sean Moran ,  Wei-Shun Wang ,  Ellis Chau ,  Christopher Wade

IPC分类号： H01L21/50

CPC分类号： H01L23/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/06135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49431 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A microelectronic package includes a lower unit having a lower unit substrate with conductive features and a top and bottom surface. The lower unit includes one or more lower unit chips overly/ing the top surface of the lower unit substrate that are electrically connected to the conductive features of the lower unit substrate. The microelectronic package also includes an upper unit including an upper unit substrate having conductive features, top and bottom surfaces and a hole extending between such top and bottom surfaces. The upper unit further includes one or more upper unit chips overlying the top surface of the upper unit substrate and electrically connected to the conductive features of the upper unit substrate by connections extending within the hole. The upper unit may include an upper unit encapsulant that covers the connections of the upper unit and the one or more upper unit chips.

摘要翻译： 微电子封装包括具有导电特征的下单元衬底和顶表面和底表面的下单元。 下部单元包括一个或多个下部单元芯片，其跨过下部单元基板的顶表面电连接到下部单元基板的导电特征。 微电子封装还包括上部单元，其包括具有导电特征的上部单元基板，顶部和底部表面以及在该顶部和底部表面之间延伸的孔。 上部单元还包括一个或多个上部单元芯片，其覆盖在上部单元基板的顶表面上，并且通过在孔内延伸的连接电连接到上部单元基板的导电特征。 上部单元可以包括覆盖上部单元和一个或多个上部单元芯片的连接的上部单元密封剂。

公开(公告)号：US20090045524A1

公开(公告)日：2009-02-19

申请号：US11894036

申请日：2007-08-16

申请人： IIyas Mohammed ,  Belgacem Haba ,  Sean Moran ,  Wei-Shun Wang ,  Ellis Chau ,  Christopher Wade

发明人： IIyas Mohammed ,  Belgacem Haba ,  Sean Moran ,  Wei-Shun Wang ,  Ellis Chau ,  Christopher Wade

IPC分类号： H01L21/50 ,  H01L23/48

CPC分类号： H01L23/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/06135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49431 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A microelectronic package includes a lower unit having a lower unit substrate with conductive features and a top and bottom surface. The lower unit includes one or more lower unit chips overly/ing the top surface of the lower unit substrate that are electrically connected to the conductive features of the lower unit substrate. The microelectronic package also includes an upper unit including an upper unit substrate having conductive features, top and bottom surfaces and a hole extending between such top and bottom surfaces. The upper unit further includes one or more upper unit chips overlying the top surface of the upper unit substrate and electrically connected to the conductive features of the upper unit substrate by connections extending within the hole. The upper unit may include an upper unit encapsulant that covers the connections of the upper unit and the one or more upper unit chips.

摘要翻译： 微电子封装包括具有导电特征的下单元衬底和顶表面和底表面的下单元。 下部单元包括一个或多个下部单元芯片，其跨过下部单元基板的顶表面电连接到下部单元基板的导电特征。 微电子封装还包括上部单元，其包括具有导电特征的上部单元基板，顶部和底部表面以及在该顶部和底部表面之间延伸的孔。 上部单元还包括一个或多个上部单元芯片，其覆盖在上部单元基板的顶表面上，并且通过在孔内延伸的连接电连接到上部单元基板的导电特征。 上部单元可以包括覆盖上部单元和一个或多个上部单元芯片的连接的上部单元密封剂。

公开(公告)号：US08525338B2

公开(公告)日：2013-09-03

申请号：US13154778

申请日：2011-06-07

申请人： Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

发明人： Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/00

CPC分类号： H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49517 ,  H01L23/49816 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic package and method of making same are provided. The package includes a substrate having first and second opposed surfaces, an edge surface extending therebetween, a plurality of terminals, and a plurality of conductive elements electrically connected with the terminals. The edge surface can be disposed at a periphery of the substrate or can be the edge surface of an aperture within the substrate. A microelectronic element has a front face and contacts thereon, with at least some of the contacts being adjacent to the edge surface of the substrate. A dielectric material overlies the edge surface of the substrate and defines a sloping surface between the front face of the microelectronic element and the substrate. A conductive matrix material defines a plurality of conductive interconnects extending along the sloping surface. The conductive interconnects electrically interconnect respective ones of the contacts with the conductive elements.

摘要翻译： 提供微电子封装及其制造方法。 封装包括具有第一和第二相对表面的基板，在其间延伸的边缘表面，多个端子以及与端子电连接的多个导电元件。 边缘表面可以设置在基底的周边，或者可以是基底内的孔的边缘表面。 微电子元件具有正面并在其上接触，其中至少一些触点与衬底的边缘表面相邻。 电介质材料覆盖在衬底的边缘表面上，并且在微电子元件的前表面和衬底之间限定一倾斜表面。 导电基体材料限定沿着倾斜表面延伸的多个导电互连。 导电互连将导电元件的各个触点电连接。

公开(公告)号：US20110147928A1

公开(公告)日：2011-06-23

申请号：US12644476

申请日：2009-12-22

申请人： Belgacem Haba ,  Philip Damberg ,  Philip R. Osborn

发明人： Belgacem Haba ,  Philip Damberg ,  Philip R. Osborn

IPC分类号： H01L23/498

CPC分类号： H01L24/48 ,  H01L23/13 ,  H01L23/49861 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4942 ,  H01L2224/49427 ,  H01L2224/49429 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599 ,  H01L2924/206

摘要： Microelectronic assemblies can have multiple conductive bond elements, e.g., bond wires, or a lead bond and a bond wire, extending between a pair of a substrate contact and a chip contact. E.g., a first bond wire can have ends joined to the contacts of the chip and substrate. A second bond wire can be joined to the ends of the first bond wire so that the second bond wire does not touch either the chip contact or the substrate contact to which the first bond wire is joined. In one example, a bond wire has a looped connection with first and second ends joined at a first contact and a middle portion joined to a second contact. In one example, first and second bond elements, e.g., bond wires or lead bonds can connect first and second pairs of a substrate contact with a chip contact. A third bond element, e.g., a bond wire or bond ribbon, can be joined to ends of the first and second bond elements.

摘要翻译： 微电子组件可以具有在一对衬底接触件和芯片接触件之间延伸的多个导电接合元件，例如接合线，引线接合和接合线。 例如，第一接合线可以具有连接到芯片和基板的触点的端部。 第二接合线可以接合到第一接合线的端部，使得第二接合线不接触与第一接合线接合的芯片接触或基板接触。 在一个示例中，接合线具有环形连接，第一和第二端在第一接触处接合，中间部分连接到第二接触。 在一个示例中，第一和第二接合元件，例如接合线或引线键可以将第一和第二对衬底接触件与芯片接触件连接。 第三接合元件，例如接合线或接合带，可以连接到第一和第二接合元件的端部。

公开(公告)号：US20100193970A1

公开(公告)日：2010-08-05

申请号：US12759196

申请日：2010-04-13

申请人： Philip Damberg ,  Belgacem Haba ,  David B. Tuckerman ,  Teck-Gyu Kang

发明人： Philip Damberg ,  Belgacem Haba ,  David B. Tuckerman ,  Teck-Gyu Kang

IPC分类号： H01L23/48

CPC分类号： H01L23/4985 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/118 ,  H05K3/326 ,  H05K3/3436 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09063 ,  H05K2201/09081 ,  H05K2201/10674 ,  H01L2924/00

摘要： A microelectronic package includes a microelectronic element having faces and contacts, a flexible substrate overlying and spaced from a first face of the microelectronic element, and a plurality of conductive terminals exposed at a surface of the flexible substrate. The conductive terminals are electrically interconnected with the microelectronic element and the flexible substrate includes a gap extending at least partially around at least one of the conductive terminals. In certain embodiments, the package includes a support layer, such as a compliant layer, disposed between the first face of the microelectronic element and the flexible substrate. In other embodiments, the support layer includes at least one opening that is at least partially aligned with one of the conductive terminals.

摘要翻译： 微电子封装包括具有面和触点的微电子元件，覆盖并与微电子元件的第一面间隔开的柔性基板，以及暴露在柔性基板的表面处的多个导电端子。 导电端子与微电子元件电互连，并且柔性基板包括至少部分地围绕至少一个导电端子延伸的间隙。 在某些实施例中，封装包括设置在微电子元件的第一面和柔性基板之间的支撑层，例如顺应层。 在其他实施例中，支撑层包括至少一个与导电端子之一至少部分对准的开口。

公开(公告)号：US08884432B2

公开(公告)日：2014-11-11

申请号：US13155845

申请日：2011-06-08

申请人： Kazuo Sakuma ,  Philip Damberg ,  Belgacem Haba

发明人： Kazuo Sakuma ,  Philip Damberg ,  Belgacem Haba

IPC分类号： H05K1/09 ,  H01L23/498

CPC分类号： H01L21/4853 ,  H01L23/3142 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/01 ,  H01L24/15 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0284 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/002 ,  H05K2201/0166 ,  H01L2924/00

摘要： An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral directions. Electrically conductive projections for bonding to electrically conductive contacts of at least one component external to the substrate, extend from the conductive elements above the at least one wiring layer. The conductive projections have end portions remote from the conductive elements and neck portions between the conductive elements and the end portions. The end portions have lower surfaces extending outwardly from the neck portions in at least one of the lateral directions. The substrate further includes a dielectric layer overlying the conductive elements and extending upwardly along the neck portions at least to the lower surfaces. At least portions of the dielectric layer between the conductive projections are recessed below a height of the lower surfaces.

摘要翻译： 互连衬底包括限定第一和第二横向方向的至少一个布线层的多个导电元件。 导电突起，用于粘合到基板外部的至少一个部件的导电触点，从导电元件延伸到至少一个布线层之上。 导电突起具有远离导电元件的端部和导电元件与端部之间的颈部。 端部具有在至少一个横向方向上从颈部部分向外延伸的下表面。 衬底还包括覆盖导电元件并且沿着颈部部分至少向下表面向上延伸的电介质层。 导电突起之间的电介质层的至少部分凹陷在下表面的高度之下。

公开(公告)号：US08531039B2

公开(公告)日：2013-09-10

申请号：US12759196

申请日：2010-04-13

申请人： Philip Damberg ,  Belgacem Haba ,  David B. Tuckerman ,  Teck-Gyu Kang

发明人： Philip Damberg ,  Belgacem Haba ,  David B. Tuckerman ,  Teck-Gyu Kang

IPC分类号： H01L29/40

CPC分类号： H01L23/4985 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/118 ,  H05K3/326 ,  H05K3/3436 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09063 ,  H05K2201/09081 ,  H05K2201/10674 ,  H01L2924/00

摘要： A microelectronic package includes a microelectronic element having faces and contacts, a flexible substrate overlying and spaced from a first face of the microelectronic element, and a plurality of conductive terminals exposed at a surface of the flexible substrate. The conductive terminals are electrically interconnected with the microelectronic element and the flexible substrate includes a gap extending at least partially around at least one of the conductive terminals. In certain embodiments, the package includes a support layer, such as a compliant layer, disposed between the first face of the microelectronic element and the flexible substrate. In other embodiments, the support layer includes at least one opening that is at least partially aligned with one of the conductive terminals.

摘要翻译： 微电子封装包括具有面和触点的微电子元件，覆盖并与微电子元件的第一面间隔开的柔性基板，以及暴露在柔性基板的表面处的多个导电端子。 导电端子与微电子元件电互连，并且柔性基板包括至少部分地围绕至少一个导电端子延伸的间隙。 在某些实施例中，封装包括设置在微电子元件的第一面和柔性基板之间的支撑层，例如顺应层。 在其他实施例中，支撑层包括至少一个与导电端子之一至少部分对准的开口。

公开(公告)号：US20130118784A1

公开(公告)日：2013-05-16

申请号：US13293698

申请日：2011-11-10

申请人： Cyprian Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Belgacem Haba ,  Philip Damberg

发明人： Cyprian Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Belgacem Haba ,  Philip Damberg

IPC分类号： H05K1/09 ,  H05K3/10

CPC分类号： H05K1/115 ,  H01L23/14 ,  H01L23/49827 ,  H01L23/49866 ,  H01L2924/0002 ,  H05K1/03 ,  H05K1/09 ,  H05K3/42 ,  H05K2201/0141 ,  H05K2201/0175 ,  H05K2201/09509 ,  H05K2201/10378 ,  H05K2203/025 ,  H05K2203/1105 ,  Y10T29/49165 ,  H01L2924/00

摘要： A component includes a support structure having first and second spaced-apart and parallel surfaces and a plurality of conductive elements extending in a direction between the first and second surfaces. Each conductive element contains an alloy of a wiring metal selected from the group consisting of copper, aluminum, nickel and chromium, and an additive selected from the group consisting of Gallium, Germanium, Indium, Selenium, Tin, Sulfur, Silver, Phosphorus, and Bismuth. The alloy has a composition that varies with distance in at least one direction across the conductive element. A concentration of the additive is less than or equal to 5% of the total atomic mass of the conductive element, and a resistivity of the conductive element is between 2.5 and 30 micro-ohm-centimeter.

公开(公告)号：US08410618B2

公开(公告)日：2013-04-02

申请号：US13196192

申请日：2011-08-02

申请人： Belgacem Haba ,  Philip Damberg ,  Philip R. Osborn

发明人： Belgacem Haba ,  Philip Damberg ,  Philip R. Osborn

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49816 ,  H01L21/50 ,  H01L23/13 ,  H01L23/49861 ,  H01L24/01 ,  H01L24/36 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/05554 ,  H01L2224/40091 ,  H01L2224/40225 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48477 ,  H01L2224/48599 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/4942 ,  H01L2224/49427 ,  H01L2224/49429 ,  H01L2224/4945 ,  H01L2224/85051 ,  H01L2224/85191 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/48095 ,  H01L2224/37099 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A microelectronic assembly includes a semiconductor chip having chip contacts exposed at a first face and a substrate juxtaposed with a face of the chip. A conductive bond element can electrically connect a first chip contact with a first substrate contact of the substrate, and a second conductive bond element can electrically connect the first chip contact with a second substrate contact. The first bond element can have a first end metallurgically joined to the first chip contact and a second end metallurgically joined to the first substrate contact. A first end of the second bond element can be metallurgically joined to the first bond element. The second bond element may or may not touch the first chip contact or the substrate contact. A third bond element can be joined to ends of first and second bond elements which are joined to substrate contacts or to chip contacts. In one embodiment, a bond element can have a looped connection, having first and second ends joined at a first contact and a middle portion joined to a second contact.

摘要翻译： 微电子组件包括半导体芯片，其具有在第一面处露出的芯片触点和与芯片的表面并置的衬底。 导电接合元件可以将第一芯片触点与衬底的第一衬底接触电连接，并且第二导电结合元件可以将第一芯片触点与第二衬底触点电连接。 第一结合元件可以具有冶金地连接到第一芯片触点的第一端和冶金地连接到第一衬底触点的第二端。 第二结合元件的第一端可以冶金地连接到第一结合元件。 第二结合元件可以或可以不接触第一芯片触点或基板触点。 第三接合元件可以连接到第一和第二接合元件的端部，所述第一和第二接合元件连接到衬底触点或芯片触点。 在一个实施例中，接合元件可以具有环形连接，其具有在第一接触处连接的第一端和第二端以及与第二接触接合的中间部。