公开(公告)号：US06720561B2

公开(公告)日：2004-04-13

申请号：US10003839

申请日：2001-12-06

申请人： Charles Edward Baumgartner ,  David Francis Fobare ,  Michael Clement DeJule ,  Ching-Yeu Wei ,  William Andrew Hennessy ,  Robert John Wojnarowski ,  Haleh Ardebili ,  William Edward Burdick, Jr.

发明人： Charles Edward Baumgartner ,  David Francis Fobare ,  Michael Clement DeJule ,  Ching-Yeu Wei ,  William Andrew Hennessy ,  Robert John Wojnarowski ,  Haleh Ardebili ,  William Edward Burdick, Jr.

IPC分类号： G01T124

CPC分类号： G01T1/2928 ,  G01T1/2002

摘要： The present invention provides an X-ray detector assembly and a fabrication method, where the X-ray detector assembly comprises a scintillator material disposed on a detector matrix array disposed on a detector substrate; an encapsulating coating disposed on the scintillator material; a moisture resistant cover disposed over the detector substrate and the encapsulating coating, and an adhesive material disposed between the detector substrate and the moisture resistant cover so as to form a moisture vapor barrier. The adhesive material is disposed so that it is not in contact with the encapsulating coating. The fabrication method of the X-ray detector assembly includes the steps of disposing the encapsulating coating on the scintillator material and a portion of the detector substrate and removing the encapsulating coating from the portion of the detector substrate.

摘要翻译： 本发明提供一种X射线检测器组件和制造方法，其中X射线检测器组件包括设置在设置在检测器基板上的检测器矩阵阵列上的闪烁体材料; 设置在闪烁体材料上的封装涂层; 设置在检测器基板和封装涂层之上的防潮盖，以及设置在检测器基板和防潮盖之间的粘合材料，以形成湿气阻挡层。 粘合剂材料被设置成使其不与封装涂层接触。 X射线检测器组件的制造方法包括以下步骤：将封装涂层设置在闪烁体材料和检测器基板的一部分上，并从检测器基板的部分移除封装涂层。

公开(公告)号：US07005648B2

公开(公告)日：2006-02-28

申请号：US10719117

申请日：2003-11-21

申请人： Charles Edward Baumgartner ,  David Francis Fobare ,  Michael Clement DeJule ,  Ching-Yeu Wei ,  William Andrew Hennessy ,  Robert John Wojnarowski

发明人： Charles Edward Baumgartner ,  David Francis Fobare ,  Michael Clement DeJule ,  Ching-Yeu Wei ,  William Andrew Hennessy ,  Robert John Wojnarowski

IPC分类号： G01T1/202

CPC分类号： G01T1/2928 ,  G01T1/2002

摘要： The present invention provides an X-ray detector assembly and a fabrication method, where the X-ray detector assembly comprises a scintillator material disposed on a detector matrix array disposed on a detector substrate; an encapsulating coating disposed on the scintillator material; a moisture resistant cover disposed over the detector substrate and the encapsulating coating, and an adhesive material disposed between the detector substrate and the moisture resistant cover so as to form a moisture vapor barrier. The adhesive material is disposed so that it is not in contact with the encapsulating coating. The fabrication method of the X-ray detector assembly includes the steps of disposing the encapsulating coating on the scintillator material and a portion of the detector substrate and removing the encapsulating coating from the portion of the detector substrate.

公开(公告)号：US06396153B2

公开(公告)日：2002-05-28

申请号：US09768598

申请日：2001-01-25

申请人： Raymond Albert Fillion ,  Ernest Wayne Balch ,  Ronald Frank Kolc ,  William Edward Burdick, Jr. ,  Robert John Wojnarowski ,  Leonard Richard Douglas ,  Thomas Bert Gorczyca

发明人： Raymond Albert Fillion ,  Ernest Wayne Balch ,  Ronald Frank Kolc ,  William Edward Burdick, Jr. ,  Robert John Wojnarowski ,  Leonard Richard Douglas ,  Thomas Bert Gorczyca

IPC分类号： H01L2348

CPC分类号： H01L24/48 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/19 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/24227 ,  H01L2224/4824 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2224/92144 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01073 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： One method for packaging at least one circuit chip includes: providing an interconnect layer including insulative material having a first side and a second side, initial metallization patterned on second side metallized portions of the second side and not on second side non-metallized portions of the second side, at least one substrate via extending from the first side to one of the second side metallized portions, and at least one chip via extending from the first side to one of the second side non-metallized portions; positioning the at least one circuit chip on the second side with at least one chip pad of the at least one circuit chip being aligned with the at least one chip via; and patterning connection metallization on selected portions of the first side of the interconnect layer and in the vias so as to extend to the at least one second side metallized portion and to the at least one chip pad. In related embodiments vias are pre-metallized and coupled to chip pads of the circuit chips by an electrically conductive binder. Thin film passive components and multilayer interconnections can additionally be incorporated into the package.

摘要翻译： 一种用于封装至少一个电路芯片的方法包括：提供包括具有第一侧和第二侧的绝缘材料的互连层，在第二侧的第二侧金属化部分上而不是在第二侧非金属化部分上图案化的初始金属化 第二侧，至少一个从第一侧延伸到第二侧金属化部分之一的衬底通孔;以及至少一个芯片通孔，其从第一侧延伸到第二侧非金属化部分之一; 将所述至少一个电路芯片定位在所述第二侧上，所述至少一个电路芯片的至少一个芯片焊盘与所述至少一个芯片通孔对准; 以及在所述互连层的第一侧和所述通孔的选定部分上图案化连接金属化，以便延伸到所述至少一个第二侧金属化部分和所述至少一个芯片焊盘。 在相关实施例中，通孔被预先金属化并且通过导电粘合剂耦合到电路芯片的芯片焊盘。 薄膜无源元件和多层互连可另外包含在封装中。

公开(公告)号：US06242282B1

公开(公告)日：2001-06-05

申请号：US09411101

申请日：1999-10-04

申请人： Raymond Albert Fillion ,  Ernest Wayne Balch ,  Ronald Frank Kolc ,  William Edward Burdick, Jr. ,  Robert John Wojnarowski ,  Leonard Richard Douglas ,  Thomas Bert Gorczyca

发明人： Raymond Albert Fillion ,  Ernest Wayne Balch ,  Ronald Frank Kolc ,  William Edward Burdick, Jr. ,  Robert John Wojnarowski ,  Leonard Richard Douglas ,  Thomas Bert Gorczyca

IPC分类号： H01L2144

CPC分类号： H01L24/48 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/19 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/24227 ,  H01L2224/4824 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2224/92144 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01073 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： One method for packaging at least one circuit chip includes: providing an interconnect layer including insulative material having a first side and a second side, initial metallization patterned on second side metallized portions of the second side and not on second side non-metallized portions of the second side, at least one substrate via extending from the first side to one of the second side metallized portions, and at least one chip via extending from the first side to one of the second side non-metallized portions; positioning the at least one circuit chip on the second side with at least one chip pad of the at least one circuit chip being aligned with the at least one chip via; and patterning connection metallization on selected portions of the first side of the interconnect layer and in the vias so as to extend to the at least one second side metallized portion and to the at least one chip pad. In related embodiments vias are pre-metallized and coupled to chip pads of the circuit chips by an electrically conductive binder. Thin film passive components and multilayer interconnections can additionally be incorporated into the package.

公开(公告)号：US07572973B2

公开(公告)日：2009-08-11

申请号：US12328788

申请日：2008-12-05

申请人： Stanton Earl Weaver, Jr. ,  Robert John Wojnarowski

发明人： Stanton Earl Weaver, Jr. ,  Robert John Wojnarowski

IPC分类号： H01L35/34 ,  H02N10/00

CPC分类号： H01L35/32 ,  Y10T156/1092

摘要： A method of making a solid state thermal transfer device includes first and second electrically conductive substrates that are positioned opposite from one another. The solid state thermal transfer device also includes a sealing layer disposed between the first and second electrically conductive substrates and a plurality of hollow structures having a conductive material, wherein the plurality of hollow structures is contained by the sealing layer between the first and second electrically conductive substrates.

摘要翻译： 制造固态热转印装置的方法包括彼此相对定位的第一和第二导电基板。 固态热转移装置还包括设置在第一和第二导电基板之间的密封层和具有导电材料的多个中空结构，其中多个中空结构由第一和第二导电 底物。

公开(公告)号：US20090031733A1

公开(公告)日：2009-02-05

申请号：US11830890

申请日：2007-07-31

申请人： Stanton Earl Weaver, JR. ,  Mehmet Arik ,  James William Bray ,  Ahmed Elasser ,  Robert John Wojnarowski ,  Mark Wayne Wilson ,  Jason Knud Klindtworth ,  Surajit Atha

发明人： Stanton Earl Weaver, JR. ,  Mehmet Arik ,  James William Bray ,  Ahmed Elasser ,  Robert John Wojnarowski ,  Mark Wayne Wilson ,  Jason Knud Klindtworth ,  Surajit Atha

IPC分类号： F25B21/02

CPC分类号： F25B21/00 ,  F25B2321/003 ,  Y02B30/66

摘要： A refrigeration system is provided. The refrigeration system includes at least one thermal blocking thermotunneling device. The thermal blocking thermotunneling device comprises a first and a second surface separated by a nanoscale gap of less than about 20 nm, such that tunneling of electrons causes a unidirectional transfer of heat from the first surface to the second surface. Further, the at least one thermal blocking thermotunneling device has a thermal back path of less than about 70 percent.

摘要翻译： 提供制冷系统。 制冷系统包括至少一个热阻热电火花钻孔装置。 热阻焊热电火焰装置包括由小于约20nm的纳米尺度间隙分开的第一和第二表面，使得电子的隧穿导致热量从第一表面到第二表面的单向转移。 此外，所述至少一个热阻焊热电火花钻孔装置具有小于约70％的热回路径。

公开(公告)号：US06412971B1

公开(公告)日：2002-07-02

申请号：US09258935

申请日：1999-03-01

申请人： Robert John Wojnarowski ,  Barry Scott Whitmore ,  William Paul Kornrumpf

发明人： Robert John Wojnarowski ,  Barry Scott Whitmore ,  William Paul Kornrumpf

IPC分类号： H01L3300

CPC分类号： H01L24/10 ,  F21K9/232 ,  F21Y2107/30 ,  F21Y2115/10 ,  H01L21/3043 ,  H01L21/76898 ,  H01L21/78 ,  H01L24/13 ,  H01L25/0652 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  Y10S362/80 ,  H01L2924/00 ,  H01L2224/05599

摘要： A light source includes a substrate; an array of un-packaged light emitting semiconductor devices (LESDs), each of the LESDs having at least one surface for emitting light and a substrate surface being attached to the substrate; and a plurality of electrical connections, each electrical connection coupled for providing electrical power to a respective LESD. The LESDs are arranged on the substrate with sufficient density and light generating capability to provide a predetermined irradiation from the light source.

摘要翻译： 光源包括基板; 一组未封装的发光半导体器件（LESD），每个LESD具有至少一个用于发光的表面和一个衬底表面附着于衬底; 以及多个电连接，每个电连接用于向相应的LESD提供电力。 LESD被布置在具有足够的密度和光产生能力的基板上，以提供来自光源的预定辐射。

公开(公告)号：US06410356B1

公开(公告)日：2002-06-25

申请号：US09520751

申请日：2000-03-07

申请人： Robert John Wojnarowski ,  Ernest Wayne Balch ,  Leonard Richard Douglas

发明人： Robert John Wojnarowski ,  Ernest Wayne Balch ,  Leonard Richard Douglas

IPC分类号： H01L2166

CPC分类号： H01L22/20 ,  H01L23/34 ,  H01L2224/92144 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/00

摘要： A method for interconnecting high-temperature silicon carbide (SiC) devices enables such high-temperature devices to be used in fabricating electronic circuits of significant scale. This method comprises empirically measuring operational characteristics of a plurality of the devices to be interconnected, the operational characteristics comprising devices which are measured to be non-working and devices which are measured to be working; characterizing the operational characteristics in an operational characteristics map; designing interconnection paths between and among the devices that are characterized to be working by the operational characteristics map; and excluding from the interconnection paths, devices that are characterized to be non-working by the operational characteristics map. A preferred embodiment of this method further includes disposing a temporary polymer layer over the devices; forming via holes through the temporary polymer layer, to bonding pads of the devices; applying a current-balancing resistive metal over the temporary polymer layer; establishing connections between the current-balancing resistive metal and the bonding pads; designing the interconnection paths between and among the working devices by patterning the current-balancing resistive metal based on the operational characteristics map; and removing the temporary polymer layer.

摘要翻译： 用于互连高温碳化硅（SiC）器件的方法使得这种高温器件能够用于制造具有显着规模的电子电路。 该方法包括经验地测量待互连的多个设备的操作特性，操作特性包括被测量为不工作的设备和被测量为工作的设备; 表征操作特征图中的操作特性; 设计特征在于通过操作特征图工作的设备之间的互连路径; 并且从互连路径中排除特征在于通过操作特性图不工作的设备。 该方法的优选实施例还包括在器件上设置临时聚合物层; 通过所述临时聚合物层形成通孔到所述装置的焊盘; 在临时聚合物层上施加电流平衡电阻金属; 建立电流平衡电阻金属和焊盘之间的连接; 通过基于操作特性图构图电流平衡电阻金属来设计工作装置之间和之间的互连路径; 并除去临时聚合物层。

公开(公告)号：US06302987B1

公开(公告)日：2001-10-16

申请号：US09286329

申请日：1999-04-05

申请人： Robert John Wojnarowski ,  Clive William Reed ,  Thomas Bert Gorczyca

发明人： Robert John Wojnarowski ,  Clive William Reed ,  Thomas Bert Gorczyca

IPC分类号： B29C6552

CPC分类号： H02G5/005 ,  Y10T29/49945

摘要： A method for coupling electrically conductive bushings in a bus, including alternating layers of dielectric material and patterned, electrically conductive bus bars and having through holes therein with each through hole having a surface exposing a portion of a respective one of the bus bars, includes: applying a polymer mixture to the surface of each through hole; inserting the bushings in the respective through holes; and curing the polymer mixture by positioning the bus and bushings in a curing chamber, applying a vacuum to the curing chamber, and applying pressure to reduce voids in the polymer mixture and minimize further void formation.

摘要翻译： 一种用于在总线中耦合导电衬套的方法，包括介电材料和图案化的导电母线的交替层，并且在其中具有通孔，每个通孔具有露出相应一个母线的一部分的表面的方法包括： 将聚合物混合物施加到每个通孔的表面; 将衬套插入相应的通孔中; 并通过将母线和套管定位在固化室中，对固化室施加真空并施加压力以减小聚合物混合物中的空隙并使进一步的空隙形成最小化来固化聚合物混合物。

公开(公告)号：US5866952A

公开(公告)日：1999-02-02

申请号：US565269

申请日：1995-11-30

申请人： Robert John Wojnarowski ,  Thomas Bent Gorczyca ,  Stanton Earl Weaver, Jr.

发明人： Robert John Wojnarowski ,  Thomas Bent Gorczyca ,  Stanton Earl Weaver, Jr.

IPC分类号： H01L25/18 ,  H01L21/98 ,  H01L23/538 ,  H01L25/04 ,  H01L23/29

CPC分类号： H01L25/50 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/293 ,  H01L23/295 ,  H01L23/4334 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/75 ,  H01L24/76 ,  H01L24/82 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/73267 ,  H01L2224/75315 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511

摘要： A high density interconnected multi-chip module is provided with a stress-reducing compliant material disposed around the chips prior to molding a polymeric substrate around the chips. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A compliant material is deposited around the chips, and then a mold form is positioned around the chips. Polymeric substrate molding material is added within the mold form, and then the substrate molding material is hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and faces of the chips. A thermal plug may be affixed to the backside of a chip prior to the addition of substrate molding material.

摘要翻译： 高密度互连多芯片模块在模制聚合物基片周围的芯片之前设置有围绕芯片布置的减小应力的材料。 具有接触垫的芯片面朝下放置在由基底支撑的粘合剂层上。 围绕芯片沉积顺应性材料，然后将模具形式定位在芯片周围。 在模具形式中加入聚合物基材模塑材料，然后将基材模塑材料硬化。 具有与预定接触焊盘对准的通路并具有穿过通孔延伸的电导体的通孔的电介质层位于硬化的基板模制材料和芯片的表面上。 在添加基底模制材料之前，可以将热塞固定到芯片的背面。