公开(公告)号：US06380082B2

公开(公告)日：2002-04-30

申请号：US09250631

申请日：1999-02-16

申请人： Chih-Ming Huang ,  Tsu-An Lin

发明人： Chih-Ming Huang ,  Tsu-An Lin

IPC分类号： H01L214763

CPC分类号： H01L21/76844 ,  H01L21/76808 ,  H01L21/76843

摘要： An improved method of preventing copper poisoning in the fabrication of metal interconnects on a semiconductor substrate comprises sequential formation of a copper layer, a first stop layer, a first inter-metal dielectric layer, a second stop layer, and a second inter-metal dielectric layer over the substrate. The second inter-metal dielectric layer and the second stop layer are defined to form an opening. A conformal first glue/barrier layer is formed over the substrate. The first glue/barrier layer and the first inter-metal dielectric layer are patterned to form a via hole below the opening until the first stop layer is exposed. Spacers are formed on sidewalls of the opening and the via hole below the opening. The first stop layer at bottom of the via hole is removed to expose the copper layer.

摘要翻译： 在半导体衬底的金属互连制造中防止铜中毒的改进方法包括顺序地形成铜层，第一阻挡层，第一金属间介电层，第二阻挡层和第二金属间电介质 层。 第二金属间介电层和第二阻挡层被限定为形成开口。 在衬底上形成共形的第一胶/阻挡层。 将第一胶/阻挡层和第一金属间介电层图案化以在开口下方形成通孔，直到暴露第一​​停止层。 间隔件形成在开口的侧壁和开口下方的通孔中。 去除通孔底部的第一停止层以露出铜层。

公开(公告)号：US08618641B2

公开(公告)日：2013-12-31

申请号：US12228379

申请日：2008-08-11

申请人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chun-Yuan Li ,  Chih-Hsin Lai

发明人： Chang-Yueh Chan ,  Chih-Ming Huang ,  Chun-Yuan Li ,  Chih-Hsin Lai

IPC分类号： H01L23/495

CPC分类号： H01L24/89 ,  H01L21/561 ,  H01L23/49531 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier is greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.

摘要翻译： 提供半导体封装及其制造方法。 提供了包括管芯焊盘和多个外围引线的引线框架。 具有形成在其上的多个连接焊盘的载体被附接到管芯焊盘，其中载体的平面尺寸大于管芯焊盘的平面尺寸，允许载体上的连接焊盘从裸片焊盘露出。 至少一个半导体芯片附着到包括芯片焊盘和载体的组件的一侧，并通过接合线电连接到载体和引线的连接焊盘。 封装密​​封剂封装半导体芯片，接合线，载体的一部分和引线框架的一部分，允许载体的底表面和引线的一部分从封装密封剂暴露。

公开(公告)号：US20110177643A1

公开(公告)日：2011-07-21

申请号：US12769087

申请日：2010-04-28

申请人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

发明人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

IPC分类号： H01L21/56 ,  H01L21/60

CPC分类号： B81B7/0064 ,  B81B7/007 ,  B81B2207/095 ,  H01L21/56 ,  H01L23/315 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A fabrication method of a package structure having at least an MEMS element is provided, including: preparing a wafer having electrical connection pads and the at least an MEMS element; disposing lids for covering the at least an MEMS element, the lids having a metal layer formed thereon; electrically connecting the electrical connection pads and the metal layer with bonding wires; forming an encapsulant for covering the lids, bonding wires, electrical connection pads and metal layer; removing portions of the encapsulant to separate the bonding wires each into first and second sub-bonding wires, wherein top ends of the first and second sub-bonding wires are exposed, the first sub-bonding wires electrically connecting to the electrical connection pads, and the second sub-bonding wires electrically connecting to the metal layer; forming metallic traces on the encapsulant for electrically connecting to the first sub-bonding wires; forming bumps on the metallic traces; and performing a singulation process.

摘要翻译： 提供具有至少MEMS元件的封装结构的制造方法，包括：制备具有电连接焊盘和所述至少MEMS元件的晶片; 设置用于覆盖所述至少一个MEMS元件的盖，所述盖具有在其上形成的金属层; 电连接焊盘和金属层与接合线; 形成用于覆盖盖子，接合线，电连接垫和金属层的密封剂; 去除所述密封剂的部分以将所述接合线分别分离成第一和第二子接合线，其中所述第一和第二次接合线的顶端被暴露，所述第一子接合线电连接到所述电连接焊盘，以及 所述第二子接合线电连接到所述金属层; 在所述密封剂上形成用于电连接到所述第一子接合线的金属迹线; 在金属痕迹上形成凸块; 并执行单独处理。

公开(公告)号：US20110175179A1

公开(公告)日：2011-07-21

申请号：US12769993

申请日：2010-04-29

申请人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

发明人： Chi-Hsin Chiu ,  Chih-Ming Huang ,  Chang-Yueh Chan ,  Hsin-Yi Liao ,  Chun-Chi Ke

IPC分类号： H01L29/84 ,  H01L23/52

CPC分类号： B81B7/0064 ,  B81B7/007 ,  B81B2207/095 ,  H01L21/56 ,  H01L23/315 ,  H01L23/552 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package structure having at least an MEMS element is provided, including a chip having electrical connecting pads and the MEMS element; a lid disposed on the chip to cover the MEMS element and having a metal layer provided thereon; first sub-bonding wires electrically connecting to the electrical connecting pads; second sub-bonding wires electrically connecting to the metal layer; an encapsulant disposed on the chip, wherein the top ends of the first and second sub-bonding wires are exposed from the encapsulant; and metallic traces disposed on the encapsulant and electrically connecting to the first sub-bonding wires. The package structure advantageously features reduced size, relatively low costs, diverse bump locations, and an enhanced EMI shielding effect.

摘要翻译： 提供具有至少MEMS元件的封装结构，其包括具有电连接焊盘和MEMS元件的芯片; 设置在所述芯片上以覆盖所述MEMS元件并且具有设置在其上的金属层的盖; 电连接到电连接焊盘的第一子接合线; 电连接到金属层的第二子接合线; 设置在所述芯片上的密封剂，其中所述第一和第二子接合线的顶端从所述密封剂露出; 以及设置在密封剂上并电连接到第一子接合线的金属迹线。 封装结构有利地具有减小的尺寸，相对低的成本，不同的凸起位置和增强的EMI屏蔽效果。

公开(公告)号：US07939383B2

公开(公告)日：2011-05-10

申请号：US11928708

申请日：2007-10-30

申请人： Chien Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang

发明人： Chien Ping Huang ,  Yu-Po Wang ,  Chih-Ming Huang

IPC分类号： H01L21/00

CPC分类号： H01L21/4857 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/58 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H05K3/007 ,  H05K3/3457 ,  H05K3/4682 ,  H05K2203/0152 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package and a fabrication method thereof are provided in which a dielectric material layer formed with a plurality of openings is used and a solder material is applied into each of the openings. A first copper layer and a second copper layer are in turn deposited over the dielectric material layer and solder materials, and the first and second copper layers are patterned to form a plurality of conductive traces each of which has a terminal coated with a metal layer. A chip is mounted on the conductive traces and electrically connected to the terminals by bonding wires, with the dielectric material layer and solder materials being exposed to the outside. This package structure can flexibly arrange the conductive traces and effectively shorten the bonding wires, thereby improve trace routability and quality of electrical connection for the semiconductor package.

摘要翻译： 提供一种半导体封装及其制造方法，其中使用形成有多个开口的电介质材料层，并且将焊料材料施加到每个开口中。 第一铜层和第二铜层又沉积在介电材料层和焊料材料上，并且第一和第二铜层被图案化以形成多个导电迹线，每个导电迹线具有涂覆有金属层的端子。 芯片安装在导电迹线上，并通过接合线电连接到端子，电介质材料层和焊料材料暴露于外部。 该封装结构可以灵活地布置导电迹线并有效地缩短接合线，从而提高半导体封装的迹线布线性和电连接质量。

公开(公告)号：US20100170709A1

公开(公告)日：2010-07-08

申请号：US12727307

申请日：2010-03-19

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

IPC分类号： H05K1/16 ,  H05K1/00

CPC分类号： H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。

公开(公告)号：US07696623B2

公开(公告)日：2010-04-13

申请号：US11643147

申请日：2006-12-20

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。

公开(公告)号：US20090103913A1

公开(公告)日：2009-04-23

申请号：US11874934

申请日：2007-10-19

申请人： Chih-Ming Huang

发明人： Chih-Ming Huang

IPC分类号： G03B17/00

CPC分类号： G03B17/00

摘要： A multifunctional supporting frame for a web camera, comprises a movable supporting clamping seat having a hollow rectangular receiving chamber; the rectangular receiving chamber being formed by an upper L shape sheet, a middle U shape sheet, and a lower enclosed rectangular sheet; one lateral side of the L shape sheet being extended with a sheet plate; at least one guide post being extended from one surface of the sheet plate; the guide posts being combined with springs so as to be formed as a telescopic structure which is adjustable to have a desire width for clamping an object; and a bendable shaft seat formed by an upper U shape plate and a lower U shape plate which are pivotally engaged. A lens set is installed above the movable supporting clamping seat by using a lens set pin seat.

摘要翻译： 一种用于网络摄像机的多功能支撑框架，包括具有中空矩形接收室的可移动支撑夹座; 矩形容纳室由上部L形片，中部U形片和下部封闭矩形片形成; L形片的一个侧面用片状板延伸; 至少一个引导柱从所述板的一个表面延伸; 引导柱与弹簧组合，以形成可伸缩结构，其可调节以具有用于夹紧物体的期望宽度; 以及由上U形板和下U形板形成的可枢转地接合的可弯曲的轴座。 通过使用镜头组座座将透镜组安装在可动支撑夹座上方。

公开(公告)号：US20080283971A1

公开(公告)日：2008-11-20

申请号：US12102213

申请日：2008-04-14

申请人： Chien-Ping Huang ,  Chin-Huang Chang ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Chin-Huang Chang ,  Chih-Ming Huang

IPC分类号： H01L23/488 ,  H01L21/304

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L24/27 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device and a fabrication method thereof are disclosed. The method includes attaching a wafer with a plurality of chips on a carrier board having an insulating layer, a plurality of conductive circuits and a bottom board; forming a plurality of first grooves between solder pads of adjacent chips to expose the conductive circuits, and filling the first grooves with an insulating adhesive layer; forming second grooves in the insulating adhesive layer; and cutting among the chips to separate the chips from one another.

摘要翻译： 公开了一种半导体器件及其制造方法。 该方法包括在具有绝缘层，多个导电电路和底板的载体板上附着具有多个芯片的晶片; 在相邻芯片的焊盘之间形成多个第一凹槽以暴露导电电路，并用绝缘粘合剂层填充第一凹槽; 在所述绝缘粘合剂层中形成第二槽; 并在芯片之间切割以将芯片彼此分离。

公开(公告)号：US20080088011A1

公开(公告)日：2008-04-17

申请号：US11974441

申请日：2007-10-12

申请人： Han-Ping Hu ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Han-Ping Hu ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/49 ,  H01L21/58

CPC分类号： H01L21/568 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor package on which a semiconductor device can be stacked and fabrication method thereof are provided. The fabrication method includes the steps of mounting and electrically connecting at least one semiconductor chip on the substrate, mounting an electrical connecting structure consisting of an upper layer circuit board and a lower layer circuit board on the substrate and electrically connecting the electrical connecting structure to the substrate, where the semiconductor chip is received in a receiving space formed in the electrical connecting structure; forming an encapsulant on the substrate encapsulating the semiconductor chip and the electrical connecting structure, and after the encapsulant is formed, exposing top surface of the upper layer circuit board with a plurality of solder pads from the encapsulant to allow at least one semiconductor device to electrically connect the upper layer circuit board so as to form a stack structure.

摘要翻译： 提供半导体器件可堆叠的半导体封装件及其制造方法。 该制造方法包括以下步骤：在基板上安装和电连接至少一个半导体芯片，将由上层电路板和下层电路板组成的电连接结构安装在基板上，并将电连接结构电连接到 衬底，其中所述半导体芯片被容纳在形成在所述电连接结构中的接收空间中; 在封装半导体芯片和电连接结构的基板上形成密封剂，并且在形成密封剂之后，用来自密封剂的多个焊盘将上层电路板的顶表面曝光，以允许至少一个半导体器件电 连接上层电路板，形成堆叠结构。