公开(公告)号：US08563358B2

公开(公告)日：2013-10-22

申请号：US13275988

申请日：2011-10-18

申请人： Christof Landesberger ,  Robert Faul

发明人： Christof Landesberger ,  Robert Faul

IPC分类号： H01L21/00 ,  H01L23/52

CPC分类号： H01L24/19 ,  H01L23/3121 ,  H01L23/4985 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/564 ,  H01L24/13 ,  H01L24/20 ,  H01L24/27 ,  H01L24/83 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2731 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/83132 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/92244 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15321 ,  H05K1/185 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/01014 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method of producing a chip package includes providing a substrate comprising a first recess having a recess bottom and recess side walls. A chip comprising a chip backside is introduced into the recess such that the chip does not protrude from the recess and such that a gap remains between the recess side walls and the chip, the chip backside being attached to the recess bottom. The gap is filled with a filler material.

摘要翻译： 制造芯片封装的方法包括提供包括具有凹陷底部和凹陷侧壁的第一凹部的基板。 包括芯片背面的芯片被引入到凹部中，使得芯片不从凹部突出，并且在凹部侧壁和芯片之间留有间隙，芯片背面附接到凹部底部。 间隙填充有填料。

公开(公告)号：US07733624B2

公开(公告)日：2010-06-08

申请号：US12089972

申请日：2007-03-22

申请人： Christof Landesberger

发明人： Christof Landesberger

IPC分类号： H01T23/0012

CPC分类号： H01L21/6833

摘要： Method for handling a substrate with polarizable molecules including providing a carrier with a first junction electrode and disposing the substrate between the first junction electrode and a second junction electrode. Fixing the substrate on the carrier is achieved by applying a voltage between the first junction electrode and the second junction electrode, so that the polarizable molecules are polarized. After removing the second junction electrode, the substrate remains fixed on the carrier.

摘要翻译： 用于处理具有可极化分子的衬底的方法，包括提供具有第一接合电极的载体并将衬底设置在第一接合电极和第二接合电极之间。 通过在第一接合电极和第二接合电极之间施加电压来实现将衬底固定在载体上，使得可极化分子被极化。 在去除第二接合电极之后，衬底保持固定在载体上。

公开(公告)号：US07027283B2

公开(公告)日：2006-04-11

申请号：US10343688

申请日：2001-07-30

申请人： Christof Landesberger ,  Armin Klumpp ,  Martin Bleier

发明人： Christof Landesberger ,  Armin Klumpp ,  Martin Bleier

IPC分类号： H01T23/00

CPC分类号： H01L21/6831 ,  H01L21/6833

摘要： The present invention provides a mobile holder for a wafer, which comprises a base element, a first fixing means and a second fixing means. The first fixing means is configured to allow a wafer to be fixed to the base element. The second fixing means is configured to fix the mobile holder to a support for said mobile holder.

摘要翻译： 本发明提供了一种用于晶片的移动支架，其包括基座元件，第一固定装置和第二固定装置。 第一固定装置构造成允许晶片固定到基体元件。 第二固定装置被配置成将移动支架固定到所述移动支架的支撑件上。

公开(公告)号：US20080232022A1

公开(公告)日：2008-09-25

申请号：US12089972

申请日：2007-03-22

申请人： Christof Landesberger

发明人： Christof Landesberger

IPC分类号： H01L21/683

CPC分类号： H01L21/6833

摘要： Method for handling a substrate with polarizable molecules including providing a carrier with a first junction electrode and disposing the substrate between the first junction electrode and a second junction electrode. Fixing the substrate on the carrier is achieved by applying a voltage between the first junction electrode and the second junction electrode, so that the polarizable molecules are polarized. After removing the second junction electrode, the substrate remains fixed on the carrier.

摘要翻译： 用于处理具有可极化分子的衬底的方法，包括提供具有第一接合电极的载体并将衬底设置在第一接合电极和第二接合电极之间。 通过在第一接合电极和第二接合电极之间施加电压来实现将衬底固定在载体上，使得可极化分子被极化。 在去除第二接合电极之后，衬底保持固定在载体上。

公开(公告)号：US06514790B1

公开(公告)日：2003-02-04

申请号：US09786330

申请日：2001-05-29

申请人： Andreas Plettner ,  Karl Haberger ,  Christof Landesberger

发明人： Andreas Plettner ,  Karl Haberger ,  Christof Landesberger

IPC分类号： H01L2144

CPC分类号： H01L21/67132

摘要： In a method for handling in parallel a plurality of circuit chips, which are arranged in a first arrangement, which corresponds to their arrangement in the original wafer, on the surface of an auxiliary carrier, the plurality of circuit chips is picked up by a plurality of pick up devices. The plurality of pick up devices with the picked up circuit chips is moved simultaneously to one or several carriers, in such a way that, simultaneously with the motion, the first arrangement of the circuit chips is changed into a second arrangement, which is different from the first arrangement. Then the circuit chips are simultaneously placed in the second arrangement on the one or several carriers.

摘要翻译： 在辅助载体的表面上并行处理以与原始晶片中的布置相对应的第一布置的多个电路芯片并行处理的方法，多个电路芯片被多个 的拾起装置。 具有拾取电路芯片的多个拾取装置同时移动到一个或多个载体，使得在运动的同时，将电路芯片的第一布置改变为第二布置，其不同于 第一个安排。 然后将电路芯片同时放置在一个或多个载体上的第二布置中。

公开(公告)号：US08198135B2

公开(公告)日：2012-06-12

申请号：US12943061

申请日：2010-11-10

申请人： Gerhard Klink ,  Christof Landesberger ,  Michael Feil

发明人： Gerhard Klink ,  Christof Landesberger ,  Michael Feil

IPC分类号： H01L21/00 ,  H05K1/16

CPC分类号： H01L23/4985 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/2402 ,  H01L2224/76155 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/005 ,  H05K3/305 ,  H05K3/321 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y10T29/49117 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/0401

摘要： The present invention provides a method for producing integrated circuits which are mechanically flexible and can be provided contiguously on a common flexible carrier substrate. The method includes a step of continuously providing a first flexible substrate which has conductor-line patterns, and a step of mounting the integrated circuits on the first flexible substrate and connecting the integrated circuits to the conductor-line patterns of the first flexible substrate, and a step of covering the circuits mounted on the first flexible substrate with a second flexible substrate, recesses being provided in the first or second flexible substrates in order to make the conductor-line patterns of the first flexible substrate accessible. The step of covering has the sub-step of continuously providing a flexible film with recesses and laminating same onto the flexible integrated circuits mounted on the first flexible substrate, or a sub-step of applying, by a printing technique, a cover on the flexible integrated circuits mounted on the first flexible substrate.

摘要翻译： 本发明提供了一种制造集成电路的方法，所述集成电路机械地是柔性的并且可以连续地设置在共同的柔性载体基板上。 该方法包括连续提供具有导线图案的第一柔性基板的步骤，以及将集成电路安装在第一柔性基板上并将集成电路连接到第一柔性基板的导线图案的步骤，以及 利用第二柔性基板覆盖安装在第一柔性基板上的电路的步骤，在第一柔性基板或第二柔性基板中设置凹槽，以使第一柔性基板的导体线图形可访问。 覆盖步骤具有连续地提供具有凹陷的柔性膜并将其层压到安装在第一柔性基板上的柔性集成电路上的子步骤，或者通过印刷技术将柔性涂覆在柔性基板上的盖子的子步骤 集成电路安装在第一柔性基板上。

公开(公告)号：US06328841B1

公开(公告)日：2001-12-11

申请号：US09269391

申请日：1999-11-05

申请人： Armin Klumpp ,  Christof Landesberger

发明人： Armin Klumpp ,  Christof Landesberger

IPC分类号： B32B3112

CPC分类号： H01L21/2007

摘要： In a method of connecting a first and a second silicon wafer, the first silicon wafer is first provided with a polyimide layer on a main surface thereof. Subsequently, a plasma-induced reaction between the polyimide layer and water is performed. A plasma-induced reaction is also performed between a main surface of the second silicon wafer and chlorine. The main surface of the second silicon wafer is then subjected to a treatment with hydrolyzed triethoxysilylpropanamine. Following this, the surfaces of the two silicon wafers, which have been subjected to the plasma-induced reactions, are joined together so as connect the silicon wafers permanently.

摘要翻译： 在连接第一和第二硅晶片的方法中，第一硅晶片首先在其主表面上设置有聚酰亚胺层。 随后，进行聚酰亚胺层和水之间的等离子体诱导反应。 还在第二硅晶片的主表面和氯之间进行等离子体诱导反应。 然后将第二硅晶片的主表面用水解的三乙氧基甲硅烷基丙胺进行处理。 接下来，已经经受等离子体诱导反应的两个硅晶片的表面被连接在一起，以便永久地连接硅晶片。

公开(公告)号：US20090162566A1

公开(公告)日：2009-06-25

申请号：US12338198

申请日：2008-12-18

申请人： Erwin Yacoub-George ,  Sabine Scherbaum ,  Christof Landesberger

发明人： Erwin Yacoub-George ,  Sabine Scherbaum ,  Christof Landesberger

IPC分类号： B05D3/10

CPC分类号： B05D1/62 ,  B05D3/141 ,  B05D5/083 ,  B05D5/12 ,  B05D7/51 ,  B05D2201/02 ,  B05D2202/00 ,  H05K3/06 ,  H05K3/245 ,  H05K3/282 ,  H05K2201/035 ,  H05K2203/095 ,  H05K2203/1173

摘要： The present invention relates to a method for the selective coating of a surface of a substrate with liquid, wherein the surface to be selectively coated with liquid comprises regions exhibiting different surface energies, and wherein prior to wetting a fluorine-containing plasma gas is directly acting on the regions exhibiting different surface energies.

摘要翻译： 本发明涉及用液体选择性地涂布基材表面的方法，其中待选择性涂布液体的表面包括表现出不同表面能的区域，并且其中在润湿之前，含氟等离子体气体直接作用 在表现出不同表面能的区域。

公开(公告)号：US06756288B1

公开(公告)日：2004-06-29

申请号：US10019138

申请日：2002-06-03

申请人： Michael Feil ,  Christof Landesberger ,  Armin Klumpp ,  Erwin Hacker

发明人： Michael Feil ,  Christof Landesberger ,  Armin Klumpp ,  Erwin Hacker

IPC分类号： H01L21301

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2924/0002 ,  Y10T29/4979 ,  H01L2924/00

摘要： In a method of dicing a wafer, which comprises a plurality of individual circuit structures, a trench is first defined between at least two circuit structures on one face of the wafer. Subsequently, the trench is deepened down to a defined depth. Following this, one face of the wafer has fixed thereto a re-detachable intermediate support composed of a fixed intermediate support substrate and an adhesive medium which is applied to said intermediate support substrate and which can specifically be modified in terms of its adhesive strength, whereupon the wafer is dry-etched from the opposite face so that circuit chips are obtained which are connected to one another only via the intermediate support. Subsequently, the circuit chips are removed from the intermediate support. This method substantially reduces mechanical impairments that may occur during dicing of the circuit chips; on the one hand, this permits the production of circuit chips with a thickness of less than 50 &mgr;m and, on the other hand, it leads to mechanically substantially undamaged circuit chips.

摘要翻译： 在包括多个单独电路结构的晶片切割的方法中，首先在晶片的一个面上的至少两个电路结构之间限定沟槽。 随后，将沟槽加深到限定的深度。 此后，晶片的一个面固定有由固定的中间支撑基板和粘合剂介质组成的可再拆卸的中间支撑件，该中间支撑件施加到所述中间支撑基板上，并且可以根据其粘合强度具体地进行修改， 从相对面干蚀刻晶片，从而获得仅通过中间支撑件相互连接的电路芯片。 随后，将电路芯片从中间支撑件移除。 该方法基本上减少了在电路芯片切割期间可能发生的机械损伤; 一方面，这允许生产厚度小于50um的电路芯片，另一方面它导致机械上基本上未损坏的电路芯片。

公开(公告)号：US06444493B1

公开(公告)日：2002-09-03

申请号：US09857373

申请日：2001-09-21

申请人： Michael Feil ,  Christof Landesberger

发明人： Michael Feil ,  Christof Landesberger

IPC分类号： H01L2144

CPC分类号： H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/00

摘要： In a method for vertically integrating active circuit planes, a first substrate having at least one integrated circuit in a first main surface thereof and further having connecting areas for the integrated circuit as well as outer connecting areas on the first main surface is provided in a first step. A second substrate having at least one integrated circuit in a first main surface thereof and further having connecting areas for the integrated circuit as well as open or openable areas on the first main surface is provided. The first main surfaces of the first and second substrates are joined in such a way that the connecting areas of the first substrate are connected to those of the second substrate in an electrically conductive manner in such a way that the outer connecting areas of the first substrate are in alignment with the open or openable areas of the second substrate. Subsequently, the second substrate is thinned and the outer connecting areas are exposed through the open or openable areas. The resultant chips can be further processed making use of standard methods.

摘要翻译： 在用于垂直积分有源电路平面的方法中，在其第一主表面中具有至少一个集成电路并且还具有集成电路的连接区域以及第一主表面上的外连接区域的第一基板设置在第一 步。 第二基板在其第一主表面中具有至少一个集成电路，并且还具有用于集成电路的连接区域以及第一主表面上的打开或可打开区域。 第一和第二基板的第一主表面以这样的方式接合，使得第一基板的连接区域以导电方式连接到第二基板的连接区域，使得第一基板的外部连接区域 与第二基板的打开或可打开的区域对齐。 随后，第二基板变薄并且外部连接区域通过打开或可打开的区域露出。 所得到的芯片可以使用标准方法进一步加工。