公开(公告)号：US20080157270A1

公开(公告)日：2008-07-03

申请号：US11618757

申请日：2006-12-30

申请人： Deok-kee Kim ,  Anil K. Chinthakindi ,  Son Van Nguyen ,  Kelly Malone ,  Byeongju Park

发明人： Deok-kee Kim ,  Anil K. Chinthakindi ,  Son Van Nguyen ,  Kelly Malone ,  Byeongju Park

IPC分类号： H01L29/00

CPC分类号： H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

摘要： The embodiments of the invention generally relate to fuse and anti-fuse structures and include a copper conductor positioned within a substrate and a metal cap on the first conductor. A low-k dielectric is on the substrate and the metal cap. A tantalum nitride resistor is on the dielectric, and the resistor is positioned above the metal cap such that an antifuse element region of the dielectric is positioned between the resistor and the metal cap. The antifuse element region of the dielectric is adapted to change resistance values by application of a voltage difference between the resistor and the copper conductor/metal cap. The antifuse element region has a first higher resistance (more closely matching an insulator) before application of the voltage and a second lower resistance (more closely matching a conductor) after application of such voltage. In one embodiment herein the voltage can be supplemented by heating through application of voltage through the first conductor which helps change the resistance of the antifuse element region.

摘要翻译： 本发明的实施例一般涉及熔丝和反熔丝结构，并且包括定位在基板内的铜导体和第一导体上的金属盖。 低k电介质位于基板和金属盖上。 电介质上的氮化钽电阻器，电阻器位于金属帽的上方，使得电介质的反熔丝元件区域位于电阻器和金属帽之间。 电介质的反熔丝元件区域适于通过施加电阻器和铜导体/金属帽之间的电压差来改变电阻值。 在施加电压之后，反熔丝元件区域具有第一高电阻（更紧密地匹配绝缘体）和施加电压之后的第二较低电阻（更接近地匹配导体）。 在本文的一个实施例中，可以通过施加通过第一导体的电压进行加热来补充电压，这有助于改变反熔丝元件区域的电阻。

公开(公告)号：US20080157268A1

公开(公告)日：2008-07-03

申请号：US11618749

申请日：2006-12-30

申请人： Deok-kee Kim ,  Anil K. Chinthakindi ,  Kelly Malone ,  Son Van Nguyen ,  Byeongju Park

发明人： Deok-kee Kim ,  Anil K. Chinthakindi ,  Kelly Malone ,  Son Van Nguyen ,  Byeongju Park

IPC分类号： H01L23/525

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A programmable structure such as a write once read many (WORM) or one time programmable read only memories (OTPROM) is disclosed herein. The structure includes a first conductor (such as copper) positioned within a substrate and a metal cap on the first conductor. A low-k dielectric is on the substrate and the metal cap. A tantalum nitride resistor is on the dielectric, and the resistor is positioned above the metal cap such that a programmable region of the dielectric is positioned between the resistor and the metal cap. The first conductor (including the metal cap), the programmable region of the dielectric, and the resistor form a metal-insulator-metal capacitor. Further, the programmable region of the dielectric is adapted to be permanently changed from heat produced by the resistor when a voltage difference is applied to the first and second ends of the resistor, respectively, through the first and second contacts. Thus, the capacitor comprises a first capacitance before the programmable region is permanently changed by the heat from the resistor and comprises a second capacitance after the programmable region is permanently changed by the heat from the resistor.

摘要翻译： 这里公开了诸如一次写入一次读取（WORM）或一次可编程只读存储器（OTPROM）的可编程结构。 该结构包括位于基板内的第一导体（例如铜）和第一导体上的金属盖。 低k电介质位于基板和金属盖上。 电介质上有一个氮化钽电阻器，电阻器位于金属帽的上方，使电介质的可编程区域位于电阻器和金属帽之间。 第一导体（包括金属盖），电介质的可编程区域和电阻器形成金属 - 绝缘体 - 金属电容器。 此外，电介质的可编程区域分别适用于当通过第一和第二触点将电压差分别施加到电阻器的第一和第二端时由电阻器产生的热量永久地改变。 因此，电容器包括在可编程区域被来自电阻器的热量永久地变化之前的第一电容，并且在可编程区域被来自电阻器的热量永久地改变之后包括第二电容。

公开(公告)号：US20080124815A1

公开(公告)日：2008-05-29

申请号：US11556560

申请日：2006-11-03

申请人： Kelly Malone ,  Son Van Nguyen

发明人： Kelly Malone ,  Son Van Nguyen

IPC分类号： H01L21/02 ,  C08F30/08 ,  C08F12/28 ,  C08F210/00

CPC分类号： C08F290/06 ,  C08F290/068

摘要： The present invention provides a method for repairing a damaged insulating layer in a semiconductor device comprising pre-cleaning the damaged insulating layer of the semiconductor device, depositing a CNH polymeric cap material on said damaged insulating layer, wherein said polymeric cap material comprises between about 10 and about 90 atomic percent C, between about 10 and about 70 atomic percent N, between about 10 and about 55 atomic percent H and at least one active vinyl group following deposition, depositing a further polymeric cap material on said deposited CNH polymeric cap material and treating said semiconductor device with UV irradiation to effectively repair the damaged insulating layer.

摘要翻译： 本发明提供一种修复半导体器件中损坏的绝缘层的方法，包括预先清洁半导体器件损坏的绝缘层，将CNH聚合物盖材料沉积在所述损坏的绝缘层上，其中所述聚合物盖材料包括约10 约90原子％C，约10至约70原子％N，约10至约55原子％H和至少一种活性乙烯基之后沉积，在所述沉积的CNH聚合物盖材料上沉积另外的聚合物盖材料，以及 用紫外线照射处理所述半导体器件，以有效地修复损坏的绝缘层。

公开(公告)号：US08637412B2

公开(公告)日：2014-01-28

申请号：US13214157

申请日：2011-08-19

申请人： Alfred Grill ,  Thomas Jasper Haigh, Jr. ,  Kelly Malone ,  Son Van Nguyen ,  Vishnubhai Vitthalbhai Patel ,  Hosadurga Shobha

发明人： Alfred Grill ,  Thomas Jasper Haigh, Jr. ,  Kelly Malone ,  Son Van Nguyen ,  Vishnubhai Vitthalbhai Patel ,  Hosadurga Shobha

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L29/511 ,  C08J9/26 ,  C08J2201/042 ,  C08J2383/04 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02337 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/76832 ,  H01L23/5329 ,  H01L29/515 ,  H01L2924/0002 ,  H01L2924/00

摘要： A first PECVD process incorporating a silicon oxide precursor alone and then with an organo-silicon precursor with increasing flow while the flow of the silicon oxide precursor is reduced to zero provides a graded carbon adhesion layer whereby the content of C increases with layer thickness and a second PECVD process incorporating an organo-silicon precursor including an organic porogen provides a multiphase ultra-low k dielectric. The multiphase ultra-low k PECVD process uses high frequency radio frequency power just above plasma initiation in a PECVD chamber. An energy post treatment is also provided. A porous SiCOH dielectric material having a k less than 2.7 and a modulus of elasticity greater than 7 GPa is formed.

摘要翻译： 第一PECVD工艺，其单独掺入氧化硅前体，然后与有机硅前驱物同时增加流动，同时氧化硅前体的流动减少至零，从而提供渐变的碳粘附层，由此C的含量随层的厚度而增加， 结合包含有机致孔剂的有机硅前体的第二PECVD工艺提供了多相超低k电介质。 多相超低k PECVD工艺在PECVD室中使用高于等离子体起始的高频射频功率。 还提供了能量后处理。 形成k小于2.7且弹性模量大于7GPa的多孔SiCOH电介质材料。

公开(公告)号：US08476743B2

公开(公告)日：2013-07-02

申请号：US13228857

申请日：2011-09-09

申请人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, Jr. ,  Sanjay Mehta

发明人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, Jr. ,  Sanjay Mehta

IPC分类号： H01L23/58 ,  H01L21/31 ,  C23C8/54 ,  B05D5/12

CPC分类号： H01L21/02112 ,  H01B3/12 ,  H01L21/02274 ,  H01L21/02318 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53252 ,  H01L23/53276 ,  H01L29/1054 ,  H01L29/1606 ,  H01L29/456 ,  H01L29/4908 ,  H01L29/4983 ,  H01L29/78648 ,  H01L2924/0002 ,  H01L2924/00

摘要： A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.

摘要翻译： 提供具有等于或小于3.6的介电常数的富碳碳氮化硼介电膜，其可用作各种电子器件中的组分。 富碳碳氮化硼电介质膜具有C x B y N z的化学式，其中x为35原子％以上，y为6原子％〜32原子％，z为8原子％〜33原子％。

公开(公告)号：US20120175023A1

公开(公告)日：2012-07-12

申请号：US13420728

申请日：2012-03-15

申请人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, JR. ,  Hosadurga Shobha ,  Tuan A. Vo

发明人： Son Van Nguyen ,  Alfred Grill ,  Thomas J. Haigh, JR. ,  Hosadurga Shobha ,  Tuan A. Vo

IPC分类号： C23C8/00 ,  C23C28/04

CPC分类号： H01L21/76849 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76867

摘要： An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal.

摘要翻译： 提供了具有改进的电迁移阻力的互连结构以及形成这种互连结构的方法。 互连结构包括至少位于至少一个开口内的含Cu材料的上表面上的复合M-MOx帽。 复合M-MOx帽包括由与氧和氧化铜相比具有比氧更高的亲和性的金属构成的上部区域和由所述金属的非化学计量氧化物构成的下部区域。

公开(公告)号：US07960294B2

公开(公告)日：2011-06-14

申请号：US12506954

申请日：2009-07-21

申请人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

发明人： Francimar Campana Schmitt ,  Li-Qun Xia ,  Son Van Nguyen ,  Shankar Venkataraman

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/76835 ,  C23C16/0272 ,  C23C16/30 ,  C23C16/325 ,  C23C16/505 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832

摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

摘要翻译： 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及 沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

公开(公告)号：US07892648B2

公开(公告)日：2011-02-22

申请号：US11040778

申请日：2005-01-21

申请人： Daniel C. Edelstein ,  Stephen M. Gates ,  Alfred Grill ,  Michael Lane ,  Robert D. Miller ,  Deborah A. Neumayer ,  Son Van Nguyen

发明人： Daniel C. Edelstein ,  Stephen M. Gates ,  Alfred Grill ,  Michael Lane ,  Robert D. Miller ,  Deborah A. Neumayer ,  Son Van Nguyen

IPC分类号： B32B9/04

CPC分类号： H01L31/103 ,  Y10T428/31663

摘要： A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC═CH, C═CH2, C≡C or a [S]n linkage, where n is a defined above.

摘要翻译： 提供了一种用于包括互连和感测结构的电子结构中具有增强的内聚强度的低k电介质材料，其包括其中一部分C原子键合为Si-CH 3官能团的Si，C，O和H的原子 ，并且C原子的另一部分键合为Si-R-Si，其中R是苯基， - [CH 2] n - ，其中n大于或等于1，HC = CH，C = CH 2，C≡C或 一个[S] n连接，其中n是上面定义的。

公开(公告)号：US07479306B2

公开(公告)日：2009-01-20

申请号：US11132108

申请日：2005-05-18

申请人： Daniel C. Edelstein ,  Stephen M. Gates ,  Alfred Grill ,  Michael Lane ,  Qinghuang Lin ,  Robert D. Miller ,  Deborah A. Neumayer ,  Son Van Nguyen

发明人： Daniel C. Edelstein ,  Stephen M. Gates ,  Alfred Grill ,  Michael Lane ,  Qinghuang Lin ,  Robert D. Miller ,  Deborah A. Neumayer ,  Son Van Nguyen

IPC分类号： C23C16/22

CPC分类号： H01L31/103 ,  Y10T428/31663

摘要： A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC═CH, C═CH2, C≡C or a [S]n linkage, where n is a defined above.

摘要翻译： 提供了一种用于包括互连和感测结构的电子结构中具有增强的内聚强度的低k电介质材料，其包括其中一部分C原子键合为Si-CH 3官能团的Si，C，O和H的原子 ，另一部分C原子键合为Si-R-Si，其中R为苯基， - [CH2] n-，其中n大于或等于1，HC-CH，C-CH2，C≡C或 一个[S] n连接，其中n是上面定义的。

公开(公告)号：US07313858B2

公开(公告)日：2008-01-01

申请号：US10815429

申请日：2004-03-31

申请人： Richard Hsiao ,  Prakash Kasiraj ,  Quang Le ,  Paul Phong Nguyen ,  Son Van Nguyen ,  Denny D. Tang ,  Patrick Rush Webb

发明人： Richard Hsiao ,  Prakash Kasiraj ,  Quang Le ,  Paul Phong Nguyen ,  Son Van Nguyen ,  Denny D. Tang ,  Patrick Rush Webb

IPC分类号： G11B5/17 ,  G11B5/187

CPC分类号： G11B5/3163 ,  G11B5/17 ,  G11B5/313 ,  Y10T29/49043 ,  Y10T29/49048 ,  Y10T29/4906 ,  Y10T29/49064 ,  Y10T29/49073 ,  Y10T29/49165

摘要： A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.

摘要翻译： 提供一种用于制造用于磁头的线圈结构的镶嵌工艺。 在制造过程中，首先沉积绝缘层，之后沉积光致抗蚀剂层。 然后在光致抗蚀剂层上沉积硅介电层。 在掩蔽硅介电层之后，在光致抗蚀剂层和硅介电层中蚀刻至少一个通道。 然后，在至少一个通道中沉积导电种子层。 然后至少一个通道准备用导电材料填充并进行化学/机械抛光以限定线圈结构。