公开(公告)号：US09559077B2

公开(公告)日：2017-01-31

申请号：US14521451

申请日：2014-10-22

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： Akhilesh K. Singh ,  Rama I. Hegde ,  Nishant Lakhera

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/495 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L23/49541 ,  H01L21/4828 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49575 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/11334 ,  H01L2224/11436 ,  H01L2224/1161 ,  H01L2224/119 ,  H01L2224/13005 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16245 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/2761 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/30131 ,  H01L2224/3201 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/32258 ,  H01L2224/3301 ,  H01L2224/33505 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81201 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/83201 ,  H01L2224/83385 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/83907 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/92 ,  H01L2224/9205 ,  H01L2224/9222 ,  H01L2224/92227 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/1715 ,  H01L2924/17747 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/0782 ,  H01L2224/81 ,  H01L2224/114 ,  H01L2924/0781 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for forming a packaged semiconductor device includes attaching a first major surface of a semiconductor die to a plurality of protrusions extending from a package substrate. A top surface of each protrusion has a die attach material, and the plurality of protrusions define an open region between the first major surface of the semiconductor die and the package substrate. Interconnects are formed between a second major surface of the semiconductor die and the package substrate in which the second major surface opposite the first major surface. An encapsulant material is formed over the semiconductor die and the interconnects.

摘要翻译： 一种形成封装半导体器件的方法包括将半导体管芯的第一主表面附接到从封装衬底延伸的多个突起。 每个突起的顶表面具有管芯附接材料，并且多个突起限定半导体管芯的第一主表面和封装衬底之间的开放区域。 在半导体管芯的第二主表面和与第一主表面相对的第二主表面的封装衬底之间形成互连。 在半导体管芯和互连件之上形成密封剂材料。

公开(公告)号：US09508632B1

公开(公告)日：2016-11-29

申请号：US14749243

申请日：2015-06-24

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： Navas Khan Oratti Kalandar ,  Nishant Lakhera ,  Varughese Mathew ,  Akhilesh K. Singh

IPC分类号： H01L23/495 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC分类号： H01L23/49537 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49551 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/023 ,  H01L2224/0233 ,  H01L2224/0235 ,  H01L2224/08145 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/3003 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/3303 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/97 ,  H01L2225/06503 ,  H01L2225/06527 ,  H01L2225/1011 ,  H01L2225/1041 ,  H01L2225/1047 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/19102 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor structure includes a lead frame having a flag and a plurality of leads, a semiconductor die attached to a first major surface of the flag, and a plurality of re-routed lead fingers attached to the lead frame. The plurality of leads has a first pitch. The first end of each re-routed lead finger is attached to a lead of the plurality of leads. Each re-routed lead finger extends over the semiconductor die such that a second end of each re-routed lead finger is over and spaced apart from the flag of the lead frame. The second ends of the plurality of re-routed lead fingers has a second pitch different from the first pitch.

摘要翻译： 半导体结构包括具有标志和多个引线的引线框架，附接到所述标记的第一主表面的半导体管芯以及附接到引线框架的多个重新布线的引线指示器。 多个引线具有第一间距。 每个重新布线的引线指的第一端附接到多个引线的引线。 每个重新布线的引线指在半导体管芯上延伸，使得每个重新布线的引线指的第二端在引线框架的标志之上并与之分开。 多个重新布线的引线指的第二端具有不同于第一间距的第二间距。

公开(公告)号：US09978614B2

公开(公告)日：2018-05-22

申请号：US15191870

申请日：2016-06-24

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： Nishant Lakhera ,  James R. Guajardo ,  Varughese Mathew ,  Akhilesh K. Singh

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L21/565 ,  H01L21/78 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A packaged semiconductor device includes a substrate, an electronic device coupled to the substrate, encapsulant including a first major surface surrounding the electronic device, and an oxygen barrier layer within fifty percent of a thickness of the encapsulant from a second major surface of the encapsulant. The oxygen barrier covers at least a portion of an area of the second major surface of the encapsulant to help reduce or eliminate warping of the encapsulant and/or the substrate of the packaged semiconductor device due to oxidation. A thickness of the oxygen barrier layer is less than 100 microns.

公开(公告)号：US10147645B2

公开(公告)日：2018-12-04

申请号：US14861843

申请日：2015-09-22

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： Navas Khan Oratti Kalandar ,  Nishant Lakhera ,  Akhilesh K. Singh

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L21/78 ,  H01L21/56 ,  H01L21/304 ,  H01L23/31 ,  H01L23/00

摘要： A method of processing a semiconductor wafer includes forming a plurality of die in the semiconductor wafer. The semiconductor wafer has a first brittleness. The top surface the semiconductor wafer undergoes grinding to leave an inner planar surface and a rim, wherein the rim extends above the inner planar surface and around a perimeter of the grinded semiconductor wafer. The first encapsulant material is formed over the inner planar surface and contained within the rim to form a composite semiconductor wafer that has a second brittleness less than the first brittleness. The composite semiconductor wafer is singulated into the plurality of die in which each die of the plurality of die is a composite structure die.

公开(公告)号：US09691637B2

公开(公告)日：2017-06-27

申请号：US14877467

申请日：2015-10-07

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： Navas Khan Oratti Kalandar ,  Nishant Lakhera ,  Akhilesh K. Singh

IPC分类号： H01L21/56 ,  H01L21/78

CPC分类号： H01L21/563 ,  H01L21/561 ,  H01L21/78 ,  H01L23/16 ,  H01L23/295 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/8546 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/141 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00

摘要： A method of fabricating a plurality of semiconductor devices includes attaching a plurality of integrated circuit (IC) die to a substrate including forming electric connections between contacts on the IC die and contacts on the substrate. After the IC die is attached to the substrate, a first encapsulating material is placed over stress-sensitive areas of the IC die. The first encapsulating material includes thirty percent or less of filler particles greater than a specified size. A second encapsulating material is placed over the first encapsulating material. The second encapsulating material includes sixty percent or more of filler particles.

公开(公告)号：US09598280B2

公开(公告)日：2017-03-21

申请号：US14537529

申请日：2014-11-10

申请人： Freescale Semiconductor, Inc.

发明人： Akhilesh K. Singh ,  Dwight L. Daniels ,  Darrel R. Frear ,  Stephen R. Hooper

IPC分类号： H01L23/29 ,  H01L23/31 ,  H01L23/26 ,  B81C1/00

CPC分类号： B81C1/00309 ,  B81B2201/0264 ,  B81B2207/012 ,  H01L23/26 ,  H01L23/29 ,  H01L23/3135 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49109 ,  H01L2924/00014

摘要： A device in which an electronic circuit positioned within a cavity of a package housing is encased by a bubble restrictor material, with a media resistant material overlaying the bubble restrictor material. The bubble restrictor material functions to inhibit the formation and growth of moisture-related bubbles within the material, including at the interfaces of the material and surfaces within the package housing. The media resistant material is resistant to physical and chemical alterations by media within an external environment to which the device is exposed. The media resistant material and bubble resistant material function to transfer a sensed characteristic of the media to the electronic circuit.