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公开(公告)号：US07138068B2
公开(公告)日：2006-11-21
申请号：US11084938
申请日：2005-03-21
IPC分类号： H01L21/302
CPC分类号： C23F1/40 , C23F1/02 , C23F1/32 , C23F1/34 , H05K1/162 , H05K3/0044 , H05K3/025 , H05K3/06 , H05K3/429 , H05K2201/0175 , H05K2201/0179 , H05K2201/09309 , H05K2201/09509 , H05K2203/025 , H05K2203/0746
摘要： A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating (1305, 1310) a ceramic oxide layer (510) overlying a conductive metal layer (515) overlying a printed circuit substrate (505), perforating (1320) the ceramic oxide layer within a region (705), and removing (1325) the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.
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公开(公告)号：US20080092376A1
公开(公告)日：2008-04-24
申请号：US11552368
申请日：2006-10-24
IPC分类号： H01L21/00
CPC分类号： H05K3/20 , H05K1/167 , H05K3/06 , H05K3/205 , H05K3/244 , H05K2201/0361 , H05K2203/0376 , H05K2203/0384 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49144 , Y10T29/49155 , Y10T29/49156
摘要： Fabricating (100, 1300) a printed circuit board includes fabricating patterned conductive traces (305, 310, 1410, 1415) onto a foil, laminating the patterned conductive traces to a printed circuit board substrate (405, 1505) by pressing on the foil, such that the conductive traces are pressed into a dielectric layer of the printed circuit board, and removing the foil to expose a co-planar surface of conductive trace surfaces and dielectric surfaces. Removal may be done by peeling (125) and/or etching (130, 1315).
摘要翻译： 制造（100,1300）印刷电路板包括在箔上制造图案化的导电迹线（305,310,1410,1415），通过压在箔上将图案化的导电迹线层压到印刷电路板衬底（405,1505）上， 使得导电迹线被压入印刷电路板的电介质层，并且去除箔以暴露导电迹线表面和电介质表面的共面表面。 可以通过剥离（125）和/或蚀刻（130,1315）进行去除。
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公开(公告)号：US07361847B2
公开(公告)日：2008-04-22
申请号：US11323515
申请日：2005-12-30
IPC分类号： H05K1/16
CPC分类号： H05K1/162 , H05K3/429 , H05K3/4602 , H05K3/4652 , H05K2201/0175 , H05K2201/09309 , H05K2201/09509 , H05K2201/09536 , H05K2201/09718
摘要： A method is for fabricating an embedded capacitance printed circuit board assembly (400, 1100). The embedded capacitance printed circuit board assembly includes two embedded capacitance structures (110). Each capacitance structure (110) includes a crystallized dielectric oxide layer (115) sandwiched between an outer electrode layer (120) and an inner electrode layer (125) in which the two inner electrode layers are electrically connected together. A rivet via (1315) and a stacked via (1110) formed from a button via (910) and a stacked blind via (1111) may be used to electrically connect the two inner electrode layers together. A spindle via (525) may be formed through the inner and outer layers. The multi-layer printed circuit board may be formed from a capacitive laminate (100) that includes two capacitance structures.
摘要翻译： 一种用于制造嵌入式电容印刷电路板组件（400,1100）的方法。 嵌入式电容印刷电路板组件包括两个嵌入式电容结构（110）。 每个电容结构（110）包括夹在两个内部电极层电连接在一起的外部电极层（120）和内部电极层（125）之间的结晶化电介质氧化物层（115）。 可以使用铆钉通孔（1315）和由按钮通孔（910）和堆叠的通孔（1111）形成的堆叠通孔（1110）将两个内部电极层电连接在一起。 主轴通孔（525）可以通过内层和外层形成。 多层印刷电路板可以由包括两个电容结构的电容层压板（100）形成。
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公开(公告)号：US07451540B2
公开(公告)日：2008-11-18
申请号：US11552368
申请日：2006-10-24
CPC分类号： H05K3/20 , H05K1/167 , H05K3/06 , H05K3/205 , H05K3/244 , H05K2201/0361 , H05K2203/0376 , H05K2203/0384 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49144 , Y10T29/49155 , Y10T29/49156
摘要： Fabricating (100, 1300) a printed circuit board includes fabricating patterned conductive traces (305, 310, 1410, 1415) onto a foil, laminating the patterned conductive traces to a printed circuit board substrate (405, 1505) by pressing on the foil, such that the conductive traces are pressed into a dielectric layer of the printed circuit board, and removing the foil to expose a co-planar surface of conductive trace surfaces and dielectric surfaces. Removal may be done by peeling (125) and/or etching (130, 1315).
摘要翻译： 制造（100,1300）印刷电路板包括在箔上制造图案化的导电迹线（305,310,1410,1415），通过压在箔上将图案化的导电迹线层压到印刷电路板衬底（405,1505）上， 使得导电迹线被压入印刷电路板的电介质层，并且去除箔以暴露导电迹线表面和电介质表面的共面表面。 可以通过剥离（125）和/或蚀刻（130,1315）进行去除。
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公开(公告)号：US20080121420A1
公开(公告)日：2008-05-29
申请号：US11557711
申请日：2006-11-08
IPC分类号： H05K1/00
CPC分类号： H05K3/427 , H05K1/115 , H05K3/0032 , H05K3/0035 , H05K3/0038 , H05K3/0047 , H05K3/4602 , H05K2201/0394 , H05K2201/0959 , H05K2201/0969 , H05K2201/097 , H05K2201/09845 , H05K2203/1476
摘要： Closed vias are formed in a multilayer printed circuit board by laminating a dielectric layer to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer. Resin from one dielectric layer fills the cavities of approximately one half of the closed vias, and resin from the other dielectric layer fills the circular cavities of the remainder of the closed vias. The total amount of resin migrated from each of the dielectric layers into the closed via cavities is approximately equal.
摘要翻译： 通过在每侧具有金属层的中心芯的一侧层叠电介质层，在多层印刷电路板中形成封闭的通孔。 第二电介质层被层压到中心芯的另一侧。 已经通过部分地穿过但不完全穿透中心芯而形成中心芯上的闭合的通孔，然后通过直径小得多的孔从相对侧完成通孔，以形成完全穿透中心芯的通路 从一边到另一边。 然后通孔用金属电镀以基本上闭合较小的孔。 闭合通孔的大约一半被定位成使得闭合孔面对一个电介质层，并且其余的封闭通孔被定位成使得闭合孔面对另一介电层。 来自一个介电层的树脂填充了大约一半的封闭通孔的空腔，而另一个介电层的树脂填充了其余的封闭通孔的圆形空腔。 从每个介电层迁移到封闭通孔中的树脂的总量近似相等。
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公开(公告)号：US20080119041A1
公开(公告)日：2008-05-22
申请号：US11557690
申请日：2006-11-08
IPC分类号： H05K3/30 , H01L21/4763
CPC分类号： H05K3/427 , H05K1/115 , H05K3/0032 , H05K3/0035 , H05K3/0038 , H05K3/0047 , H05K3/4602 , H05K3/4652 , H05K2201/0394 , H05K2201/0959 , H05K2201/0969 , H05K2201/097 , H05K2201/09845 , H05K2203/1476 , Y10T29/49165
摘要： A method for forming closed vias in a multilayer printed circuit board. A dielectric layer is laminated to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer. Resin from one dielectric layer fills the cavities of approximately one half of the closed vias, and resin from the other dielectric layer fills the circular cavities of the remainder of the closed vias. The total amount of resin migrated from each of the dielectric layers into the closed via cavities is approximately equal.
摘要翻译： 一种在多层印刷电路板中形成封闭通孔的方法。 电介质层被层叠在每侧具有金属层的中心芯的一侧。 第二电介质层被层压到中心芯的另一侧。 已经通过部分地穿过但不完全穿透中心芯而形成中心芯上的闭合的通孔，然后通过直径小得多的孔从相对侧完成通孔，以形成完全穿透中心芯的通路 从一边到另一边。 然后通孔用金属电镀以基本上闭合较小的孔。 闭合通孔的大约一半被定位成使得闭合孔面对一个电介质层，并且其余的封闭通孔被定位成使得闭合孔面对另一介电层。 来自一个介电层的树脂填充了大约一半的封闭通孔的空腔，而另一个介电层的树脂填充了其余的封闭通孔的圆形空腔。 从每个介电层迁移到封闭通孔中的树脂的总量近似相等。
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公开(公告)号：US07427562B2
公开(公告)日：2008-09-23
申请号：US11557690
申请日：2006-11-08
IPC分类号： H01L21/4763
CPC分类号： H05K3/427 , H05K1/115 , H05K3/0032 , H05K3/0035 , H05K3/0038 , H05K3/0047 , H05K3/4602 , H05K3/4652 , H05K2201/0394 , H05K2201/0959 , H05K2201/0969 , H05K2201/097 , H05K2201/09845 , H05K2203/1476 , Y10T29/49165
摘要： A method for forming closed vias in a multilayer printed circuit board. A dielectric layer is laminated to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer. Resin from one dielectric layer fills the cavities of approximately one half of the closed vias, and resin from the other dielectric layer fills the circular cavities of the remainder of the closed vias. The total amount of resin migrated from each of the dielectric layers into the closed via cavities is approximately equal.
摘要翻译： 一种在多层印刷电路板中形成封闭通孔的方法。 电介质层被层叠在每侧具有金属层的中心芯的一侧。 第二电介质层被层压到中心芯的另一侧。 已经通过部分地穿过但不完全穿透中心芯而形成中心芯上的闭合的通孔，然后通过直径小得多的孔从相对侧完成通孔，以形成完全穿透中心芯的通路 从一边到另一边。 然后通孔用金属电镀以基本上闭合较小的孔。 闭合通孔的大约一半被定位成使得闭合孔面对一个电介质层，并且其余的封闭通孔被定位成使得闭合孔面对另一介电层。 来自一个介电层的树脂填充了大约一半的封闭通孔的空腔，而另一个介电层的树脂填充了其余的封闭通孔的圆形空腔。 从每个介电层迁移到封闭通孔中的树脂的总量近似相等。
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公开(公告)号：US20080003414A1
公开(公告)日：2008-01-03
申请号：US11428454
申请日：2006-07-03
IPC分类号： B32B3/00
CPC分类号： H05K3/428 , H05K1/116 , H05K3/0008 , H05K3/0047 , H05K3/025 , H05K3/205 , H05K3/427 , H05K2201/09063 , H05K2201/09918 , H05K2203/1438 , Y10T428/24917
摘要： A sequentially laminated printed circuit board having highly reliable vias can be fabricated by pattern plating flanges or via lands on a copper foil, laminating the foil to a prepreg so that the flanges are embedded into the surface of the prepreg, creating via holes in the laminate that are substantially concentric with the individual flanges, plating the via holes with copper, chemically or mechanically milling off a portion of the copper plating and optionally some of the copper foil to reduce the overall thickness of the laminate, and laminating a second and optionally a third prepreg to the laminate. The resulting printed circuit board has the flanges embedded in the surface of the laminate so that the inside wall of the flange is electrically and mechanically attached to the outside wall of the plated through hole barrel.
摘要翻译： 具有高度可靠的通孔的顺序层压的印刷电路板可以通过铜箔上的图案电镀法兰或通孔焊盘来制造，将箔层压到预浸料上，使得凸缘嵌入预浸料的表面中，从而在层压板中形成通孔 其与各个凸缘基本同心，用铜电镀通孔，化学或机械地研磨铜镀层的一部分和任选的一些铜箔以减小层压体的总厚度，并层压第二和任选的 第三预浸料。 所得到的印刷电路板具有嵌入在层压体的表面中的凸缘，使得凸缘的内壁电连接和机械地附接到电镀通孔筒的外壁。
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公开(公告)号：US07557304B2
公开(公告)日：2009-07-07
申请号：US11557711
申请日：2006-11-08
CPC分类号： H05K3/427 , H05K1/115 , H05K3/0032 , H05K3/0035 , H05K3/0038 , H05K3/0047 , H05K3/4602 , H05K2201/0394 , H05K2201/0959 , H05K2201/0969 , H05K2201/097 , H05K2201/09845 , H05K2203/1476
摘要： Closed vias are formed in a multilayer printed circuit board by laminating a dielectric layer to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer. Resin from one dielectric layer fills the cavities of approximately one half of the closed vias, and resin from the other dielectric layer fills the circular cavities of the remainder of the closed vias. The total amount of resin migrated from each of the dielectric layers into the closed via cavities is approximately equal.
摘要翻译： 通过在每侧具有金属层的中心芯的一侧层叠电介质层，在多层印刷电路板中形成封闭的通孔。 第二电介质层被层压到中心芯的另一侧。 已经通过部分地穿过但不完全穿透中心芯而形成中心芯上的闭合的通孔，然后通过直径小得多的孔从相对侧完成通孔，以形成完全穿透中心芯的通路 从一边到另一边。 然后通孔用金属电镀以基本上闭合较小的孔。 闭合通孔的大约一半被定位成使得闭合孔面对一个电介质层，并且其余的封闭通孔被定位成使得闭合孔面对另一介电层。 来自一个介电层的树脂填充了大约一半的封闭通孔的空腔，而另一个介电层的树脂填充了其余的封闭通孔的圆形空腔。 从每个介电层迁移到封闭通孔中的树脂的总量近似相等。
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公开(公告)号：US07459202B2
公开(公告)日：2008-12-02
申请号：US11428454
申请日：2006-07-03
CPC分类号： H05K3/428 , H05K1/116 , H05K3/0008 , H05K3/0047 , H05K3/025 , H05K3/205 , H05K3/427 , H05K2201/09063 , H05K2201/09918 , H05K2203/1438 , Y10T428/24917
摘要： A sequentially laminated printed circuit board having highly reliable vias can be fabricated by pattern plating flanges or via lands on a copper foil, laminating the foil to a prepreg so that the flanges are embedded into the surface of the prepreg, creating via holes in the laminate that are substantially concentric with the individual flanges, plating the via holes with copper, chemically or mechanically milling off a portion of the copper plating and optionally some of the copper foil to reduce the overall thickness of the laminate, and laminating a second and optionally a third prepreg to the laminate. The resulting printed circuit board has the flanges embedded in the surface of the laminate so that the inside wall of the flange is electrically and mechanically attached to the outside wall of the plated through hole barrel.
摘要翻译： 具有高度可靠的通孔的顺序层压的印刷电路板可以通过铜箔上的图案电镀法兰或通孔焊盘来制造，将箔层压到预浸料上，使得凸缘嵌入预浸料的表面中，从而在层压板中形成通孔 其与各个凸缘基本同心，用铜电镀通孔，化学或机械地研磨铜镀层的一部分和任选的一些铜箔以减小层压体的总厚度，并层压第二和任选的 第三预浸料。 所得到的印刷电路板具有嵌入在层压体的表面中的凸缘，使得凸缘的内壁电连接和机械地附接到电镀通孔筒的外壁。
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