摘要:
A static RAM includes pre-amplifiers, which are made up solely of emitter-follower transistors having their collectors supplied with the power voltage, in one-to-one correspondence to sub common data line pairs which are connected by column switches to complementary data line pairs of memory arrays. The pre-amplifier is provided with a first switch which turns on during the selected state to connect the sub common data line pair to the bases of the transistors and a second switch which turns on during the unselected state to provide the bases with a certain bias voltage lower than the readout signal voltage on the sub common data line pair. The emitter-follower transistors have their emitters connected commonly to form common emitter lines, which are connected to pairs of input terminals of main amplifiers made up of CMOS transistors.
摘要:
A memory device comprising a memory array having a plurality of bits, including parity bits, and comprising a plurality of memory blocks, and a bit structure changing section for changing the input/output bits of the memory array, wherein the number of the memory blocks are prescribed to be an integral multiple of three and the input/output bits of the plurality of memory blocks are even. Thereby, the bit structure of the semiconductor memory, having parity bits and which is capable of changing the input/output bits to a plurality of bit structures, can be changed while maintaining the bit structure of the memory blocks even and without increase in propagation delay time.
摘要:
An electric apparatus has a plurality of electric parts and a casing made of electrically conductive material for accommodating therein or mounting thereon a plurality of electric parts. The casing, which has a cavity therein, is provided with a plurality of projections for radiating heat generated by the electric parts in the cavity. The casing is provided with openings for allowing a heat conductive medium to flow into and out of the casing. Further, an electric apparatus has a plurality of electric parts and a casing made of electrically conductive material for accommodating therein or mounting thereon a plurality of electric parts. The casing is provided with openings for allowing a heat conductive medium to flow into and out of the casing. The casing is provided therein with a partition wall which is made of electrically conductive material for dividing the interior of the casing into a plurality of zones along a direction of a flow of the heat conductive medium.
摘要:
A logic circuit is provided for a memory device which can be operated at a high speed with a lower voltage power source level than conventional devices. This logic circuit can be used in a multi-bit test circuit executing the wired-OR-logic operation of complementary logic signals from a plurality of pre-sense amplifiers, receiving the output of the wired-OR-logic operation by an emitter follower using a bipolar transistor, and outputting an AND signal of the complementary logic signals by a level comparing circuit. A sense amplifier is also provided for executing the wired-OR-logic operation of complementary logic signals from a plurality of pre-sense amplifiers, raising the level of the output of the wired-OR-logic operation by a level shift circuit having a semiconductor element for applying an inverse bias potential to an input signal, executing the wired-OR-operation of the shifted up output and outputs from other blocks, and receiving and amplifying the output of the wired-OR-logic operation.
摘要:
There is provided a method of controlling an internal address signal of an RAM in which a late-write method is realized on a chip. Two sets of address registers for reading and writing are provided for each address and further a middle register is provided between the two sets of address registers. The middle register is controlled by a signal formed by obtaining the AND result of a clock signal and a write enable signal and the two sets of address registers for reading and writing are controlled only by the clock signal. A selection circuit selects outputs of the two sets of address registers as an input in accordance with the write enable signal to control an internal address.
摘要:
An area of a semiconductor chip, on which a memory is disposed, is divided into a plurality of memory blocks and redundant memory blocks, each memory block is divided into a plurality of unit arrays of columns for replacing, each redundant memory block is divided into a plurality of unit arrays of redundant columns, a plurality of memory cells are disposed in each unit array of columns for replacing and each unit array of redundant columns, a memory cell group in each unit array of columns for replacing is connected to a word line and a data line, a redundant memory cell group of each unit array of redundant columns is connected to a redundant word line and a redundant data line, a first data selection circuit for controlling data selection with respect to the unit array of redundant columns is disposed in each memory block, a second data selection circuit for controlling data selecting with respect to the unit array group of redundant columns is disposed in each redundant memory block, and a third data selection circuit for selecting and transmitting only data selected either of the data selection circuit is disposed, wherein, if each memory block has no defect, data selected by the first data selection circuit, that is, data selected from the unit array of columns for replacing of each memory block is transmitted as it is by way of the third data selection circuit, if any one of the memory blocks has a defect, data selection with respect to the unit array of columns for replacing that has encountered the defect is inhibited, the unit array of redundant columns of the redundant memory block is instructed in place of the unit array of columns for replacing that has encountered the defect, and data is, by the second data selection circuit, selected from the selected unit array of redundant columns in place of the replacement unit array that has encountered the defect as to transmit the selected data by way of the third data selection circuit.
摘要:
A power storage device has a plurality of series-connected storage battery units, battery circuits associated with the storage battery units to control or monitor the storage battery units, respectively; a main circuit of a potential level different from that of the battery circuits; and a potential level changing circuits connecting the battery circuit to the main circuit. The power storage unit is small in construction and operates at a low power consumption in a high control accuracy.
摘要:
A synchronous memory device is provided in which the cycle time is shorter than conventional memory devices. For example, by providing an output latch in a sense amplifier on a bit line, the time period from input of a clock signal to latching data in the output latch is shortened. In case of plural bit lines, a selector for selecting data in a plural output latch and a latch for latching a sense amplifier selection are provided.
摘要:
A driver circuit wherein a first switching element and a second switching element are totem-pole-connected, wherein the totem pole connection is connected at its one end, node and other end with a power source, an output to a load and a reference potential, respectively, wherein the first switching element is connected between the one end and the node, wherein the second switching element is connected between the node and the other end, and wherein a third switching element is connected between the one end of the totem pole connection and the control terminal of the first switching element.
摘要:
In a lateral-type power MOSFET, high breakdown voltage is achieved with suppressing to increase a cell pitch, and a feedback capacity and an ON resistance are decreased. An n− type silicon region having a high resistance to be a region of maintaining a breakdown voltage is vertically provided with respect to a main surface of an n+ type silicon substrate, and the n− type silicon region having the high resistance is connected to the n+ type silicon substrate. Also, a conductive substance is filled through an insulating substance inside a trench formed to reach the n+ type silicon substrate from the main surface of the n+ type silicon substrate so as to contact with the n− type silicon region having the high resistance, and the conductive substance is electrically connected to a source electrode.
摘要翻译:在横向型功率MOSFET中,通过抑制增加电池间距而实现高的击穿电压,并且降低反馈容量和导通电阻。 相对于n +型硅衬底的主表面垂直地设置具有高电阻的n型硅区域作为保持击穿电压的区域,并且具有高电阻的n型硅区域连接到 n +型硅衬底。 此外,导电物质通过绝缘物质填充在形成为从n +型硅衬底的主表面到达n +型硅衬底的沟槽内,以便与具有高电阻的n型硅区接触,并且 导电物质电连接到源电极。