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1.发明申请Method and system for modifying a gate dielectric stack containing a high-k layer using plasma processing 有权使用等离子体处理修改包含高k层的栅极电介质叠层的方法和系统公开(公告)号：US20060040483A1
公开(公告)日：2006-02-23
申请号：US10920990
申请日：2004-08-18
IPC分类号： H01L21/3205
CPC分类号： H01L21/022 , H01L21/02142 , H01L21/02175 , H01L21/02274 , H01L21/28185 , H01L21/28202 , H01L21/3115 , H01L21/3144 , H01L21/3165 , H01L29/513 , H01L29/517
摘要： A method and system for modifying a gate dielectric stack by exposure to a plasma. The method includes providing the gate dielectric stack having a high-k layer formed on a substrate, generating a plasma from a process gas containing an inert gas and one of an oxygen-containing gas or a nitrogen-containing gas, where the process gas pressure is selected to control the amount of neutral radicals relative to the amount of ionic radicals in the plasma, and modifying the gate dielectric stack by exposing the stack to the plasma.
摘要翻译： 一种用于通过暴露于等离子体来修改栅极电介质叠层的方法和系统。 该方法包括提供具有形成在衬底上的高k层的栅极电介质堆叠，从含有惰性气体和含氧气体或含氮气体中的一种的工艺气体产生等离子体，其中工艺气体压力 被选择为相对于等离子体中的离子基团的量来控制中性自由基的量，以及通过将该叠层暴露于等离子体来修改栅极电介质堆叠。
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2.发明授权Method and system for modifying a gate dielectric stack containing a high-k layer using plasma processing 有权使用等离子体处理修改包含高k层的栅极电介质叠层的方法和系统公开(公告)号：US07163877B2
公开(公告)日：2007-01-16
申请号：US10920990
申请日：2004-08-18
CPC分类号： H01L21/022 , H01L21/02142 , H01L21/02175 , H01L21/02274 , H01L21/28185 , H01L21/28202 , H01L21/3115 , H01L21/3144 , H01L21/3165 , H01L29/513 , H01L29/517
摘要： A method and system for modifying a gate dielectric stack by exposure to a plasma. The method includes providing the gate dielectric stack having a high-k layer formed on a substrate, generating a plasma from a process gas containing an inert gas and one of an oxygen-containing gas or a nitrogen-containing gas, where the process gas pressure is selected to control the amount of neutral radicals relative to the amount of ionic radicals in the plasma, and modifying the gate dielectric stack by exposing the stack to the plasma.
摘要翻译： 一种用于通过暴露于等离子体来修改栅极电介质叠层的方法和系统。 该方法包括提供具有形成在衬底上的高k层的栅极电介质堆叠，从含有惰性气体和含氧气体或含氮气体中的一种的工艺气体产生等离子体，其中工艺气体压力 被选择为相对于等离子体中的离子基团的量来控制中性自由基的量，以及通过将该叠层暴露于等离子体来修改栅极电介质堆叠。
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3.发明授权Method to maximize nitrogen concentration at the top surface of gate dielectrics 有权最大化栅极电介质顶表面的氮浓度的方法公开(公告)号：US08198184B2
公开(公告)日：2012-06-12
申请号：US12570620
申请日：2009-09-30
IPC分类号： H01L29/78 , H01L21/336 , H01L21/314
CPC分类号： H01L21/28202 , H01L21/3145 , H01L21/3185 , H01L29/4916 , H01L29/518 , H01L29/7833
摘要： An integrated circuit having a gate dielectric layer (414, 614, 814) having an improved nitrogen profile and a method of fabrication. The gate dielectric layer is a graded layer with a significantly higher nitrogen concentration at the electrode surface than near the substrate surface. An amorphous silicon layer (406) may be deposited prior to nitridation to retain the nitrogen concentration at the top surface (416). Alternatively, a thin silicon nitride layer (610) may be deposited after anneal or a wet nitridation process may be performed.
摘要翻译： 一种具有具有改进的氮分布的栅介电层（414,614,814）和一种制造方法的集成电路。 栅极电介质层是在电极表面处的氮浓度显着高于衬底表面附近的梯度层。 可以在氮化之前沉积非晶硅层（406）以将氮浓度保持在顶表面（416）。 或者，可以在退火之后沉积薄氮化硅层（610），或者可以执行湿式氮化处理。
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公开(公告)号：US20070042555A1
公开(公告)日：2007-02-22
申请号：US11205477
申请日：2005-08-17
申请人： Hiroaki Niimi , Luigi Colombo , James Chambers
发明人： Hiroaki Niimi , Luigi Colombo , James Chambers
IPC分类号： H01L21/336 , H01L21/3205 , H01L21/8234
CPC分类号： H01L21/823462 , H01L21/28185 , H01L21/28229 , H01L21/31645 , H01L21/823857 , H01L21/8249 , H01L29/517
摘要： The present invention provides method of forming a gate dielectric that includes forming a metal source layer (210) comprising a metal and at least one nonmetallic element over a substrate (110). The metal source layer (210) is formed having a composition rich in the metal. A dielectric layer (310) comprising the metal is formed over the metal source layer (210).
摘要翻译： 本发明提供了形成栅极电介质的方法，其包括在衬底（110）上形成包括金属和至少一种非金属元素的金属源层（210）。 金属源层（210）形成为具有富含金属的组成。 在金属源层（210）之上形成包括金属的电介质层（310）。
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公开(公告)号：US07799668B2
公开(公告)日：2010-09-21
申请号：US11205477
申请日：2005-08-17
申请人： Hiroaki Niimi , Luigi Colombo , James J. Chambers
发明人： Hiroaki Niimi , Luigi Colombo , James J. Chambers
IPC分类号： H01L21/3205
CPC分类号： H01L21/823462 , H01L21/28185 , H01L21/28229 , H01L21/31645 , H01L21/823857 , H01L21/8249 , H01L29/517
摘要： The present invention provides method of forming a gate dielectric that includes forming a metal source layer (210) comprising a metal and at least one nonmetallic element over a substrate (110). The metal source layer (210) is formed having a composition rich in the metal. A dielectric layer (310) comprising the metal is formed over the metal source layer (210).
摘要翻译： 本发明提供了形成栅极电介质的方法，其包括在衬底（110）上形成包括金属和至少一种非金属元素的金属源层（210）。 金属源层（210）形成为具有富含金属的组成。 在金属源层（210）之上形成包括金属的电介质层（310）。
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6.发明授权公开(公告)号：US08643113B2
公开(公告)日：2014-02-04
申请号：US12275812
申请日：2008-11-21
IPC分类号： H01L21/70
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/28185 , H01L21/3221 , H01L21/823807 , H01L21/823814 , H01L21/823857 , H01L27/092 , H01L27/11 , H01L29/401 , H01L29/42364 , H01L29/51 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7833
摘要： A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
摘要翻译： 公开了一种用于在PMOS金属栅中的氧和NMOS栅极中的金属原子富集的NMOS和PMOS晶体管形成金属替代栅极的工艺，使得PMOS栅极具有高于4.85eV的有效功函数，并且NMOS栅极具有以下有效的功函数 4.25 eV。 NMOS和PMOS栅极中的金属功函数层被氧化，以将它们的有效功函数增加到期望的PMOS范围。 在PMOS栅极上形成氧扩散阻挡层，在NMOS栅极上形成氧吸气剂。 吸气剂退火从NMOS功能层提取氧气，并将金属原子富集添加到NMOS功能层，将其有效功函数降低到所需的NMOS范围。 公开了金属加工功能层的工艺和材料，氧化工艺和吸氧剂。
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7.发明申请Method of Substantially Reducing the Formation of SiGe Abnormal Growths on Polycrystalline Electrodes for Strained-Channel PMOS Transistors 有权用于应变通道PMOS晶体管的多结晶电极上SiGe异常生长形成的方法公开(公告)号：US20140017866A1
公开(公告)日：2014-01-16
申请号：US13550494
申请日：2012-07-16
IPC分类号： H01L21/336 , H01L21/283
CPC分类号： H01L29/7848 , H01L21/28035 , H01L21/3211 , H01L21/32139 , H01L29/165 , H01L29/6653 , H01L29/6656 , H01L29/6659 , H01L29/66636 , H01L29/7834
摘要： The likelihood of forming silicon germanium abnormal growths, which can be undesirably formed on the gate electrode of a strained-channel PMOS transistor at the same time that silicon germanium source and drain regions are formed, is substantially reduced by using protection materials that reduce the likelihood that the gate electrode is exposed during the formation of the silicon germanium source and drain regions.
摘要翻译： 在形成硅锗源极和漏极区域的同时，可能不期望地形成在应变通道PMOS晶体管的栅电极上形成硅锗异常生长的可能性通过使用降低可能性的保护材料而大大减少 在形成硅锗源极和漏极区域期间，栅电极被暴露。
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8.发明申请公开(公告)号：US20110120374A1
公开(公告)日：2011-05-26
申请号：US13017828
申请日：2011-01-31
申请人： Malcolm J. Bevan , Haowen Bu , Hiroaki Niimi , Husam N. Alshareef
发明人： Malcolm J. Bevan , Haowen Bu , Hiroaki Niimi , Husam N. Alshareef
IPC分类号： H01L21/469
CPC分类号： H01L21/28158 , C23C16/45557 , C23C16/4582 , H01J37/32752 , H01J37/32825 , H01J37/32899 , H01J2237/3321 , H01L21/02181 , H01L21/0223 , H01L21/02255 , H01L21/02318 , H01L21/02323 , H01L21/02326 , H01L21/02329 , H01L21/02332 , H01L21/0234 , H01L21/28035 , H01L21/28167 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L21/3105 , H01L21/31604 , H01L21/318 , H01L21/3205 , H01L21/324 , H01L21/67161 , H01L21/67167 , H01L21/67196 , H01L21/67201 , H01L21/6776 , H01L29/42364 , H01L29/4908 , H01L29/4916 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66477 , H01L29/78
摘要： Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
摘要翻译： 可以减少在制造栅极电介质结构中使用的工艺之间发生的栅极介电层的氧化物生长。 氧化物生长的减少可以通过将栅极电介质层保持在有效的方式来实现，以在制造栅极电介质结构中的至少两个顺序的工艺步骤之间减轻栅极电介质层的氧化物生长。 维持栅极电介质层在有效减少氧化物生长的环境中也改善了注入栅电介质的氮的均匀性。
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9.发明申请STRUCTURE AND METHOD FOR METAL GATE STACK OXYGEN CONCENTRATION CONTROL USING AN OXYGEN DIFFUSION BARRIER LAYER AND A SACRIFICIAL OXYGEN GETTERING LAYER 有权使用氧气扩散障碍层和极性氧气捕获层的金属栅极氧化浓度控制的结构和方法公开(公告)号：US20100127336A1
公开(公告)日：2010-05-27
申请号：US12275812
申请日：2008-11-21
IPC分类号： H01L27/092 , H01L21/28
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/28185 , H01L21/3221 , H01L21/823807 , H01L21/823814 , H01L21/823857 , H01L27/092 , H01L27/11 , H01L29/401 , H01L29/42364 , H01L29/51 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7833
摘要： A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
摘要翻译： 公开了一种用于在PMOS金属栅中的氧和NMOS栅极中的金属原子富集的NMOS和PMOS晶体管形成金属替代栅极的工艺，使得PMOS栅极具有高于4.85eV的有效功函数，并且NMOS栅极具有以下有效的功函数 4.25 eV。 NMOS和PMOS栅极中的金属功函数层被氧化，以将它们的有效功函数增加到期望的PMOS范围。 在PMOS栅极上形成氧扩散阻挡层，在NMOS栅极上形成氧吸气剂。 吸气剂退火从NMOS功能层提取氧气，并将金属原子富集添加到NMOS功能层，将其有效功函数降低到所需的NMOS范围。 公开了金属加工功能层的工艺和材料，氧化工艺和吸氧剂。
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10.发明授权Reliable high voltage gate dielectric layers using a dual nitridation process 有权使用双重氮化工艺的可靠的高压栅极电介质层公开(公告)号：US07560792B2
公开(公告)日：2009-07-14
申请号：US11626624
申请日：2007-01-24
申请人： Rajesh Khamankar , Douglas T. Grider , Hiroaki Niimi , April Gurba , Toan Tran , James J. Chambers
发明人： Rajesh Khamankar , Douglas T. Grider , Hiroaki Niimi , April Gurba , Toan Tran , James J. Chambers
IPC分类号： H01L27/105
CPC分类号： H01L21/823462 , H01L21/28185 , H01L21/28202 , H01L21/3144 , H01L29/518
摘要： Dual gate dielectric layers are formed on a semiconductor substrate for MOS transistor fabrication. A first dielectric layer (30) is formed on a semiconductor substrate (10). A first plasma nitridation process is performed on said first dielectric layer. The first dielectric layer (30) is removed in regions of the substrate and a second dielectric layer (50) is formed in these regions. A second plasma nitridation process is performed on the first dielectric layer and the second dielectric layer. MOS transistors (160, 170) are then fabricated using the dielectric layers (30, 50).
摘要翻译： 在用于MOS晶体管制造的半导体衬底上形成双栅介质层。 第一电介质层（30）形成在半导体衬底（10）上。 在所述第一介电层上进行第一等离子体氮化处理。 在衬底的区域中去除第一电介质层（30），并且在这些区域中形成第二电介质层（50）。 在第一电介质层和第二电介质层上进行第二等离子体氮化处理。 然后使用电介质层（30,50）制造MOS晶体管（160,170）。
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