公开(公告)号：US20090115058A1

公开(公告)日：2009-05-07

申请号：US11933572

申请日：2007-11-01

申请人： Hsiu-Mei Yu ,  Tjandra Winata Karta ,  Daniel Yang ,  Shih-Ming Chen ,  Chia-Jen Cheng

发明人： Hsiu-Mei Yu ,  Tjandra Winata Karta ,  Daniel Yang ,  Shih-Ming Chen ,  Chia-Jen Cheng

IPC分类号： H01L23/488

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05552 ,  H01L2924/01004 ,  H01L2924/013 ,  H01L2924/01028 ,  H01L2924/0105

摘要： An integrated circuit structure includes a passivation layer; a via opening in the passivation layer; a copper-containing via in the via opening; a polymer layer over the passivation layer, wherein the polymer layer comprises an aperture, and wherein the copper-containing via is exposed through the aperture; a post-passivation interconnect (PPI) line over the polymer layer, wherein the PPI line extends into the aperture and physically contacts the copper-via opening; and an under-bump metallurgy (UBM) over and electrically connected to the PPI line.

摘要翻译： 集成电路结构包括钝化层; 钝化层中的通孔; 通孔开口中的含铜通孔; 在所述钝化层上的聚合物层，其中所述聚合物层包括孔，并且其中所述含铜通孔通过所述孔露出; 在聚合物层上方的钝化后互连（PPI）线，其中PPI线延伸到孔中并物理接触铜通孔; 以及在PPI线上电连接的凸块下冶金（UBM）。

公开(公告)号：US07863742B2

公开(公告)日：2011-01-04

申请号：US11933572

申请日：2007-11-01

申请人： Hsiu-Mei Yu ,  Tjandra Winata Karta ,  Daniel Yang ,  Shih-Ming Chen ,  Chia-Jen Cheng

发明人： Hsiu-Mei Yu ,  Tjandra Winata Karta ,  Daniel Yang ,  Shih-Ming Chen ,  Chia-Jen Cheng

IPC分类号： H01L23/488

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05552 ,  H01L2924/01004 ,  H01L2924/013 ,  H01L2924/01028 ,  H01L2924/0105

摘要： An integrated circuit structure includes a passivation layer; a via opening in the passivation layer; a copper-containing via in the via opening; a polymer layer over the passivation layer, wherein the polymer layer comprises an aperture, and wherein the copper-containing via is exposed through the aperture; a post-passivation interconnect (PPI) line over the polymer layer, wherein the PPI line extends into the aperture and physically contacts the copper-via opening; and an under-bump metallurgy (UBM) over and electrically connected to the PPI line.

摘要翻译： 集成电路结构包括钝化层; 钝化层中的通孔; 通孔开口中的含铜通孔; 在所述钝化层上的聚合物层，其中所述聚合物层包括孔，并且其中所述含铜通孔通过所述孔露出; 在聚合物层上方的钝化后互连（PPI）线，其中PPI线延伸到孔中并物理接触铜通孔; 以及在PPI线上电连接的凸块下冶金（UBM）。

公开(公告)号：US08624392B2

公开(公告)日：2014-01-07

申请号：US13152734

申请日：2011-06-03

申请人： Ming-Chih Yew ,  Fu-Jen Li ,  Po-Yao Lin ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

发明人： Ming-Chih Yew ,  Fu-Jen Li ,  Po-Yao Lin ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC分类号： H01L23/485

CPC分类号： H01L24/13 ,  H01L21/76885 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/82 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05541 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/10155 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/351 ,  H01L2924/35121 ,  H01L2924/207 ,  H01L2924/2076 ,  H01L2224/05552

摘要： A system and method for providing a post-passivation and underbump metallization is provided. An embodiment comprises a post-passivation layer that is larger than an overlying underbump metallization. The post-passivation layer extending beyond the underbump metallization shields the underlying layers from stresses generated from mismatches of the materials' coefficient of thermal expansion.

摘要翻译： 提供了一种用于提供后钝化和欠掺杂金属化的系统和方法。 一个实施例包括大于上覆下凸点金属化的后钝化层。 延伸超过下凸块金属化的后钝化层屏蔽下层不受材料的热膨胀系数的不匹配产生的应力。

公开(公告)号：US20080303154A1

公开(公告)日：2008-12-11

申请号：US11811660

申请日：2007-06-11

申请人： Hon-Lin Huang ,  Boe Su ,  Li-Hsin Tseng ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

发明人： Hon-Lin Huang ,  Boe Su ,  Li-Hsin Tseng ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC分类号： H01L23/528 ,  H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/6836 ,  H01L21/76898 ,  H01L24/05 ,  H01L2221/6834 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043

摘要： An integrated circuit structure and methods for forming the same are provided. The method includes providing a substrate; forming a through-silicon via (TSV) opening extending into the substrate; forming an under-bump metallurgy (UBM) in the TSV opening, wherein the UBM extends out of the TSV opening; filling the TSV opening with a metallic material; forming a patterned cap layer on the metallic material; and etching a portion of the UBM outside the TSV opening, wherein the patterned cap layer is used as a mask.

摘要翻译： 提供一种集成电路结构及其形成方法。 该方法包括提供基板; 形成延伸到衬底中的穿硅通孔（TSV）开口; 在TSV开口中形成凸块下冶金（UBM），其中UBM延伸出TSV开口; 用金属材料填充TSV开口; 在所述金属材料上形成图案化的盖层; 并且将所述UBM的一部分蚀刻在所述TSV开口外部，其中所述图案化盖层用作掩模。

公开(公告)号：US20080044756A1

公开(公告)日：2008-02-21

申请号：US11465375

申请日：2006-08-17

申请人： Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Y. L. Feng ,  Tung-Wen Hsieh

发明人： Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Y. L. Feng ,  Tung-Wen Hsieh

IPC分类号： G03C11/12

CPC分类号： G03F7/422

摘要： A method for removing dry film resist (DFR) from a fine pitch solder bump array on a semiconductor wafer provides for pre-soaking the wafer in a chemical bath then turbulently exposing the wafer to a chemical solution, both steps taking place in batch processing with the wafers processed in a vertical position. The wafers are then individually processed through a chemical spinning operation in which a chemical solution is dispensed from a spray nozzle while motion such as spinning is imparted the horizontally disposed wafer. The spin speed of the chemical spraying process may then be increased to accelerate physical removal of residue. Deionized water rinsing and spin-drying provide a solder bump array void of any DFR or other residuals.

摘要翻译： 从半导体晶片上的细间距焊料凸点阵列去除干膜抗蚀剂（DFR）的方法提供将晶片预浸在化学浴中，然后将晶片湍流地暴露于化学溶液，这两个步骤在批处理中发生， 晶片在垂直位置处理。 然后通过化学纺丝操作单独处理晶片，其中从喷雾喷嘴分配化学溶液，同时使诸如旋转的运动赋予水平设置的晶片。 然后可以增加化学喷涂过程的旋转速度以加速残留物的物理去除。 去离子水冲洗和旋转干燥提供无任何DFR或其他残留物的焊料凸块阵列。

公开(公告)号：US06541366B1

公开(公告)日：2003-04-01

申请号：US10043058

申请日：2002-01-08

申请人： Shih-Ming Chin ,  Fang-Chuang Liu ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

发明人： Shih-Ming Chin ,  Fang-Chuang Liu ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L24/02 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11502 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/14051 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/1146

摘要： A method for improving an adhesion bond between a solder material and an under bump metallization (UBM) layer including providing at least two UBM layers overlying a chip bonding pad including an uppermost UBM layer forming a contact layer for forming a solder bump thereon; depositing a solder bump precursor material overlying the contact layer to form a solder column; exposing the sidewalls of the solder column to include the contact layer sidewalls; oxidizing the contact layer sidewalls to form a contact layer sidewall oxide at a temperature lower than the melting point of the solder bump precursor material; and forming a solder bump by reflowing the precursor material to wet the contact layer surface to exclude the contact layer sidewalls.

摘要翻译： 一种用于改善焊料材料和凸块下金属化（UBM）层之间的粘合粘合的方法，包括提供覆盖在包括形成用于在其上形成焊料凸块的接触层的最上层的UBM层的芯片焊盘上的至少两个UBM层; 沉积覆盖接触层的焊料凸起前体材料以形成焊料柱; 暴露焊料柱的侧壁以包括接触层侧壁; 氧化接触层侧壁以在低于焊料凸块前体材料的熔点的温度下形成接触层侧壁氧化物; 以及通过回流前体材料以润湿接触层表面以排除接触层侧壁而形成焊料凸块。

公开(公告)号：US20120306070A1

公开(公告)日：2012-12-06

申请号：US13152734

申请日：2011-06-03

申请人： Ming-Chih Yew ,  Fu-Jen Li ,  Po-Yao Lin ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

发明人： Ming-Chih Yew ,  Fu-Jen Li ,  Po-Yao Lin ,  Chia-Jen Cheng ,  Hsiu-Mei Yu

IPC分类号： H01L23/485

CPC分类号： H01L24/13 ,  H01L21/76885 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/82 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05541 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/10155 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/351 ,  H01L2924/35121 ,  H01L2924/207 ,  H01L2924/2076 ,  H01L2224/05552

摘要： A system and method for providing a post-passivation and underbump metallization is provided. An embodiment comprises a post-passivation layer that is larger than an overlying underbump metallization. The post-passivation layer extending beyond the underbump metallization shields the underlying layers from stresses generated from mismatches of the materials' coefficient of thermal expansion.

摘要翻译： 提供了一种用于提供后钝化和欠掺杂金属化的系统和方法。 一个实施例包括大于上覆下凸点金属化的后钝化层。 延伸超过下凸块金属化的后钝化层屏蔽下层不受材料的热膨胀系数的不匹配产生的应力。

公开(公告)号：US07781140B2

公开(公告)日：2010-08-24

申请号：US11465375

申请日：2006-08-17

申请人： Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Yu-Lung Feng ,  Tung-Wen Hsieh

发明人： Chih-Min Tseng ,  Hsiu-Mei Yu ,  Wen-Hsiang Tseng ,  Chia-Jen Cheng ,  Yu-Lung Feng ,  Tung-Wen Hsieh

IPC分类号： G03F7/42 ,  B08B3/08 ,  B08B3/10

CPC分类号： G03F7/422

摘要： A method for removing dry film resist (DFR) from a fine pitch solder bump array on a semiconductor wafer provides for pre-soaking the wafer in a chemical bath then turbulently exposing the wafer to a chemical solution, both steps taking place in batch processing with the wafers processed in a vertical position. The wafers are then individually processed through a chemical spinning operation in which a chemical solution is dispensed from a spray nozzle while motion such as spinning is imparted the horizontally disposed wafer. The spin speed of the chemical spraying process may then be increased to accelerate physical removal of residue. Deionized water rinsing and spin-drying provide a solder bump array void of any DFR or other residuals.

摘要翻译： 从半导体晶片上的细间距焊料凸点阵列去除干膜抗蚀剂（DFR）的方法提供将晶片预浸在化学浴中，然后将晶片湍流地暴露于化学溶液，这两个步骤在批处理中发生， 晶片在垂直位置处理。 然后通过化学纺丝操作单独处理晶片，其中从喷雾喷嘴分配化学溶液，同时使诸如旋转的运动赋予水平设置的晶片。 然后可以增加化学喷涂过程的旋转速度以加速残留物的物理去除。 去离子水冲洗和旋转干燥提供无任何DFR或其他残留物的焊料凸块阵列。

公开(公告)号：US20070020906A1

公开(公告)日：2007-01-25

申请号：US11185819

申请日：2005-07-21

申请人： Sung-Cheng Chiu ,  Hao-Yi Tsai ,  Hsiu-Mei Yu ,  Shih-Ming Chen ,  Shang-Yun Hou

发明人： Sung-Cheng Chiu ,  Hao-Yi Tsai ,  Hsiu-Mei Yu ,  Shih-Ming Chen ,  Shang-Yun Hou

IPC分类号： H01L21/44

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05017 ,  H01L2224/05027 ,  H01L2224/0554 ,  H01L2224/05556 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： Methods for forming a bump on a semiconductor substrate, the substrate having a contact pad thereon, is provided. In one embodiment, the method comprises depositing a passivation layer over the substrate and the contact pad. The passivation layer is patterned and etched to form a plurality of openings in the passivation layer exposing portions of the contact pad. An under bump metallurgy (UBM) layer is deposited over the etched passivation layer and in the plurality of openings thereof to contact the contact pad. A photoresist layer is formed on the UBM layer and then patterned and etched to form at least one opening substantially overlying the contact pad. An electrically conductive material is deposited into the opening formed in the photoresist layer and overlying the UBM layer and aligned with the contact pad. A portion of the remaining photoresist layer is removed. The UBM layer is etched using the electrically conductive material as a mask. Thereafter, the electrically conductive material is reflowed to provide a bump on the semiconductor substrate.

摘要翻译： 提供了在半导体衬底上形成凸块的方法，其上具有接触垫的衬底。 在一个实施例中，该方法包括在衬底和接触垫上沉积钝化层。 对钝化层进行图案化和蚀刻以在钝化层中形成暴露接触焊盘部分的多个开口。 在蚀刻的钝化层上和其多个开口中沉积凸块下的冶金（UBM）层以接触接触焊盘。 在UBM层上形成光致抗蚀剂层，然后对其进行图案化和蚀刻以形成基本上覆盖接触焊盘的至少一个开口。 将导电材料沉积到形成在光致抗蚀剂层中的开口中，并覆盖UBM层并与接触垫对齐。 去除剩余光致抗蚀剂层的一部分。 使用导电材料作为掩模蚀刻UBM层。 此后，导电材料回流以在半导体衬底上提供凸块。

公开(公告)号：US07364998B2

公开(公告)日：2008-04-29

申请号：US11185819

申请日：2005-07-21

申请人： Sung-Cheng Chiu ,  Hao-Yi Tsai ,  Hsiu-Mei Yu ,  Shih-Ming Chen ,  Shang-Yun Hou

发明人： Sung-Cheng Chiu ,  Hao-Yi Tsai ,  Hsiu-Mei Yu ,  Shih-Ming Chen ,  Shang-Yun Hou

IPC分类号： H01L21/44 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05017 ,  H01L2224/05027 ,  H01L2224/0554 ,  H01L2224/05556 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： Methods for forming a bump on a semiconductor substrate, the substrate having a contact pad thereon, is provided. In one embodiment, the method comprises depositing a passivation layer over the substrate and the contact pad. The passivation layer is patterned and etched to form a plurality of openings in the passivation layer exposing portions of the contact pad. An under bump metallurgy (UBM) layer is deposited over the etched passivation layer and in the plurality of openings thereof to contact the contact pad. A photoresist layer is formed on the UBM layer and then patterned and etched to form at least one opening substantially overlying the contact pad. An electrically conductive material is deposited into the opening formed in the photoresist layer and overlying the UBM layer and aligned with the contact pad. A portion of the remaining photoresist layer is removed. The UBM layer is etched using the electrically conductive material as a mask. Thereafter, the electrically conductive material is reflowed to provide a bump on the semiconductor substrate.

摘要翻译： 提供了在半导体衬底上形成凸块的方法，其上具有接触垫的衬底。 在一个实施例中，该方法包括在衬底和接触垫上沉积钝化层。 对钝化层进行图案化和蚀刻以在钝化层中形成暴露接触焊盘部分的多个开口。 在蚀刻的钝化层上和其多个开口中沉积凸块下的冶金（UBM）层以接触接触焊盘。 在UBM层上形成光致抗蚀剂层，然后对其进行图案化和蚀刻以形成基本上覆盖接触焊盘的至少一个开口。 将导电材料沉积到形成在光致抗蚀剂层中的开口中，并覆盖UBM层并与接触垫对齐。 去除剩余光致抗蚀剂层的一部分。 使用导电材料作为掩模蚀刻UBM层。 此后，导电材料回流以在半导体衬底上提供凸块。