公开(公告)号：US20210318612A1

公开(公告)日：2021-10-14

申请号：US17356536

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Hongxia FENG ,  Changhua LIU ,  Bohan SHAN ,  Dingying XU ,  Leonel ARANA ,  Manuel GADOGBE ,  Matthew TINGEY ,  Julianne TROIANO

IPC: G03F7/038 ,  G03F7/20 ,  G03F7/32

Abstract: The present disclosure is directed to a patterning process that includes providing a composite dry film resist on a surface, in which the composite dry film resist includes a base film, a barrier layer and a resist layer, in which the base film is disposed over the barrier layer and the barrier layer is disposed over the resist layer. In another aspect, the patterning process includes removing the base film from the barrier layer and exposing the barrier layer to form an exposure precursor, which has a first area and a second area, further exposing the first area of the exposure precursor to electromagnetic irradiation, which passes through the barrier layer and the resist layer in the exposed first area becomes water-insoluble, and removing the barrier layer and the unexposed second area to form a pattern template.

公开(公告)号：US20230317706A1

公开(公告)日：2023-10-05

申请号：US17710753

申请日：2022-03-31

Applicant: Intel Corporation

Inventor： Kyle ARRINGTON ,  Kuang LIU ,  Bohan SHAN ,  Hongxia FENG ,  Don Douglas JOSEPHSON ,  Stephen MOREIN ,  Kaladhar RADHAKRISHNAN

IPC: H01L25/18 ,  H01L23/373 ,  H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L21/48

CPC classification number: H01L25/18 ,  H01L23/3736 ,  H01L25/0652 ,  H01L24/40 ,  H01L23/538 ,  H01L21/4871 ,  H01L24/37 ,  H01L2224/37147 ,  H01L24/83 ,  H01L2224/83385 ,  H01L2224/83447 ,  H01L24/33 ,  H01L2224/3303 ,  H01L24/06 ,  H01L2224/0603 ,  H01L2224/32258 ,  H01L2224/4046 ,  H01L24/32 ,  H01L2224/40499 ,  H01L24/16 ,  H01L2224/16225

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, an electronic package comprises a package substrate, and a die on the package substrate. In an embodiment, the electronic package further comprises a voltage regulator on the package substrate adjacent to the die, and a metal printed circuit board (PCB) heat spreader. In an embodiment, a trace on the metal PCB heat spreader couples the die to the voltage regulator.

公开(公告)号：US20240071848A1

公开(公告)日：2024-02-29

申请号：US17895916

申请日：2022-08-25

Applicant: Intel Corporation

Inventor： Bohan SHAN ,  Haobo CHEN ,  Brandon C. MARIN ,  Srinivas V. PIETAMBARAM ,  Bai NIE ,  Gang DUAN ,  Kyle ARRINGTON ,  Ziyin LIN ,  Hongxia FENG ,  Yiqun BAI ,  Xiaoying GUO ,  Dingying David XU ,  Jeremy D. ECTON ,  Kristof DARMAWIKARTA ,  Suddhasattwa NAD

IPC: H01L23/15 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/15 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49827

Abstract: Embodiments disclosed herein include package substrates. In an embodiment, the package substrate comprises a core, where the core comprises glass. In an embodiment, a first layer is under the core, a second layer is over the core, and a via is through the core, the first layer, and the second layer. In an embodiment a width of the via through the core is equal to a width of the via through the first layer and the second layer. In an embodiment, the package substrate further comprises a first pad under the via, and a second pad over the via.

公开(公告)号：US20230137877A1

公开(公告)日：2023-05-04

申请号：US17517152

申请日：2021-11-02

Applicant: Intel Corporation

Inventor： Bohan SHAN ,  Haobo CHEN ,  Omkar KARHADE ,  Malavarayan SANKARASUBRAMANIAN ,  Dingying XU ,  Gang DUAN ,  Bai NIE ,  Xiaoying GUO ,  Kristof DARMAWIKARTA ,  Hongxia FENG ,  Srinivas PIETAMBARAM ,  Jeremy D. ECTON

IPC: H01L23/00 ,  H01L25/065

Abstract: No-remelt solder joints can eliminate die or substrate movement in downstream reflow processes. In one example, one or more solder joints between two substrates can be formed as full IMC (intermetallic compound) solder joints. In one example, a full IMC solder joint includes a continuous layer (e.g., from the top pad to bottom pad) of intermetallic compounds. In one example, a full IMC joint can be formed by dispensing a no-remelt solder paste on some of the pads of one or both substrates to be bonded together.

公开(公告)号：US20250106983A1

公开(公告)日：2025-03-27

申请号：US18373457

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Bohan SHAN ,  Kyle ARRINGTON ,  Dingying David XU ,  Ziyin LIN ,  Timothy GOSSELIN ,  Elah BOZORG-GRAYELI ,  Aravindha ANTONISWAMY ,  Wei LI ,  Haobo CHEN ,  Yiqun BAI ,  Jose WAIMIN ,  Ryan CARRAZZONE ,  Hongxia FENG ,  Srinivas Venkata Ramanuja PIETAMBARAM ,  Gang DUAN ,  Bin MU ,  Mohit GUPTA ,  Jeremy D. ECTON ,  Brandon C. MARIN ,  Xiaoying GUO ,  Ashay DANI

IPC: H05K1/02 ,  H05K1/03

Abstract: Embodiments disclosed herein include glass core package substrates with a stiffener. In an embodiment, an apparatus comprises a substrate with a first layer with a first width, where the first layer is a glass layer, a second layer under the first layer, where the second layer has a second width that is smaller than the first width, and a third layer over the first layer, where the third layer has a third width that is smaller than the first width. In an embodiment, the apparatus further comprises a metallic structure with a first portion and a second portion, where the first portion is over a top surface of the substrate and the second portion extends away from the first portion and covers at least a sidewall of the first layer.

公开(公告)号：US20240332125A1

公开(公告)日：2024-10-03

申请号：US18128848

申请日：2023-03-30

Applicant: Intel Corporation

Inventor： Kyle ARRINGTON ,  Clay ARRINGTON ,  Bohan SHAN ,  Haobo CHEN ,  Srinivas V. PIETAMBARAM ,  Gang DUAN ,  Ziyin LIN ,  Hongxia FENG ,  Yiqun BAI ,  Xiaoying GUO ,  Dingying XU ,  Bai NIE

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/24 ,  H01L23/498

CPC classification number: H01L23/3737 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/24 ,  H01L23/49822 ,  H01L23/49827

Abstract: Embodiments disclosed herein include a package substrate. In an embodiment, the package substrate comprises a first layer and a second layer over the first layer. In an embodiment, the second layer comprises a dielectric material including sulfur. In an embodiment, fillers are within the second layer. In an embodiment, the fillers have a volume fraction that is less than approximately 0.2.