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69 条记录 (耗时 0.021 秒)

    Variable travel carrier device and method for planarizing semiconductor wafers
    1.
    发明授权
    Variable travel carrier device and method for planarizing semiconductor wafers 失效
    用于平面化半导体晶片的可变行进载体装置和方法

    公开(公告)号：US5549511A

    公开(公告)日：1996-08-27

    申请号：US349848

    申请日：1994-12-06

    申请人： John E. Cronin ,  Matthew J. Rutten

    发明人： John E. Cronin ,  Matthew J. Rutten

    IPC分类号： B24B37/10 ,  H01L21/304 ,  B24B7/00 ,  B24B17/00

    CPC分类号： B24B37/105

    摘要： A chemical mechanical planarization tool and method are presented employing a non-linear motion of the carrier arm relative to the polishing pad. The non-linear motion of the carrier arm relative to the polishing pad can be accomplished in a variety of ways, for example, employing a mechanical template having an irregular opening or programming the carrier displacement mechanism to move the carrier in an irregular, non-rotational X-Y path over the polishing pad.

    摘要翻译： 使用载体臂相对于抛光垫的非线性运动来呈现化学机械平面化工具和方法。 载体臂相对于抛光垫的非线性运动可以以各种方式实现，例如采用具有不规则开口的机械模板或编程载体位移机构以使载体移动成不规则的非 - 抛光垫上的旋转XY路径。

    Bidirectional field emission devices, storage structures and fabrication methods
    3.
    发明授权
    Bidirectional field emission devices, storage structures and fabrication methods 失效
    双向场发射装置，存储结构和制造方法

    公开(公告)号：US5530262A

    公开(公告)日：1996-06-25

    申请号：US541763

    申请日：1995-05-25

    申请人： John E. Cronin ,  Kent E. Morrett ,  Michael D. Potter ,  Matthew J. Rutten

    发明人： John E. Cronin ,  Kent E. Morrett ,  Michael D. Potter ,  Matthew J. Rutten

    IPC分类号： H01J9/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/06

    CPC分类号： H01L27/10852 ,  H01J9/025 ,  H01L27/108 ,  H01J2201/319

    摘要： Bidirectional field emission devices (FEDs) and associated fabrication methods are described. A basic device includes a first unitary field emission structure and an adjacently positioned, second unitary field emission structure. The first unitary structure has a first cathode portion and a first anode portion, while the second unitary structure has a second cathode portion and a second anode portion. The structures are positioned such that the first cathode portion opposes the second anode portion so that electrons may flow by field emission thereto and the second cathode portion opposes the first anode portion, again so that electrons may flow by field emission thereto. A control mechanism defines whether the device is active, while biasing voltages applied to the first and second unitary structures define the direction of current flow. Multiple applications exist for such a bidirectional FED. For example, an FED DRAM cell is discussed, as are methods for fabricating the various devices.

    摘要翻译： 描述了双向场致发射器件（FED）和相关的制造方法。 基本装置包括第一单一场发射结构和相邻定位的第二单一场致发射结构。 第一单一结构具有第一阴极部分和第一阳极部分，而第二整体结构具有第二阴极部分和第二阳极部分。 结构被定位成使得第一阴极部分与第二阳极部分相对，使得电子可以通过场发射流动，并且第二阴极部分与第一阳极部分相反，使得电子可以通过场发射而流动。 控制机构定义设备是否有效，而施加到第一和第二单一结构的偏置电压限定电流的方向。 存在这种双向FED的多种应用。 例如，讨论了FED DRAM单元，以及用于制造各种器件的方法。

    Fabrication methods for bidirectional field emission devices and storage structures
    4.
    发明授权
    Fabrication methods for bidirectional field emission devices and storage structures 失效
    双向场发射器件和存储结构的制造方法

    公开(公告)号：US5312777A

    公开(公告)日：1994-05-17

    申请号：US951283

    申请日：1992-09-25

    申请人： John E. Cronin ,  Kent E. Morrett ,  Michael D. Potter ,  Matthew J. Rutten

    发明人： John E. Cronin ,  Kent E. Morrett ,  Michael D. Potter ,  Matthew J. Rutten

    IPC分类号： H01J9/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/44

    CPC分类号： H01L27/10852 ,  H01J9/025 ,  H01L27/108 ,  H01J2201/319

    摘要： Bidirectional field emission devices (FEDs) and associated fabrication methods are described. A basic device includes a first unitary field emission structure and an adjacently positioned, second unitary field emission structure. The first unitary structure has a first cathode portion and a first anode portion, while the second unitary structure has a second cathode portion and a second anode portion. The structures are positioned such that the first cathode portion opposes the second anode portion so that electrons may flow by field emission thereto and the second cathode portion opposes the first anode portion, again so that electrons may flow by field emission thereto. A control mechanism defines whether the device is active, while biasing voltages applied to the first and second unitary structures define the direction of current flow. Multiple applications exist for such a bidirectional FED. For example, an FED DRAM cell is discussed, as are methods for fabricating the various devices.

    摘要翻译： 描述了双向场致发射器件（FED）和相关的制造方法。 基本装置包括第一单一场发射结构和相邻定位的第二单一场致发射结构。 第一单一结构具有第一阴极部分和第一阳极部分，而第二整体结构具有第二阴极部分和第二阳极部分。 结构被定位成使得第一阴极部分与第二阳极部分相对，使得电子可以通过场发射流动，并且第二阴极部分与第一阳极部分相反，使得电子可以通过场发射而流动。 控制机构定义设备是否有效，而施加到第一和第二单一结构的偏置电压限定电流的方向。 存在这种双向FED的多种应用。 例如，讨论了FED DRAM单元，以及用于制造各种器件的方法。

    Method of forming conductors within an insulating substrate
    9.
    发明授权
    Method of forming conductors within an insulating substrate 失效
    在绝缘基板内形成导体的方法

    公开(公告)号：US5136124A

    公开(公告)日：1992-08-04

    申请号：US585256

    申请日：1990-09-19

    申请人： John E. Cronin ,  Carter W. Kaanta ,  Michael A. Leach

    发明人： John E. Cronin ,  Carter W. Kaanta ,  Michael A. Leach

    IPC分类号： H01L21/3205 ,  H01L21/48 ,  H01L21/768 ,  H05K3/00 ,  H05K3/06 ,  H05K3/10 ,  H05K3/46

    CPC分类号： H01L21/76808 ,  H01L21/32053 ,  H01L21/4846 ,  H01L21/76877 ,  H01L21/7688 ,  H01L2221/1031 ,  H01L2221/1036 ,  H05K3/0017 ,  H05K3/06 ,  H05K3/107 ,  H05K3/4644

    摘要： A method for forming an electrically conductive line between two layers of insulating material and method for connecting the line through both layers of the insulating material to the opposite surfaces is provided. In the method, first, second and third layers of insulating material are provided wherein the first and third layers are separated by the second layer of insulating material which is different in etch rate from the first and third layers. The edge portion of all three layers is exposed and the insulating layer of the second material is selectively etched to remove the revealed edge portion and provide a slot between the first and third layers of insulating material. Also openings are provided in both the first and third layers of insulating material which communicate with the slot and extend respectively through the layers of the first and third insulating material. Thereafter, a conductive material such as tungsten is deposited in the slot and the openings and also on the face of the stacked insulating material. Finally, the excess tungsten is removed from the faces of the insulating material of the first and third layers leaving a conductive line sandwiched between the first and third insulating layers of the material; also metal remains in the openings formed to thereby form conductive studs extending from the line to the opposite surfaces of the insulating material sandwich so formed.

    摘要翻译： 提供了用于在两层绝缘材料之间形成导电线的方法以及将绝缘材料的两层连接到相对表面的方法。 在该方法中，提供了绝缘材料的第一层，第二层和第三层，其中第一层和第三层由第二层绝缘材料隔开，蚀刻速率与第一层和第三层不同。 暴露所有三层的边缘部分，并且选择性地蚀刻第二材料的绝缘层以去除露出的边缘部分，并在第一和第三绝缘材料层之间提供槽。 在第一和第三绝缘材料层中的开口均设置有与槽连通并分别延伸穿过第一和第三绝缘材料的层。 此后，诸如钨的导电材料沉积在槽和开口中以及堆叠的绝缘材料的表面上。 最后，从第一和第三层的绝缘材料的表面去除多余的钨，留下夹在材料的第一和第三绝缘层之间的导线; 在形成的开口中也保留有金属，从而形成从线形延伸到形成的绝缘材料夹层的相对表面的导电柱。

    Two step SMT method using masked cure
    10.
    发明授权
    Two step SMT method using masked cure 失效
    两步SMT方法使用掩蔽固化

    公开(公告)号：US6139661A

    公开(公告)日：2000-10-31

    申请号：US175916

    申请日：1998-10-20

    申请人： John E. Cronin ,  Joseph D. Poole ,  Michael C. Weller

    发明人： John E. Cronin ,  Joseph D. Poole ,  Michael C. Weller

    IPC分类号： C09J5/00 ,  H05K3/32 ,  B32B31/28

    CPC分类号： H05K3/321 ,  C09J5/00 ,  H05K2201/10689 ,  H05K2203/0557 ,  H05K2203/1476 ,  H05K2203/162 ,  H05K2203/176 ,  Y10T29/4913 ,  Y10T29/49147

    摘要： A method for temporarily attaching an electrical component to a pad, testing the component, removing and replacing the component if necessary, and making a final attachment of the component to the pad. The method provides for attachment and removal of components, to and from pads located on the substrate of a printed circuit board, wherein the method enables components to be easily removed prior to final assembly without damaging the circuit board or components mounted thereon. The method utilizes a layer of conductive, radiation-curable adhesive placed between the component's lead and the pad. Radiation is then directed through a mask onto a portion of the adhesive layer, which cures the portion while leaving a remaining area of the adhesive layer uncured. Because the portion of the adhesive layer that receives the radiation, and is consequently cured by the radiation, is only a limited portion of the whole adhesive layer, the component may be easily removed from the pad by applying a small mechanical force. Following such removal, the component or a replacement thereof may be attached to the remaining area. The final stage of the method cures the remaining area of uncured adhesive by exposing the remaining area to radiation.

    摘要翻译： 一种用于将电气部件临时附接到焊盘，测试部件，如果需要移除和更换部件的方法，以及将部件最终附接到焊盘。 该方法提供了附接和去除位于印刷电路板的基板上的焊盘的部件，其中该方法使得能够在最终组装之前容易地移除部件，而不会损坏安装在其上的电路板或部件。 该方法利用放置在部件的引线和焊盘之间的导电的可辐射固化的粘合剂层。 然后将辐射通过掩模引导到粘合剂层的一部分上，其固化该部分，同时留下未固化的粘合剂层的剩余区域。 由于接收辐射并因此被辐射固化的粘合剂层的部分仅仅是整个粘合剂层的有限部分，所以通过施加小的机械力可以容易地将该部件从焊盘移除。 在这种移除之后，组件或其替换可以附接到剩余区域。 该方法的最后阶段通过将剩余区域暴露于辐射来固化未固化的粘合剂的剩余面积。