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公开(公告)号:US20090085178A1
公开(公告)日:2009-04-02
申请号:US11864826
申请日:2007-09-28
申请人: Jong-Woo Ha , Koo Hong Lee , Soo Won Lee , JuHyun Park , Zigmund Ramirez Camacho , Jeffrey D. Punzalan , Lionel Chien Hui Tay , Jairus Legaspi Pisigan
发明人: Jong-Woo Ha , Koo Hong Lee , Soo Won Lee , JuHyun Park , Zigmund Ramirez Camacho , Jeffrey D. Punzalan , Lionel Chien Hui Tay , Jairus Legaspi Pisigan
IPC分类号: H01L23/495 , H01L23/02
CPC分类号: H01L23/3121 , H01L24/48 , H01L24/73 , H01L25/03 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2225/06558 , H01L2924/00014 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/15321 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
摘要翻译: 一种集成电路封装系统,包括:形成具有开口的基座结构; 将基座结构装置安装在开口中; 将集成电路装置连接在所述基座结构装置上; 以及在所述基座结构,所述基座结构装置和所述集成电路装置上模制密封剂。
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公开(公告)号:US07915724B2
公开(公告)日:2011-03-29
申请号:US11864826
申请日:2007-09-28
申请人: Jong-Woo Ha , Koo Hong Lee , Soo Won Lee , JuHyun Park , Zigmund Ramirez Camacho , Jeffrey D. Punzalan , Lionel Chien Hui Tay , Jairus Legaspi Pisigan
发明人: Jong-Woo Ha , Koo Hong Lee , Soo Won Lee , JuHyun Park , Zigmund Ramirez Camacho , Jeffrey D. Punzalan , Lionel Chien Hui Tay , Jairus Legaspi Pisigan
CPC分类号: H01L23/3121 , H01L24/48 , H01L24/73 , H01L25/03 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2225/06558 , H01L2924/00014 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/15321 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
摘要翻译: 一种集成电路封装系统,包括:形成具有开口的基座结构; 将基座结构装置安装在开口中; 将集成电路装置连接在所述基座结构装置上; 以及在所述基座结构,所述基座结构装置和所述集成电路装置上模制密封剂。
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公开(公告)号:US20070241442A1
公开(公告)日:2007-10-18
申请号:US11379097
申请日:2006-04-18
申请人: Jong-Woo Ha , Gwang Kim , JuHyun Park
发明人: Jong-Woo Ha , Gwang Kim , JuHyun Park
IPC分类号: H01L23/02
CPC分类号: H01L25/0657 , H01L23/3135 , H01L24/73 , H01L25/03 , H01L25/105 , H01L25/162 , H01L25/165 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1052 , H01L2924/14 , H01L2924/15311 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit package having a first peripheral contact, forming a second integrated circuit package having a second peripheral contact, stacking the second integrated circuit package on the first integrated circuit package in an offset configuration with the first peripheral contact exposed, the offset configuration provides a second package overhang with the second integrated circuit package above the first integrated circuit package, electrically connecting the first peripheral contact and a package substrate top contact, and electrically connecting the second peripheral contact and the package substrate top contact.
摘要翻译: 提供一种堆叠式集成电路封装封装系统,其形成具有第一外围触点的第一集成电路封装,形成具有第二外围触点的第二集成电路封装,将第二集成电路封装堆叠在第一集成电路封装上 第一外围触点暴露的偏移构造,偏移构造提供第二封装突出端与第一集成电路封装之上的第二集成电路封装,电连接第一周边触点和封装衬底顶部触点,并电连接第二周边触点 和封装衬底顶部接触。
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公开(公告)号:US07368319B2
公开(公告)日:2008-05-06
申请号:US11276940
申请日:2006-03-17
申请人: Jong-Woo Ha , Gwang Kim , JuHyun Park
发明人: Jong-Woo Ha , Gwang Kim , JuHyun Park
CPC分类号: H01L25/105 , H01L23/3128 , H01L24/45 , H01L25/03 , H01L2224/0401 , H01L2224/06135 , H01L2224/06136 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2225/1023 , H01L2225/1052 , H01L2225/1058 , H01L2924/01014 , H01L2924/01079 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/19107 , H01L2924/00014 , H01L2924/00
摘要: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit package having a first encapsulation and a second integrated circuit package having a second encapsulation, stacking the first integrated package below the second integrated circuit package with the first encapsulation attached to the second encapsulation, forming a substrate having an opening from a substrate top surface to a substrate bottom surface, mounting the first integrated circuit package over the substrate top surface, electrically connecting the first integrated circuit package and the substrate bottom surface through the opening, and electrically connecting the second integrated circuit package and the substrate top surface.
摘要翻译: 提供一种堆叠集成电路封装封装系统,其形成具有第一封装的第一集成电路封装和具有第二封装的第二集成电路封装,将第一集成封装堆叠在第二集成电路封装下方,第一封装连接到 第二封装,形成具有从衬底顶表面到衬底底表面的开口的衬底,将第一集成电路封装安装在衬底顶表面上,通过开口电连接第一集成电路封装和衬底底表面;以及 电连接第二集成电路封装和基板顶表面。
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公开(公告)号:US20070241453A1
公开(公告)日:2007-10-18
申请号:US11379106
申请日:2006-04-18
申请人: Jong-Woo Ha , Gwang Kim , JuHyun Park
发明人: Jong-Woo Ha , Gwang Kim , JuHyun Park
IPC分类号: H01L23/34
CPC分类号: H01L25/0657 , H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/03 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2224/32245 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit package having a first peripheral contact, forming a second integrated circuit package having a second peripheral contact, stacking the second integrated circuit package on the first integrated circuit package in a multidirectional offset stack configuration with the first peripheral contact exposed, the multidirectional offset stack configuration provides a second package overhang with the second integrated circuit package above the first integrated circuit package, electrically connecting the first peripheral contact and a package substrate contact along a package first edge, and electrically connecting the second peripheral contact and the package substrate contact along a package second edge.
摘要翻译: 提供了一种堆叠式集成电路封装封装系统,其形成具有第一外围触点的第一集成电路封装,形成具有第二外围触点的第二集成电路封装,将第二集成电路封装堆叠在第一集成电路封装上 多向偏移堆叠结构,其中所述第一外围接触件暴露,所述多向偏移堆叠结构提供与所述第一集成电路封装之上的所述第二集成电路封装件的第二封装突出端,沿着封装的第一边缘电连接所述第一外围触点和封装衬底触点 并且沿着封装第二边缘电连接第二外围触点和封装基板触点。
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公开(公告)号:US07498667B2
公开(公告)日:2009-03-03
申请号:US11379106
申请日:2006-04-18
申请人: Jong-Woo Ha , Gwang Kim , JuHyun Park
发明人: Jong-Woo Ha , Gwang Kim , JuHyun Park
CPC分类号: H01L25/0657 , H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/03 , H01L25/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2224/32245 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit package having a first peripheral contact, forming a second integrated circuit package having a second peripheral contact, stacking the second integrated circuit package on the first integrated circuit package in a multidirectional offset stack configuration with the first peripheral contact exposed, the multidirectional offset stack configuration provides a second package overhang with the second integrated circuit package above the first integrated circuit package, electrically connecting the first peripheral contact and a package substrate contact along a package first edge, and electrically connecting the second peripheral contact and the package substrate contact along a package second edge.
摘要翻译: 提供了一种堆叠式集成电路封装封装系统,其形成具有第一外围触点的第一集成电路封装,形成具有第二外围触点的第二集成电路封装,将第二集成电路封装堆叠在第一集成电路封装上 多向偏移堆叠结构,其中所述第一外围接触件暴露,所述多向偏移堆叠结构提供与所述第一集成电路封装之上的所述第二集成电路封装件的第二封装突出端,沿着封装的第一边缘电连接所述第一外围触点和封装衬底触点 并且沿着封装第二边缘电连接第二外围触点和封装基板触点。
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公开(公告)号:US20070218689A1
公开(公告)日:2007-09-20
申请号:US11276940
申请日:2006-03-17
申请人: Jong-Woo Ha , Gwang Kim , JuHyun Park
发明人: Jong-Woo Ha , Gwang Kim , JuHyun Park
IPC分类号: H01L21/44
CPC分类号: H01L25/105 , H01L23/3128 , H01L24/45 , H01L25/03 , H01L2224/0401 , H01L2224/06135 , H01L2224/06136 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2225/1023 , H01L2225/1052 , H01L2225/1058 , H01L2924/01014 , H01L2924/01079 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/19107 , H01L2924/00014 , H01L2924/00
摘要: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit package having a first encapsulation and a second integrated circuit package having a second encapsulation, stacking the first integrated package below the second integrated circuit package with the first encapsulation attached to the second encapsulation, forming a substrate having an opening from a substrate top surface to a substrate bottom surface, mounting the first integrated circuit package over the substrate top surface, electrically connecting the first integrated circuit package and the substrate bottom surface through the opening, and electrically connecting the second integrated circuit package and the substrate top surface.
摘要翻译: 提供一种堆叠集成电路封装封装系统,其形成具有第一封装的第一集成电路封装和具有第二封装的第二集成电路封装,将第一集成封装堆叠在第二集成电路封装下方,第一封装连接到 第二封装,形成具有从衬底顶表面到衬底底表面的开口的衬底,将第一集成电路封装安装在衬底顶表面上,通过开口电连接第一集成电路封装和衬底底表面;以及 电连接第二集成电路封装和基板顶表面。
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公开(公告)号:US08957530B2
公开(公告)日:2015-02-17
申请号:US13023293
申请日:2011-02-08
申请人: Il Kwon Shim , Seng Guan Chow , Heap Hoe Kuan , Seung Uk Yoon , Jong-Woo Ha
发明人: Il Kwon Shim , Seng Guan Chow , Heap Hoe Kuan , Seung Uk Yoon , Jong-Woo Ha
IPC分类号: H01L23/02 , H01L23/48 , H01L23/00 , H01L21/683 , H01L25/065 , H01L25/10
CPC分类号: H01L24/19 , H01L21/568 , H01L21/6835 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2221/68345 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/97 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/82 , H01L2924/00
摘要: An integrated circuit packaging system includes: an integrated circuit device; a conductive post adjacent the integrated circuit device, the conductive post with a contact surface having characteristics of a shaped platform removed; and an encapsulant around the conductive post and the integrated circuit device with the conductive post extending through the encapsulant and each end of the conductive post exposed from the encapsulant.
摘要翻译: 一种集成电路封装系统,包括:集成电路器件; 邻近集成电路器件的导电柱,具有去除成形平台特征的接触表面的导电柱; 以及围绕导电柱和集成电路器件的密封剂,其中导电柱延伸穿过密封剂并且从密封剂暴露出的导电柱的每个端部。
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公开(公告)号:US08692388B2
公开(公告)日:2014-04-08
申请号:US13536268
申请日:2012-06-28
申请人: Sang-Ho Lee , Jong-Woo Ha , Soo-San Park
发明人: Sang-Ho Lee , Jong-Woo Ha , Soo-San Park
IPC分类号: H01L23/48
CPC分类号: H01L25/0657 , H01L24/73 , H01L25/50 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06575 , H01L2924/01067 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: An integrated circuit packaging system is provided including: a first device having a first backside and a first active side; and a waferscale spacer having an exact fit at all four corners adjacent to an edge of the first device and a recess along the edge of the first device.
摘要翻译: 提供一种集成电路封装系统,包括:具有第一背面和第一主动侧的第一装置; 以及具有与所述第一装置的边缘相邻的所有四个角处精确配合的晶片间隔件以及沿着所述第一装置的边缘的凹部。
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公开(公告)号:US08581380B2
公开(公告)日:2013-11-12
申请号:US11456554
申请日:2006-07-10
申请人: Soo-San Park , Sang-Ho Lee , Jong-Woo Ha
发明人: Soo-San Park , Sang-Ho Lee , Jong-Woo Ha
IPC分类号: H01L23/02
CPC分类号: H01L25/0657 , H01L23/3128 , H01L24/03 , H01L24/05 , H01L24/48 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/05556 , H01L2224/05599 , H01L2224/06183 , H01L2224/16 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/85399 , H01L2224/85444 , H01L2225/06506 , H01L2225/0651 , H01L2225/06527 , H01L2225/06551 , H01L2924/00014 , H01L2924/01014 , H01L2924/01079 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/0665 , H01L2224/45099 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: An integrated circuit packaging system with ultra-thin die is provided including providing an ultra-thin integrated circuit stack, having a vertical sidewall contact, including providing a semiconductor wafer having an active side, forming a solder bump on the active side of the semiconductor wafer, forming a support layer over the solder bump and the active side of the semiconductor wafer, forming an ultra-thin wafer from the semiconductor wafer and singulating the ultra-thin integrated circuit stack for exposing the vertical sidewall contact, mounting the ultra-thin integrated circuit stack on a substrate, and coupling the substrate to the vertical sidewall contact.
摘要翻译: 提供一种具有超薄管芯的集成电路封装系统,包括提供具有垂直侧壁接触的超薄集成电路堆叠,包括提供具有有源侧的半导体晶片,在半导体晶片的有源侧上形成焊料凸块 在焊料凸块和半导体晶片的有源侧上形成支撑层,从半导体晶片形成超薄晶片,并且对超薄集成电路堆叠进行单片化,以暴露垂直侧壁接触,安装超薄集成 电路堆叠,并将衬底耦合到垂直侧壁接触。
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