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    RANDOM READ/WRITE PERFORMANCE OF PROBE STORAGE MEMORY DEVICES
    5.
    发明申请
    RANDOM READ/WRITE PERFORMANCE OF PROBE STORAGE MEMORY DEVICES 有权
    探索存储设备随机阅读/写入性能

    公开(公告)号：US20100226237A1

    公开(公告)日：2010-09-09

    申请号：US12650583

    申请日：2009-12-31

    申请人： Valluri R. Rao ,  Sanjay Rangan

    发明人： Valluri R. Rao ,  Sanjay Rangan

    IPC分类号： G11B9/00

    CPC分类号： G11B9/1436 ,  B82Y10/00

    摘要： Current probe-type memory architecture assumes that the minimum chunk of data that a probe tip can access is one entire track and perhaps only four out of five-thousand, for example, probes participate in the access thereby degrading performance. By subdividing the track into D finer chunks or data zones, D times more probes can cooperate to read out the data, hence increasing the data throughput by Dx. Each tip now only scans approximately one Dth of the track and hence the scan time is reduced by a factor D, while D probes are being utilized in parallel.

    摘要翻译： 当前的探针型存储器架构假设探针尖端可以访问的最小数据块是整个轨迹，也许只有四分之一的数据，例如探针参与访问，从而降低性能。 通过将轨道细分为更精细的块或数据区，D倍多的探测器可以合作读出数据，从而增加Dx的数据吞吐量。 每个尖端现在只扫描轨道的大约一个Dth，因此扫描时间减少了一个因子D，而D探针被并联使用。

    Inductive inertial sensor architecture and fabrication in packaging build-up layers
    7.
    发明授权
    Inductive inertial sensor architecture and fabrication in packaging build-up layers 有权
    感应惯性传感器结构和制造在包装堆积层

    公开(公告)号：US09429427B2

    公开(公告)日：2016-08-30

    申请号：US13720876

    申请日：2012-12-19

    申请人： Qing Ma ,  Feras Eid ,  Kevin Lin ,  Johanna M. Swan ,  Weng Hong Teh ,  Valluri R. Rao

    发明人： Qing Ma ,  Feras Eid ,  Kevin Lin ,  Johanna M. Swan ,  Weng Hong Teh ,  Valluri R. Rao

    IPC分类号： G01C19/00 ,  G01C19/56 ,  G01C19/5776

    CPC分类号： G01C19/56 ,  G01C19/5776

    摘要： This invention relates to inductive inertial sensors employing a magnetic drive and/or sense architecture. In embodiments, translational gyroscopes utilize a conductive coil made to vibrate in a first dimension as a function of a time varying current driven through the coil in the presence of a magnetic field. Sense coils register an inductance that varies as a function of an angular velocity in a second dimension. In embodiments, the vibrating coil causes first and second mutual inductances in the sense coils to deviate from each other as a function of the angular velocity. In embodiments, self-inductances associated with a pair of meandering coils vary as a function of an angular velocity in a second dimension. In embodiments, package build-up layers are utilized to fabricate the inductive inertial sensors, enabling package-level integrated inertial sensing advantageous in small form factor computing platforms, such as mobile devices.

    摘要翻译： 本发明涉及采用磁驱动和/或感测架构的感应惯性传感器。 在实施例中，平移陀螺仪利用在第一维度中制成的导电线圈作为在存在磁场的情况下驱动通过线圈的时变电流的函数。 感应线圈记录在第二维度上作为角速度的函数变化的电感。 在实施例中，振动线圈使得感测线圈中的第一和第二互感器作为角速度的函数彼此偏离。 在实施例中，与一对曲折线圈相关联的自感量作为第二维度中的角速度的函数而变化。 在实施例中，使用封装积层来制造感应惯性传感器，使得能够在诸如移动设备的小尺寸计算平台中有利的封装级集成惯性感测。

    PACKAGE STRUCTURES INCLUDING DISCRETE ANTENNAS ASSEMBLED ON A DEVICE
    8.
    发明申请
    PACKAGE STRUCTURES INCLUDING DISCRETE ANTENNAS ASSEMBLED ON A DEVICE 有权
    包装结构包括在装置上组装的离散天线

    公开(公告)号：US20140176368A1

    公开(公告)日：2014-06-26

    申请号：US13721245

    申请日：2012-12-20

    申请人： Telesphor Kamgaing ,  Valluri R. Rao ,  Ofir Degani

    发明人： Telesphor Kamgaing ,  Valluri R. Rao ,  Ofir Degani

    IPC分类号： H01Q1/38 ,  H01P11/00

    CPC分类号： H01Q9/045 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01P11/00 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q1/526 ,  H01Q21/0006 ,  Y10T29/49018

    摘要： Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include forming a package structure comprising a discrete antenna disposed on a back side of a device, wherein the discrete antenna comprises an antenna substrate, a through antenna substrate via vertically disposed through the antenna substrate. A through device substrate via that is vertically disposed within the device is coupled with the through antenna substrate via, and a package substrate is coupled with an active side of the device.

    摘要翻译： 描述了形成微电子封装结构的方法及由此形成的相关结构。 这些方法和结构可以包括形成包括设置在设备的背侧的分立天线的封装结构，其中分立天线包括天线基板，通过天线基板垂直设置的通过天线基板。 垂直设置在器件内的穿通器件衬底通孔经由天线衬底与封装衬底耦合，并且封装衬底与器件的有源侧耦合。

    Bit-erasing architecture for seek-scan probe (SSP) memory storage
    10.
    发明授权
    Bit-erasing architecture for seek-scan probe (SSP) memory storage 有权
    扫描探针（SSP）存储器的位擦除架构

    公开(公告)号：US07750333B2

    公开(公告)日：2010-07-06

    申请号：US11477276

    申请日：2006-06-28

    申请人： Qing Ma ,  Valluri R. Rao ,  Tsung-Kuan Allen Chou

    发明人： Qing Ma ,  Valluri R. Rao ,  Tsung-Kuan Allen Chou

    IPC分类号： H01L21/00

    CPC分类号： B82Y10/00 ,  G11B9/04 ,  G11B9/1436 ,  G11B9/1472

    摘要： An apparatus comprising a substrate, a heater formed on the substrate, and a phase-change layer formed on the heater. The heater comprises a heater layer and first and second electrodes electrically coupled to the heater layer. A process comprising forming a heater on a substrate and forming a phase-change layer on the heater. The heater comprises a heater layer and first and second electrodes electrically coupled to the heater layer.

    摘要翻译： 一种包括基板，形成在基板上的加热器和形成在加热器上的相变层的装置。 加热器包括加热器层和电耦合到加热器层的第一和第二电极。 一种方法，包括在基底上形成加热器并在加热器上形成相变层。 加热器包括加热器层和电耦合到加热器层的第一和第二电极。