公开(公告)号：US20050098347A1

公开(公告)日：2005-05-12

申请号：US10981778

申请日：2004-11-05

申请人： Jung-Ho Hwang ,  Sung-Gue Lee ,  Sang-Min Lee ,  Joon-Wook Han ,  Tae-Sik Eo ,  Yu-Seock Yang

发明人： Jung-Ho Hwang ,  Sung-Gue Lee ,  Sang-Min Lee ,  Joon-Wook Han ,  Tae-Sik Eo ,  Yu-Seock Yang

IPC分类号： H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K1/00 ,  H05K3/02

CPC分类号： H05K3/4647 ,  H05K3/0097 ,  H05K3/423 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09845 ,  H05K2203/0733 ,  H05K2203/1476 ,  H05K2203/1536 ,  Y10T29/49155 ,  Y10T29/49156

摘要： A fabricating method for a multi-layer printed circuit board comprises the steps of: attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to the releasing film, thereby forming a base member; forming a first connection portion on the first metal film by an electroplating process; forming a connection portion that a second connection portion is integrally formed with the first connection portion on the first connection portion; forming a second metal film on the second connection portion so as to be electrically connected to the connection portion; and etching a specific part of the second metal film and thereby forming copper patterns.

摘要翻译： 一种多层印刷电路板的制造方法，包括以下步骤：在中心层的上表面和下表面处附着脱模膜，并将第一金属膜附着到脱模膜，从而形成基材; 通过电镀工艺在第一金属膜上形成第一连接部分; 在所述第一连接部上形成与所述第一连接部一体形成的第二连接部的连接部， 在所述第二连接部分上形成第二金属膜，以便电连接到所述连接部分; 并蚀刻第二金属膜的特定部分，从而形成铜图案。

公开(公告)号：US07320173B2

公开(公告)日：2008-01-22

申请号：US10769885

申请日：2004-02-03

申请人： Sung-Gue Lee ,  Jung-Ho Hwang ,  Joon-Wook Han ,  Sang-Min Lee ,  Tae-Sik Eo ,  Yu-Seock Yang

发明人： Sung-Gue Lee ,  Jung-Ho Hwang ,  Joon-Wook Han ,  Sang-Min Lee ,  Tae-Sik Eo ,  Yu-Seock Yang

IPC分类号： H05K3/02 ,  H05K3/10

CPC分类号： H05K3/423 ,  H05K3/0023 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2203/0346 ,  H05K2203/0577 ,  H05K2203/0733 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156

摘要： A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.

摘要翻译： 制造多层印刷电路板的方法可以包括在具有选择性地暴露第一金属层的镀槽的第一金属层上形成抗蚀剂层，在由电镀暴露的第一金属层的表面形成镀层 通过电镀工艺形成连接突起，去除抗蚀剂层，在第一金属层处形成绝缘层，并将第二金属层定位在连接到连接突起的端部的绝缘层的表面处。 通过通过电镀工艺形成连接突起，可以减少材料的损失，并且可以提高连接突起的强度。 此外，减少制造过程的复杂性以降低成本并提高生产率。

公开(公告)号：US07189302B2

公开(公告)日：2007-03-13

申请号：US10981778

申请日：2004-11-05

申请人： Jung-Ho Hwang ,  Sung-Gue Lee ,  Sang-Min Lee ,  Joon-Wook Han ,  Tae-Sik Eo ,  Yu-Seock Yang

发明人： Jung-Ho Hwang ,  Sung-Gue Lee ,  Sang-Min Lee ,  Joon-Wook Han ,  Tae-Sik Eo ,  Yu-Seock Yang

IPC分类号： C25D11/08 ,  C25D5/02 ,  B29C65/00

CPC分类号： H05K3/4647 ,  H05K3/0097 ,  H05K3/423 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09845 ,  H05K2203/0733 ,  H05K2203/1476 ,  H05K2203/1536 ,  Y10T29/49155 ,  Y10T29/49156

摘要： A fabricating method for a multi-layer printed circuit board is provided. The method may include attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to each of the releasing films and a resist layer to each of the first metal films to form a base member. A first connection portion may then be formed on each of the first metal films, and a second connection portion may be integrally formed on each of the first connection portions. A second metal film may then be formed on each of the second connection portions so as to be electrically connected to the connection portions, and, in turn, to the first metal films. Specific portions of the second metal films may be etched to form copper patterns. Upper and lower portions may then be separated by the releasing films to form separate multi-layer printed circuit boards.

摘要翻译： 提供了一种用于多层印刷电路板的制造方法。 该方法可以包括在中心层的上表面和下表面处附接释放膜并将第一金属膜附接到每个释放膜和将抗蚀剂层附接到每个第一金属膜以形成基底部件。 然后可以在每个第一金属膜上形成第一连接部分，并且第二连接部分可以一体地形成在每个第一连接部分上。 然后可以在每个第二连接部分上形成第二金属膜，以便电连接到连接部分，并且依次连接到第一金属膜。 可以蚀刻第二金属膜的特定部分以形成铜图案。 然后可以通过释放膜分离上部和下部以形成单独的多层印刷电路板。

公开(公告)号：US07257891B2

公开(公告)日：2007-08-21

申请号：US10836219

申请日：2004-05-03

申请人： Sung-Gue Lee ,  Yong-Il Kim

发明人： Sung-Gue Lee ,  Yong-Il Kim

IPC分类号： H05K3/02 ,  H05K3/10

CPC分类号： H05K3/243 ,  H05K3/28 ,  H05K2201/09881 ,  H05K2203/0597 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

摘要： A method for forming bonding pads on a printed circuit board (PCB) with circuit patterns is provided. A plurality of copper patterns are formed on the PCB which are electrically connected to the circuit patterns, and a filler is filled between the copper patterns such that an upper surface of the copper pattern is exposed. A plating layer is then applied to the exposed upper surface of the copper patterns. Protrusion of the plating layer at a lower portion of a copper pattern is prevented, thus reducing an interval between the wire bonding pad(s) and potentially increasing the number of bonding pads which may be effectively formed on a given PCB.

摘要翻译： 提供了一种用于在具有电路图案的印刷电路板（PCB）上形成焊盘的方法。 在PCB上形成多个铜图形，其电连接到电路图案，并且填充物填充在铜图案之间，使得铜图案的上表面露出。 然后将镀层施加到铜图案的暴露的上表面。 防止在铜图案的下部的镀层的突出，从而减少引线键合焊盘之间的间隔并且潜在地增加可能在给定PCB上有效形成的焊盘的数量。

公开(公告)号：US06641983B1

公开(公告)日：2003-11-04

申请号：US09659575

申请日：2000-09-11

申请人： Sung-Gue Lee ,  Yong-Soon Jang ,  Won-Hyeog Jin

发明人： Sung-Gue Lee ,  Yong-Soon Jang ,  Won-Hyeog Jin

IPC分类号： H05K300

CPC分类号： H05K3/28 ,  H05K3/0023 ,  H05K3/0035 ,  H05K2203/1476

摘要： The present invention to a method for forming an exposed portion of a circuit pattern in a printed circuit board, wherein a solder resist is coated on a substrate having a circuit pattern, is hardened, and thereafter is processed by a laser in order to form a portion exposing the circuit pattern such as the solder land. When the solder resist is processed by the laser, the number of errors can be greatly reduced as compared to a processing error occurred in exposure or developing process, whereby a circuit pattern that is integrated higher than the solder land is formed for thereby miniaturizing the printed circuit board.

摘要翻译： 本发明涉及一种用于形成印刷电路板中的电路图案的暴露部分的方法，其中将阻焊剂涂覆在具有电路图案的基板上，被硬化，然后通过激光加工以形成 暴露电路图案的部分，例如焊接区域。 当通过激光处理阻焊剂时，与曝光或显影处理中发生的处理误差相比，可以大大降低误差的数量，从而形成集成在焊盘上的电路图案，从而使印刷 电路板。

公开(公告)号：US07208341B2

公开(公告)日：2007-04-24

申请号：US10855557

申请日：2004-05-28

申请人： Kwang-Tae Lee ,  Sung-Gue Lee ,  Sang-Hyuck Nam ,  Sung-Ho Youn ,  Young-Kyu Lee

发明人： Kwang-Tae Lee ,  Sung-Gue Lee ,  Sang-Hyuck Nam ,  Sung-Ho Youn ,  Young-Kyu Lee

IPC分类号： H01L21/48 ,  H01L21/4763

CPC分类号： H05K3/28 ,  H05K3/243 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/025 ,  H05K2203/0577 ,  Y10T29/49155

摘要： A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of the exposed terminal portion with gold, and electrically connecting the pad portion and the terminal portion.

摘要翻译： 印刷电路板的制造方法包括：在多层绝缘材料中形成内部电路图案，在绝缘材料的某些部分形成多个通孔，并形成外部电路图形，该外部电路图形与内部 在通孔的内周面和绝缘材料的表面上形成电路图形，以及端子部分; 在所述绝缘材料的整个表面和所述外部电路图案的整个表面上形成第一光阻焊层，并且通过去除所述第一光阻焊层的特定部分来暴露所述端子部分; 研磨第一光阻焊层的表面; 在第一光阻焊层的表面上印刷第二光阻焊层，并通过去除第二光阻焊层的特定部分将端子部分暴露于外部; 以及通过用暴露的端子部分的表面镀金形成焊盘部分，并且电连接焊盘部分和端子部分。

公开(公告)号：US07304249B2

公开(公告)日：2007-12-04

申请号：US10837701

申请日：2004-05-04

申请人： Sung-Gue Lee ,  Yong-Il Kim

发明人： Sung-Gue Lee ,  Yong-Il Kim

IPC分类号： H01R12/04 ,  H05K1/11

CPC分类号： H05K3/243 ,  H05K3/28 ,  H05K2201/09881 ,  H05K2203/0597 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

摘要： Bonding pad(s) for a printed circuit board with circuit patterns are provided. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

摘要翻译： 提供了具有电路图案的印刷电路板的接合焊盘。 焊盘包括形成在PCB上并电连接到电路图案的多个铜图案，填充在铜图案之间的填充物，使得铜图案的上表面暴露，并且镀覆层 铜图案的上表面。 通过防止镀镍层和镀金层在铜图案上形成时在铜图案的下部突出，从而降低引线接合焊盘之间的间隔。

公开(公告)号：US06509634B1

公开(公告)日：2003-01-21

申请号：US09667008

申请日：2000-09-21

申请人： Sung-Gue Lee ,  Yong-Il Kim

发明人： Sung-Gue Lee ,  Yong-Il Kim

IPC分类号： H01L2302

CPC分类号： H01L24/83 ,  H01L24/28 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/14 ,  H05K1/0287 ,  H05K3/323 ,  H05K2201/0133 ,  H05K2201/10287 ,  H05K2201/10674

摘要： A chip mounting structure provides an adhesive conductor between a chip and a printed circuit board. The adhesive conductor includes an adhesive layer having viscoelasticity to cushion thermal shock caused due to a difference in the thermal expansive coefficients between mutually connected layers; and conductive wires for electrically connecting the layers by vertically penetrating the adhesive layer. The adhesive conductor in accordance with the present invention includes a plurality of conductive wires penetrating the adhesive layer having viscoelasticity in a half-hardened state, so that the chip and the printed circuit board can be physically attached and at the same time be electrically connected. Also, the flip chip structure is protected from the thermal shock caused due to the difference between the thermal expansive coefficients of the chip and the printed circuit board, so that products fabricated by adopting it can have a high reliability.

摘要翻译： 芯片安装结构在芯片和印刷电路板之间提供粘合导体。 粘合导体包括具有粘弹性的粘合剂层，以缓冲由于相互连接的层之间的热膨胀系数的差异引起的热冲击; 以及用于通过垂直地穿透粘合剂层来电连接层的导线。 根据本发明的粘合导体包括穿过具有半硬化状态的粘弹性的粘合剂层的多个导电丝，使得芯片和印刷电路板可以物理地附接并且同时电连接。 此外，由于芯片和印刷电路板的热膨胀系数之间的差异导致的倒装芯片结构受到保护，使得通过采用它制造的产品可以具有高的可靠性。

公开(公告)号：US06849294B2

公开(公告)日：2005-02-01

申请号：US10456565

申请日：2003-06-09

申请人： Sung-Gue Lee

发明人： Sung-Gue Lee

IPC分类号： H05K3/02 ,  C25D5/02 ,  C25D7/12 ,  H05K3/04 ,  H05K3/10 ,  H05K3/24 ,  H05K3/28 ,  H05K3/42 ,  B05D5/12

CPC分类号： H05K3/243 ,  C25D5/022 ,  C25D7/12 ,  H05K3/045 ,  H05K3/107 ,  H05K3/28 ,  H05K3/426 ,  H05K2201/0376 ,  H05K2201/09036

摘要： A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.

摘要翻译： 印刷电路板的电路图案制造方法包括：在绝缘材料的表面形成树脂层的第一步骤; 选择性地除去树脂层的第二步骤; 在绝缘材料的树脂层去除部分的表面上形成金属镀层以形成电路图案和连接焊盘的第三步骤; 以及在连接焊盘上形成镀金层的第四步骤。 通过这样做，可以容易地形成精细的电路图案。

公开(公告)号：US06740352B2

公开(公告)日：2004-05-25

申请号：US10291606

申请日：2002-11-12

申请人： Sung-Gue Lee ,  Yong-Il Kim

发明人： Sung-Gue Lee ,  Yong-Il Kim

IPC分类号： B05D512

CPC分类号： H05K3/243 ,  H05K3/28 ,  H05K2201/09881 ,  H05K2203/0597 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

摘要： Bonding pad(s) formed on a printed circuit board with circuit patterns. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

摘要翻译： 在印刷电路板上形成的具有电路图案的接合焊盘。 焊盘包括形成在PCB上并电连接到电路图案的多个铜图案，填充在铜图案之间的填充物，使得铜图案的上表面被暴露，并且镀覆层 铜图案的上表面。 通过防止镀镍层和镀金层在铜图案上形成时在铜图案的下部突出，从而降低引线接合焊盘之间的间隔。