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26 条记录 (耗时 0.025 秒)

    METHOD FOR FORMING ELECTRODES AND/OR BLACK STRIPES FOR PLASMA DISPLAY SUBSTRATE
    8.
    发明申请
    METHOD FOR FORMING ELECTRODES AND/OR BLACK STRIPES FOR PLASMA DISPLAY SUBSTRATE 有权
    用于形成等离子显示基板的电极和/或黑条的方法

    公开(公告)号：US20070190886A1

    公开(公告)日：2007-08-16

    申请号：US11691689

    申请日：2007-03-27

    申请人： Ryohei Satoh ,  Yoshinori Iwata ,  Koji Nakagawa ,  Kenji Tanaka ,  Satoru Takaki

    发明人： Ryohei Satoh ,  Yoshinori Iwata ,  Koji Nakagawa ,  Kenji Tanaka ,  Satoru Takaki

    IPC分类号： H01J9/24 ,  H01J9/00

    CPC分类号： H01J9/02 ,  H01J11/12 ,  H01J11/22 ,  H01J11/44 ,  H01J2211/444

    摘要： To provide a method for forming electrodes and/or black stripes for a plasma display substrate, wherein display electrodes, bus electrodes and optionally black stripes for a plasma display panel are formed of the same material by the same dry step, whereby a clear image having reflection prevented, can be displayed on a PDP display device with a low load on the environment, at low costs, with low resistance, without erosion by a dielectric. A method for forming electrodes and/or black stripes for a plasma display substrate, which comprises applying a laser beam to a mask layer formed on a transparent substrate to form openings at areas corresponding to the respective patterns of display electrodes, bus electrodes and optionally black stripes, then continuously forming an antireflection layer to provide an antireflection effect over the entire surface and an electrode layer, and applying again a laser beam to peel off the mask layer and at the same time to remove an unnecessary thin film layer.

    摘要翻译： 为了提供用于等离子体显示基板形成电极和/或黑色条纹的方法，其中显示电极，总线电极和用于等离子体显示面板的任选的黑色条纹由相同的干燥步骤由相同的材料形成，由此具有 防止反射，可以低成本地以低电阻显示在环境中的低负载的PDP显示装置上，而不会被电介质侵蚀。 一种用于形成等离子体显示基板的电极和/或黑色条纹的方法，包括将激光束施加到形成在透明基板上的掩模层，以在对应于显示电极，总线电极和任选黑色的各个图案的区域处形成开口 然后连续地形成抗反射层以在整个表面和电极层上提供抗反射效果，并再次施加激光束以剥离掩模层，同时去除不需要的薄膜层。

    Transparent conductive film and method of making the film
    9.
    发明授权
    Transparent conductive film and method of making the film 失效
    透明导电膜及其制作方法

    公开(公告)号：US06329044B1

    公开(公告)日：2001-12-11

    申请号：US09344803

    申请日：1999-06-25

    申请人： Katsumi Inoue ,  Yasuhiko Akao ,  Satoru Takaki ,  Yasuo Hayashi ,  Teruo Fujiwara

    发明人： Katsumi Inoue ,  Yasuhiko Akao ,  Satoru Takaki ,  Yasuo Hayashi ,  Teruo Fujiwara

    IPC分类号： B32B900

    CPC分类号： C23C14/086 ,  B32B17/10174 ,  C03C17/253 ,  C03C2217/231 ,  C03C2217/24 ,  C03C2218/15 ,  C03C2218/152 ,  C03C2218/154 ,  H01B1/08 ,  Y10T428/24917

    摘要： Transparent conductive films are provided which provide high sheet resistance, high transparency, high heat resistance and high moisture resistance, wherein the transparent conductive films contain either (a) an oxide film made of a mixed oxide of indium and tin and doped with at least 0.01 and less than 0.6 weight % of nitrogen and a geometrical thickness of from 5 to 25 nm or (b) an oxide film made of a mixed oxide of indium and tin, wherein the oxide film contains tin within a range of from 4.2 to 8.3 atomic % based on indium and a geometrical thickness of from 5 to 20 nm, and where in each case (a) and (b) the oxide film has a light transmittance of more than 90% at a wavelength of 550 nm, transparent conductive film-coated substrates prepared therefrom and touch panels prepared from the transparent conductive film-coated substrates.

    摘要翻译： 提供透明导电膜，其提供高的薄层电阻，高透明度，高耐热性和高耐湿性，其中透明导电膜包含（a）由铟和锡的混合氧化物制成的氧化物膜，并掺杂至少0.01 和小于0.6重量％的氮，几何厚度为5至25nm，或（b）由铟和锡的混合氧化物制成的氧化物膜，其中所述氧化物膜含有锡在4.2至8.3原子的范围内 基于铟的几何厚度为5〜20nm的几何厚度，并且在（a）和（b）的每种情况下，氧化物膜在波长550nm下的透光率大于90％，透明导电膜 - 由其制备的涂覆基材和由透明导电膜涂覆的基材制备的触摸面板。

    Method for manufacturing circuit pattern-provided substrate
    10.
    发明授权
    Method for manufacturing circuit pattern-provided substrate 有权
    制造电路图形衬底的方法

    公开(公告)号：US08418359B2

    公开(公告)日：2013-04-16

    申请号：US12364314

    申请日：2009-02-02

    申请人： Ryohei Satoh ,  Koji Nakagawa ,  Eiji Morinaga ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Hiroshi Sakamoto

    发明人： Ryohei Satoh ,  Koji Nakagawa ,  Eiji Morinaga ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Hiroshi Sakamoto

    IPC分类号： H05K3/02 ,  H05K3/10

    CPC分类号： G03F7/2022 ,  H01J9/02 ,  H01J11/10 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155

    摘要： A method for manufacturing a circuit pattern-provided substrate including forming a resist layer on a substrate, forming an opening corresponding to a circuit pattern and having an eaves cross-sectional shape in the resist layer, forming a thin film layer having a portion formed on the substrate in the opening and a portion formed on the resist layer, and removing the resist layer such that the resist layer and the portion of the thin film layer formed on the resist layer are removed from the substrate. The forming of the opening comprises exposing the resist layer with a mask device which changes an exposure amount of the resist layer such that the eaves cross-sectional shape has a space at a boundary between the resist layer and the substrate.

    摘要翻译： 一种制造电路图形衬底的方法，包括在衬底上形成抗蚀剂层，形成与电路图形相对应的开口，并且在抗蚀剂层中具有檐形横截面形状，形成薄膜层，该薄膜层形成在 开口中的基板和形成在抗蚀剂层上的部分，并且去除抗蚀剂层，使得抗蚀剂层和形成在抗蚀剂层上的薄膜层的部分从基板上去除。 开口的形成包括用改变抗蚀剂层的曝光量的掩模装置曝光抗蚀剂层，使得檐横截面形状在抗蚀剂层和基底之间的边界处具有空间。