利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

27 条记录 (耗时 0.023 秒)

    Enhanced adhesion between a vapor deposited metal and an organic polymer surface exhibiting tailored morphology
    1.
    发明授权
    Enhanced adhesion between a vapor deposited metal and an organic polymer surface exhibiting tailored morphology 失效
    气相沉积金属和有机聚合物表面之间增强的附着力具有定制的形态

    公开(公告)号：US06099939A

    公开(公告)日：2000-08-08

    申请号：US921453

    申请日：1997-08-25

    申请人： Kashmiri L. Mittal ,  Judith Marie Roldan ,  Carlos Juan Sambucetti ,  Ravi F. Saraf

    发明人： Kashmiri L. Mittal ,  Judith Marie Roldan ,  Carlos Juan Sambucetti ,  Ravi F. Saraf

    IPC分类号： C23C14/02 ,  H01L21/48 ,  H01L21/768 ,  H05K3/38 ,  B32B15/08

    CPC分类号： C23C14/024 ,  H01L21/4864 ,  H05K3/381 ,  Y10T428/24355 ,  Y10T428/24521 ,  Y10T428/31678 ,  Y10T428/31681

    摘要： Enhanced adhesion between a vapor deposited metal and an organic polymer surface is achieved without utilizing any intermediate surface preparatory steps. The morphology of the polymer surface is tailored to produce mounds and dimples on the surface which leads to a mechanically tougher, interdigitated metal/polymer interface. In the preferred embodiment, a solution of a solvent or solvent system and two or more polymer precursors or polymers or combinations thereof are cast in a film on a substrate and heated to spontaneously form a rough surface due to phase separation. The surface topography of such a film consists of characteristic mounds and dimples depending upon the composition of the solution. Direct metal vapor deposition onto the roughened surface results in an enhanced adhesion of the metal to the organic polymer surface. The organic polymer surface or substrate may be, but need not be, attached to yet another underlying substrate such as a ceramic (e.g., a silicon semiconductor chip), plastic or metal.

    摘要翻译： 实现气相沉积金属与有机聚合物表面之间的增强粘附，而不用任何中间表面的准备步骤。 聚合物表面的形态被定制以在表面上产生墩和凹坑，这导致机械上更坚韧，交错的金属/聚合物界面。 在优选的实施方案中，将溶剂或溶剂体系和两种或更多种聚合物前体或聚合物或其组合的溶液浇铸在基材上的膜中，并由于相分离而加热以自发形成粗糙表面。 根据溶液的组成，这种薄膜的表面形貌由特征土丘和凹坑构成。 在粗糙化表面上的直接金属气相沉积导致金属对有机聚合物表面的附着力增强。 有机聚合物表面或衬底可以是但不必须附着到另一个下面的衬底，例如陶瓷（例如，硅半导体芯片），塑料或金属。

    REDUCED ELECTROMIGRATION AND STRESSED INDUCED MIGRATION OF CU WIRES BY SURFACE COATING
    6.
    发明申请
    REDUCED ELECTROMIGRATION AND STRESSED INDUCED MIGRATION OF CU WIRES BY SURFACE COATING 审中-公开
    通过表面涂层降低CU电线的电导率和受压感应迁移

    公开(公告)号：US20090142924A1

    公开(公告)日：2009-06-04

    申请号：US12341856

    申请日：2008-12-22

    申请人： Chao-Kun Hu ,  Robert Rosenberg ,  Judith Marie Rubino ,  Carlos Juan Sambucetti ,  Anthony Kendall Stamper

    发明人： Chao-Kun Hu ,  Robert Rosenberg ,  Judith Marie Rubino ,  Carlos Juan Sambucetti ,  Anthony Kendall Stamper

    IPC分类号： H01L21/441

    CPC分类号： H01L21/76843 ,  H01L21/288 ,  H01L21/76849 ,  H01L21/76864 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The idea of the invention is to coat the free surface of patterned Cu conducting lines in on-chip interconnections (BEOL) wiring by a 1-20 nm thick metal layer prior to deposition of the interlevel dielectric. This coating is sufficiently thin so as to obviate the need for additional planarization by polishing, while providing protection against oxidation and surface, or interface, diffusion of Cu which has been identified by the inventors as the leading contributor to metal line failure by electromigration and thermal stress voiding. Also, the metal layer increases the adhesion strength between the Cu and dielectric so as to further increase lifetime and facilitate process yield. The free surface is a direct result of the CMP (chemical mechanical polishing) in a damascene process or in a dry etching process by which Cu wiring is patterned. It is proposed that the metal capping layer be deposited by a selective process onto the Cu to minimize further processing. We have used electroless metal coatings, such as CoWP, CoSnP and Pd, to illustrate significant reliability benefits, although chemical vapor deposition (CVD) of metals or metal forming compounds can be employed.

    摘要翻译： 本发明的想法是在沉积层间电介质之前，通过1-20nm厚的金属层将芯片上互连（BEOL）布线中的图案化Cu导线的自由表面涂覆。 该涂层足够薄，以便消除对通过抛光的附加平面化的需要，同时提供了防止氧化和表面或Cu的扩散的保护，这已被发明人鉴定为导致金属线路故障的主要贡献者通过电迁移和热 压力消除。 此外，金属层增加了Cu和电介质之间的粘合强度，从而进一步增加寿命并且有助于工艺产量。 自由表面是在镶嵌工艺中的CMP（化学机械抛光）或通过图形化Cu布线的干蚀刻工艺的直接结果。 提出通过选择性方法将金属覆盖层沉积到Cu上以最小化进一步的加工。 尽管可以使用金属或金属形成化合物的化学气相沉积（CVD），但我们已经使用了无电金属涂层，例如CoWP，CoSnP和Pd来说明显着的可靠性优点。

    Water based selectable charge magnetic inks
    9.
    发明授权
    Water based selectable charge magnetic inks 失效
    水性可选充电磁性油墨

    公开(公告)号：US4107063A

    公开(公告)日：1978-08-15

    申请号：US773578

    申请日：1977-03-02

    申请人： Zlata Kovac ,  Carlos Juan Sambucetti

    发明人： Zlata Kovac ,  Carlos Juan Sambucetti

    IPC分类号： C09D11/00 ,  C09C1/24 ,  C09D5/23 ,  H01F1/44 ,  H01F41/16 ,  H01F1/28

    CPC分类号： C09C1/24 ,  H01F1/44 ,  H01F41/16 ,  C01P2006/42

    摘要： Water based magnetic colloidal fluids, useable as inks, when prepared by coating chemically precipitated magnetite (Fe.sub.3 O.sub.4) with an adsorption site providing coating agent including certain organic anions, such as sulfates, sulfonates or amino carboxilates, and then dispersing the coated product with non-ionic, anionic or cationic surfactants may exhibit selectably cationic, anionic or non-ionic charge responsiveness.

    摘要翻译： 当通过涂覆化学沉淀的磁铁矿（Fe3O4）的吸附位置提供包括某些有机阴离子（例如硫酸盐，磺酸盐或氨基羧酸盐）的包被剂制备时，可用作油墨的水基磁性胶体液体， 离子，阴离子或阳离子表面活性剂可以显示出选择性的阳离子，阴离子或非离子电荷响应性。

    Technology for fabrication of packaging interface substrate wafers with fully metallized vias through the substrate wafer
    10.
    发明申请
    Technology for fabrication of packaging interface substrate wafers with fully metallized vias through the substrate wafer 审中-公开
    用于通过基板晶片制造具有完全金属化通孔的封装接口基板晶片的技术

    公开(公告)号：US20090302454A1

    公开(公告)日：2009-12-10

    申请号：US12462980

    申请日：2009-08-11

    申请人： Yu- Ting Cheng ,  Sherif A. Goma ,  John Harold Magerlein ,  Sampath Purushothaman ,  Carlos Juan Sambucetti ,  George Frederick Walker

    发明人： Yu- Ting Cheng ,  Sherif A. Goma ,  John Harold Magerlein ,  Sampath Purushothaman ,  Carlos Juan Sambucetti ,  George Frederick Walker

    IPC分类号： H01L23/48 ,  H01L21/768

    CPC分类号： H05K3/422 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K2201/09563 ,  H05K2201/10378 ,  H05K2203/025 ,  H01L2924/00

    摘要： The invention is the technology of providing a packaging intermediate product that can serve as an interface substrate that is to be positioned between different circuitry types where the dimensions are approaching the sub 100 micrometer range. The invention involves a dielectric wafer structure where the first and second area surfaces of the wafer are separated by a distance that is of the order of the electrical via design length, and an array of spaced vias through the wafer arranged with each via filled with metal surrounded by a chemical metal deposition promoting layer with each via terminating flush with a wafer surface. The wafer structure is achieved by forming an array of blind via openings through the first surface of the dielectric wafer to a depth approaching the via design length, lining the walls for adhesion enhancement, filling the blind via openings completely with a chemically deposited metal, removing material at the first wafer surface thereby planarizing the filled vias, and removing material at the second wafer surface thereby exposing the vias at the design length.

    摘要翻译： 本发明是提供一种包装中间产品的技术，该包装中间产品可以用作界面基底，该界面基底将位于尺寸接近亚100微米范围的不同电路类型之间。 本发明涉及一种电介质晶片结构，其中晶片的第一和第二区域表面被隔开距离为电通孔设计长度的数量级，并且通过晶片布置的间隔开的通孔阵列，每个通孔填充有金属 被化学金属沉积促进层围绕，每个通孔终止与晶片表面齐平。 晶片结构通过形成通过介电晶片的第一表面的盲孔通孔的阵列达到接近通孔设计长度的深度来实现，衬里壁用于粘附增强，用化学沉积的金属完全填充盲孔通孔，去除 材料，从而使填充的通孔平坦化，以及在第二晶片表面移除材料，从而在设计长度处露出通孔。