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    Multi-layer circuit assembly and process for preparing the same
    5.
    发明授权
    Multi-layer circuit assembly and process for preparing the same 失效
    多层电路组装及其制备方法

    公开(公告)号：US08598467B2

    公开(公告)日：2013-12-03

    申请号：US13275808

    申请日：2011-10-18

    申请人： Kevin C. Olson ,  Alan G. Wang

    发明人： Kevin C. Olson ,  Alan G. Wang

    IPC分类号： H05K1/11

    CPC分类号： H01L21/486 ,  C09D5/4488 ,  H01L21/481 ,  H01L21/4857 ,  H01L23/142 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/388 ,  H05K3/426 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0179 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2203/0582 ,  H05K2203/135 ,  H01L2924/00

    摘要： A process for fabricating a multi-layer circuit assembly is provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; (c) removing the dielectric coating in a predetermined pattern to expose sections of the substrate; (d) applying a layer of metal to all surfaces to form metallized vias through and/or to the electrically conductive core; (e) applying a resist to the metal layer to form a photosensitive layer thereon; (f) imaging resist in predetermined locations; (g) developing resist to uncover selected areas of the metal layer; and (h) etching uncovered areas of metal to form an electrical circuit pattern connected by the metallized vias.

    摘要翻译： 提供了一种用于制造多层电路组件的工艺。 该方法包括（a）提供基底，其至少一个区域包括通孔密度为500至10,000个孔/平方英寸（75至1550个孔/平方厘米）的多个通孔区域; （b）将介电涂层施加到所述基底的所有暴露表面上以在其上形成保形涂层; （c）以预定图案去除所述电介质涂层以暴露所述基板的部分; （d）将金属层施加到所有表面以形成通过和/或导电芯的金属化通孔; （e）在所述金属层上施加抗蚀剂以在其上形成感光层; （f）在预定位置的成像抗蚀剂; （g）显影抗蚀剂以露出金属层的选定区域; 和（h）蚀刻金属的未覆盖区域以形成通过金属化通孔连接的电路图案。

    Method of making a circuit board
    10.
    发明授权
    Method of making a circuit board 有权
    制作电路板的方法

    公开(公告)号：US07159308B2

    公开(公告)日：2007-01-09

    申请号：US11224197

    申请日：2005-09-12

    申请人： Alan E. Wang ,  Kevin C. Olson ,  Thomas H. Di Stefano

    发明人： Alan E. Wang ,  Kevin C. Olson ,  Thomas H. Di Stefano

    IPC分类号： H05K3/36

    CPC分类号： H05K1/0231 ,  H01L2224/16225 ,  H05K1/056 ,  H05K3/002 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09554 ,  H05K2201/10446 ,  H05K2203/135 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156

    摘要： Provided is a method of forming a circuit board including (a) providing a first conductive sheet; (b) selectively removing one or more portions of the first conductive sheet to form a first panel having a first circuit board that is coupled to a disposable part of the first panel by at least one tab that extends from an edge of the first circuit board to an edge of the disposable part of the first panel; (c) applying an insulating coating to the first circuit board so that at least each edge of the first circuit board is covered thereby; and (d) separating the first circuit board from the disposable part in a manner whereupon at least part of the tab remains attached to the first circuit board and includes an exposed edge of the conductive sheet of the first circuit board. Circuit boards formed by the method are also provided.

    摘要翻译： 提供一种形成电路板的方法，包括：（a）提供第一导电片; （b）选择性地去除所述第一导电片的一个或多个部分以形成具有第一电路板的第一面板，所述第一电路板通过从所述第一电路板的边缘延伸的至少一个接片连接到所述第一面板的一次性部分 到所述第一面板的一次性部分的边缘; （c）向第一电路板施加绝缘涂层，使得第一电路板的至少每个边缘被覆盖; 和（d）以一种方式将第一电路板与一次性部分分离，由此至少部分突片保持附接到第一电路板并且包括第一电路板的导电片的暴露边缘。 还提供了通过该方法形成的电路板。