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    Semiconductor memory device
    3.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11756632B2

    公开(公告)日：2023-09-12

    申请号：US18084363

    申请日：2022-12-19

    申请人： Kioxia Corporation

    发明人： Kosuke Yanagidaira ,  Hiroshi Tsubouchi

    IPC分类号： G11C16/26 ,  G11C16/04 ,  G11C16/32 ,  G11C16/08 ,  H10B43/10 ,  H10B43/27

    CPC分类号： G11C16/26 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/32 ,  H10B43/10 ,  H10B43/27

    摘要： A semiconductor memory device includes a memory cell connected between a bit line and a source line, a sense amplifier having a first transistor provided between at least two transistors of the sense amplifier and the bit line, and a controller which executes a read operation to read data stored by the memory cell. In the read operation, the controller applies a first voltage to the first transistor and a second voltage to the source line during a first time period, applies a third voltage to the first transistor and a fourth voltage to the source line during a second time period after the first time period, and applies the first voltage to the first transistor and a fifth voltage to the source line during a third time period after the second time period.

    Semiconductor memory
    4.
    发明授权
    Semiconductor memory 有权

    公开(公告)号：US11948646B2

    公开(公告)日：2024-04-02

    申请号：US18305654

    申请日：2023-04-24

    申请人： Kioxia Corporation

    发明人： Kosuke Yanagidaira ,  Mario Sako

    IPC分类号： G11C11/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/30

    CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24 ,  G11C16/30

    摘要： A semiconductor memory includes memory cells, a word line and bit lines of the memory cells, sense amplifiers connected to the bit lines, respectively, and a controller. Each sense amplifier includes first, second, and third transistors. The third transistor has one end connected to each of the first and second transistors, and the other end connected to a corresponding bit line. During a read operation, at a first time of a first period during which the controller applies a first read voltage to the word line, the controller applies a first voltage higher than ground voltage to the first transistor, and a second voltage to the second transistor. Also, at the first time, a first sense amplifier applies a voltage to a first bit line through its first and third transistors, and a second sense amplifier applies a voltage to a second bit line through tis second and third transistors.

    Memory device controlling including reading from a first memory and writing to a second memory based on timing and control signals
    6.
    发明授权
    Memory device controlling including reading from a first memory and writing to a second memory based on timing and control signals 有权

    公开(公告)号：US11500770B2

    公开(公告)日：2022-11-15

    申请号：US16922612

    申请日：2020-07-07

    申请人： Kioxia Corporation

    发明人： Kosuke Yanagidaira ,  Shouichi Ozaki

    IPC分类号： G06F12/06 ,  G06F13/16

    摘要： According one embodiment, a memory device controlling method includes: receiving, by a first semiconductor memory, a read command transmitted from a controller; receiving, by a second semiconductor memory, a write command transmitted from the controller; reading, by the first semiconductor, data from the first semiconductor memory based on the read command, and transmitting, from the first semiconductor memory to the second semiconductor memory, the data and a control signal indicating that the data is output; and receiving, by the second semiconductor memory, the data at a timing based on the control signal transmitted from the first semiconductor memory without intermediation of the controller based on the write command and writing the received data into the second semiconductor memory.

    Semiconductor memory device
    7.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11081188B2

    公开(公告)日：2021-08-03

    申请号：US16774630

    申请日：2020-01-28

    申请人： KIOXIA CORPORATION

    发明人： Kosuke Yanagidaira ,  Hiroshi Tsubouchi

    IPC分类号： G11C16/26 ,  G11C16/04 ,  G11C16/08 ,  G11C16/32 ,  H01L27/11582 ,  H01L27/11565

    摘要： According to one embodiment, a semiconductor memory device includes a controller configured to execute a read operation. In the read operation, the controller is configured to: apply first and second read voltages to a word line, read data at each of first and second times, apply the first voltage to the source line at each of the first and second times, apply a second voltage to the source line during the application of the first read voltage to the word line and before the first time, and apply a third voltage to the source line during the application of the second read voltage to the word line and before the second time.

    Semiconductor memory
    9.
    发明授权
    Semiconductor memory 有权

    公开(公告)号：US11670383B2

    公开(公告)日：2023-06-06

    申请号：US17575554

    申请日：2022-01-13

    申请人： KIOXIA CORPORATION

    发明人： Kosuke Yanagidaira ,  Mario Sako

    IPC分类号： G11C11/00 ,  G11C16/26 ,  G11C16/04 ,  G11C16/08 ,  G11C11/56 ,  G11C16/30 ,  G11C16/24

    CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24 ,  G11C16/30

    摘要： A semiconductor memory includes memory cells, a word line and bit lines of the memory cells, sense amplifiers connected to the bit lines, respectively, and a controller. Each sense amplifier includes first, second, and third transistors. The third transistor has one end connected to each of the first and second transistors, and the other end connected to a corresponding bit line. During a read operation, at a first time of a first period during which the controller applies a first read voltage to the word line, the controller applies a first voltage higher than ground voltage to the first transistor, and a second voltage to the second transistor. Also, at the first time, a first sense amplifier applies a voltage to a first bit line through its first and third transistors, and a second sense amplifier applies a voltage to a second bit line through the second and third transistors.

    Manufacturing method of a semiconductor device and method for creating a layout thereof
    10.
    发明授权
    Manufacturing method of a semiconductor device and method for creating a layout thereof 有权

    公开(公告)号：US11417600B2

    公开(公告)日：2022-08-16

    申请号：US17079952

    申请日：2020-10-26

    申请人： KIOXIA CORPORATION

    发明人： Kosuke Yanagidaira ,  Chikaaki Kodama

    IPC分类号： H01L23/528 ,  H01L21/311 ,  H01L21/768 ,  H01L23/522 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/02 ,  H01L23/48

    摘要： A method for manufacturing a semiconductor device of one embodiment of the present invention includes: forming an insulation layer to be processed over a substrate; forming a first sacrificial layer in a first area over the substrate, the first sacrificial layer being patterned to form in the first area a functioning wiring connected to an element; forming a second sacrificial layer in a second area over the substrate, the second sacrificial layer being patterned to form in the second area a dummy wiring; forming a third sacrificial layer at a side wall of the first sacrificial layer and forming a fourth sacrificial layer at a side wall of the second sacrificial layer, the third sacrificial layer and the fourth sacrificial layer being separated; forming a concavity by etching the insulation layer to be processed using the third sacrificial layer and the fourth sacrificial layer as a mask; and filling a conductive material in the concavity.