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22 条记录 (耗时 0.031 秒)

    Ferroelectric memory and method of operating same
    4.
    发明授权
    Ferroelectric memory and method of operating same 有权
    铁电存储器和操作方法相同

    公开(公告)号：US06924997B2

    公开(公告)日：2005-08-02

    申请号：US10381235

    申请日：2001-09-25

    申请人： Zheng Chen ,  Vikram Joshi ,  Myoungho Lim ,  Carlos A. Paz de Araujo ,  Larry D. McMillan ,  Yoshihisa Kato ,  Tatsuo Otsuki ,  Yasuhiro Shimada

    发明人： Zheng Chen ,  Vikram Joshi ,  Myoungho Lim ,  Carlos A. Paz de Araujo ,  Larry D. McMillan ,  Yoshihisa Kato ,  Tatsuo Otsuki ,  Yasuhiro Shimada

    IPC分类号： G11C11/22

    CPC分类号： G11C11/22

    摘要： A ferroelectric memory 636 includes a group of memory cells (645, 12, 201, 301, 401, 501), each cell having a ferroelectric memory element (44, 218, etc.), a drive line (122, 322, 422, 522 etc.) on which a voltage for writing information to the group of memory cells is placed, a bit line (25, 49, 125, 325, 425, 525, etc.) on which information to be read out of the group of memory cells is placed, a preamplifier (20, 42, 120, 320, 420, etc.) between the memory cells and the bit line, a set switch (14, 114, 314, 414, 514, etc.) connected between the drive line and the memory cells, and a reset switch (16, 116, 316, 416, 516, etc.) connected to the memory cells in parallel with the preamplifier. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.

    摘要翻译： 铁电存储器636包括一组存储单元（645,12,21,301,401,501），每个单元具有铁电存储元件（44,218等），驱动线（122,322,422， 522等），在其上放置用于将信息写入到存储器单元组的电压，位线（25,49,125,325,425,525等），其中要从该组存储器单元读出的信息 放置存储器单元，在存储器单元和位线之间的前置放大器（20,42,120,320,420等），连接在存储器单元之间的设定开关（14,114,314,414,514等） 驱动线和存储器单元，以及与前置放大器并联连接到存储器单元的复位开关（16,116,316,416,516等）。 通过将小于铁电存储元件的矫顽电压的电压放置在存储元件上来读取存储器。 在读取之前，通过使铁电存储元件的两个电极接地来放电来自该组电池的噪声。

    Method for fabricating ferroelectric field effect transistor having an interface insulator layer formed by a liquid precursor
    7.
    发明授权
    Method for fabricating ferroelectric field effect transistor having an interface insulator layer formed by a liquid precursor 失效
    具有由液体前体形成的界面绝缘体的铁电场效应晶体管的制造方法

    公开(公告)号：US06255121B1

    公开(公告)日：2001-07-03

    申请号：US09258489

    申请日：1999-02-26

    申请人： Koji Arita ,  Shinichiro Hayashi ,  Tatsuo Otsuki ,  Carlos A. Paz de Araujo

    发明人： Koji Arita ,  Shinichiro Hayashi ,  Tatsuo Otsuki ,  Carlos A. Paz de Araujo

    IPC分类号： H01L2100

    CPC分类号： H01L28/56 ,  H01L21/28291 ,  H01L29/516 ,  H01L29/78391

    摘要： A method for forming an interface insulator layer in a ferroelectric FET memory, in which a liquid precursor is applied to a semiconductor substrate. Preferably, the liquid precursor is an enhanced metalorganic decomposition (“EMOD”) precursor, applied using a liquid-source misted deposition technique. Preferably, the EMOD precursor solution applied to the substrate contains metal ethylhexanoates containing metal moieties in relative molar proportions for forming an interface insulator layer containing ZrO2, CeO2, Y2O3 or (Ce1-xZrx)O2, wherein 0≦x≦1.

    摘要翻译： 一种用于在铁电FET存储器中形成界面绝缘体层的方法，其中将液体前体施加到半导体衬底。 优选地，液体前体是使用液体源雾化沉积技术施加的增强的金属有机分解（“EMOD”）前体。 优选地，施加到基底上的EMOD前体溶液含有相对摩尔比例含有金属部分的金属乙基己酸，以形成含有ZrO 2，CeO 2，Y 2 O 3或（Ce 1-x Zr x）O 2的界面绝缘体层，其中0≤x≤1。

    Ferroelectric memory with disturb protection
    9.
    发明授权
    Ferroelectric memory with disturb protection 失效
    铁电存储器具有干扰保护

    公开(公告)号：US6151241A

    公开(公告)日：2000-11-21

    申请号：US314800

    申请日：1999-05-19

    申请人： Shinichiro Hayashi ,  Tatsuo Otsuki ,  Carlos A. Paz de Araujo

    发明人： Shinichiro Hayashi ,  Tatsuo Otsuki ,  Carlos A. Paz de Araujo

    IPC分类号： G11C11/22 ,  H01L21/336 ,  H01L29/51 ,  G11C11/00

    CPC分类号： H01L29/6684 ,  G11C11/22 ,  H01L29/516

    摘要： A ferroelectric field effect transistor memory cell includes a thin film varistor located between the gate electrode and the ferroelectric layer. The varistor protects the ferroelectric layer from disturb voltage pulses arising from memory read, write and sense operations. A second electrode is located between the thin film varistor and the ferroelectric layer. The thin film ferroelectric is positioned over the channel of a transistor to operate as a ferroelectric gate. For voltages at which disturb voltages are likely to occur, the thin film varistor has a resistance obeying a formula R.sub.d >10.times.1/(2.pi.fC.sub.F), where R.sub.d is resistivity of the thin film varistor, f is an operating frequency of said memory, and C.sub.F is the capacitance of the ferroelectric layer. For voltages at or near the read and write voltage of the memory, the thin film varistor has a resistance obeying a formula R.sub.d

    摘要翻译： 铁电场效应晶体管存储单元包括位于栅电极和铁电层之间的薄膜变阻器。 压敏电阻保护铁电层不受存储器读，写和读操作引起的干扰电压脉冲的影响。 第二电极位于薄膜压敏电阻和铁电层之间。 薄膜铁电体位于晶体管的沟道上方，用作铁电栅极。 对于可能发生干扰电压的电压，薄膜压敏电阻具有遵循公式Rd> 10×1 /（2πfCF）的电阻，其中Rd是薄膜变阻器的电阻率，f是所述存储器的工作频率， CF是铁电层的电容。 对于等于或接近存储器的读和写电压的电压，薄膜压敏电阻具有遵循公式Rd <0.1x1 /（2πfCF）的电阻。