公开(公告)号：US20120025364A1

公开(公告)日：2012-02-02

申请号：US13252714

申请日：2011-10-04

申请人： Masataka HOSHINO ,  Junichi KASAI ,  Kouichi MEGURO ,  Ryota FUKUYAMA ,  Yasuhiro SHINMA ,  Koji TAYA ,  Masanori ONODERA ,  Naomi MASUDA

发明人： Masataka HOSHINO ,  Junichi KASAI ,  Kouichi MEGURO ,  Ryota FUKUYAMA ,  Yasuhiro SHINMA ,  Koji TAYA ,  Masanori ONODERA ,  Naomi MASUDA

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/49575 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/05548 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

摘要翻译： 本发明提供一种半导体器件，其包括堆叠的半导体芯片，每个半导体芯片包括半导体衬底和设置在半导体衬底的侧面上且在其侧面上形成有凹部的第一绝缘层; 设置在凹部的内侧面的中心部的第一金属层; 以及第二金属层，其设置在凹部中并连接到形成在每个半导体芯片上的第一金属层。 本发明还提供一种半导体器件的制造方法。

公开(公告)号：US20090325346A1

公开(公告)日：2009-12-31

申请号：US12556408

申请日：2009-09-09

申请人： Masataka HOSHINO ,  Junichi KASAI ,  Kouichi MEGURO ,  Ryota FUKUYAMA ,  Yasuhiro SHINMA ,  Koji TAYA ,  Masanori ONODERA ,  Naomi MASUDA

发明人： Masataka HOSHINO ,  Junichi KASAI ,  Kouichi MEGURO ,  Ryota FUKUYAMA ,  Yasuhiro SHINMA ,  Koji TAYA ,  Masanori ONODERA ,  Naomi MASUDA

IPC分类号： H01L21/78

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/49575 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/05548 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention provides a semiconductor device that includes: stacked semiconductor chips, each semiconductor chip including a semiconductor substrate and a first insulating layer that is provided on side faces of the semiconductor substrate and has concavities formed on side faces thereof; first metal layers that are provided in center portions of inner side faces of the concavities; and second metal layers that are provided in the concavities and are connected to the first metal layers formed on each semiconductor chip. The present invention also provides a method of manufacturing the semiconductor device.

摘要翻译： 本发明提供一种半导体器件，其包括堆叠的半导体芯片，每个半导体芯片包括半导体衬底和设置在半导体衬底的侧面上且在其侧面上形成有凹部的第一绝缘层; 设置在凹部的内侧面的中心部的第一金属层; 以及第二金属层，其设置在凹部中并连接到形成在每个半导体芯片上的第一金属层。 本发明还提供一种半导体器件的制造方法。

公开(公告)号：US20090115044A1

公开(公告)日：2009-05-07

申请号：US12110181

申请日：2008-04-25

申请人： Masataka HOSHINO ,  Masahiko HARAYAMA ,  Koji TAYA ,  Naomi MASUDA ,  Masanori ONODERA ,  Ryota FUKUYAMA

发明人： Masataka HOSHINO ,  Masahiko HARAYAMA ,  Koji TAYA ,  Naomi MASUDA ,  Masanori ONODERA ,  Ryota FUKUYAMA

IPC分类号： H01L23/02 ,  H01L21/00 ,  H01L23/482 ,  H01L23/485 ,  H01L21/74

CPC分类号： H01L23/5389 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure.

摘要翻译： 公开了堆叠型半导体封装的方法和结构。 在一个实施例中，半导体器件包括安装在基板上的半导体芯片，形成在用于密封半导体芯片的基板上的第一树脂模塑部分和安装在基板上的贯穿金属，以便穿过第一树脂模制部分 半导体芯片 所述半导体器件还包括与所述贯通金属电耦合并且安装在所述第一树脂模制部分上的上金属，以沿着所述第一树脂模塑部分的上表面从所述贯穿金属向所述半导体芯片延伸，其中所述通孔金属和所述上部 金属形成为一体结构。

公开(公告)号：US20090302469A1

公开(公告)日：2009-12-10

申请号：US12256333

申请日：2008-10-22

申请人： Naomi MASUDA ,  Masataka HOSHINO ,  Ryota FUKUYAMA

发明人： Naomi MASUDA ,  Masataka HOSHINO ,  Ryota FUKUYAMA

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/81 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16105 ,  H01L2224/75252 ,  H01L2224/81054 ,  H01L2224/81065 ,  H01L2224/81191 ,  H01L2224/812 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/83907 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor device which includes a first semiconductor chip 10, a first electrode 12 formed on the first semiconductor chip 10, a second semiconductor chip 20 to which the first semiconductor chip 10 is mounted, a second electrode 22 with a protrusion 24, which is formed on the second semiconductor chip 20, and a solder bump 14 which bonds the first electrode 12 and the second electrode 22 to cover at least a part of a side surface of the protrusion 24, and a method for manufacturing thereof are provided.

摘要翻译： 一种半导体器件，包括第一半导体芯片10，形成在第一半导体芯片10上的第一电极12，安装有第一半导体芯片10的第二半导体芯片20，形成有突起24的第二电极22，其形成 以及与第一电极12和第二电极22接合以覆盖突起24的侧面的至少一部分的焊料凸点14及其制造方法。

公开(公告)号：US20120049362A1

公开(公告)日：2012-03-01

申请号：US13015072

申请日：2011-01-27

申请人： Naomi MASUDA ,  Kouichi MEGURO

发明人： Naomi MASUDA ,  Kouichi MEGURO

IPC分类号： H01L23/498 ,  H01L23/48

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48475 ,  H01L2224/48599 ,  H01L2224/49175 ,  H01L2224/85051 ,  H01L2224/85951 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15331 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device has a first semiconductor chip 10 molded with a resin 12, a first metal 14 provided in the resin 12 in a circumference of the first semiconductor chip 10, and being exposed on a lower surface of the resin 12, a second metal 16 provided in the resin 12 over the first metal 14, and being exposed on an upper surface of the resin 12, and a first wire 18 coupling the first semiconductor chip 10 to the first metal 14 and the second metal 16. The first wire 18 is coupled to the first metal 14 and the second metal 16 so as to be sandwiched therebetween.

摘要翻译： 半导体器件具有由树脂12成型的第一半导体芯片10，在第一半导体芯片10的周围设置在树脂12中的第一金属14，露出在树脂12的下表面，第二金属16 设置在第一金属14上的树脂12中并暴露在树脂12的上表面上，以及将第一半导体芯片10连接到第一金属14和第二金属16的第一布线18。 耦合到第一金属14和第二金属16以便夹在其间。

公开(公告)号：US20090200684A1

公开(公告)日：2009-08-13

申请号：US12343348

申请日：2008-12-23

申请人： Naomi MASUDA ,  Koji TAYA

发明人： Naomi MASUDA ,  Koji TAYA

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/32 ,  H01L24/83 ,  H01L29/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10155 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05599

摘要： The semiconductor device according to the present invention has a planar semiconductor chip having projecting connection terminals provided on one surface thereof. A shelf is provided where a peripheral edge of a surface of the semiconductor chip opposite one surface thereof onto which connection terminals are provided is removed. This makes it possible to secure a larger volume of the fillet portion of the underfill, thereby helping improve the function of preventing the rising up of the excess underfill by providing a shelf in the semiconductor chip.

摘要翻译： 根据本发明的半导体器件具有在其一个表面上设置有突出连接端子的平面半导体芯片。 提供了一种搁板，其中半导体芯片的与设置有连接端子的其一个表面相对的表面的周边边缘被去除。 这使得可以确保底部填充物的较大体积的圆角部分，从而通过在半导体芯片中提供搁板来帮助改进防止多余底部填充物上升的功能。

公开(公告)号：US20110057309A1

公开(公告)日：2011-03-10

申请号：US12877661

申请日：2010-09-08

申请人： Junichi KASAI ,  Junji TANAKA ,  Naomi MASUDA

发明人： Junichi KASAI ,  Junji TANAKA ,  Naomi MASUDA

IPC分类号： H01L23/498 ,  H01L21/66 ,  B23P21/00

CPC分类号： H01L24/05 ,  H01L22/24 ,  H01L23/544 ,  H01L24/06 ,  H01L24/17 ,  H01L24/81 ,  H01L2223/5442 ,  H01L2223/5448 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/06051 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/20106 ,  H01L2924/351 ,  H05K1/0269 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2203/0465 ,  Y02P70/613 ,  Y10T29/53022 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Structures, methods, and systems for assessing bonding of electrodes in FCB packaging are disclosed. In one embodiment, a method comprises mounting a semiconductor chip with a plurality of first electrodes of a first shape to a mounted portion with a second electrode of a second shape, wherein the second shape is different from the first shape, bonding a respective on of the plurality of first electrodes and the second electrode using a first solder bump, generating an X-ray image of the first solder bump, and determining an acceptability of the bonding of the respective one of the plurality of first electrodes and the second electrode based on the X-ray image of the first solder bump.

摘要翻译： 公开了用于评估FCB封装中电极接合的结构，方法和系统。 在一个实施例中，一种方法包括将具有第一形状的多个第一电极的半导体芯片安装到具有第二形状的第二电极的安装部分，其中第二形状与第一形状不同， 所述多个第一电极和所述第二电极使用第一焊料凸块，产生所述第一焊料凸块的X射线图像，以及基于所述多个第一电极和所述第二电极中的相应一个的接合，基于 第一焊锡凸块的X射线图像。

公开(公告)号：US20080303144A1

公开(公告)日：2008-12-11

申请号：US12122556

申请日：2008-05-16

申请人： Junichi KASAI ,  Junji TANAKA ,  Naomi MASUDA

发明人： Junichi KASAI ,  Junji TANAKA ,  Naomi MASUDA

IPC分类号： H01L23/488 ,  H01L21/66 ,  B23Q15/00

CPC分类号： H01L24/05 ,  H01L22/24 ,  H01L23/544 ,  H01L24/06 ,  H01L24/17 ,  H01L24/81 ,  H01L2223/5442 ,  H01L2223/5448 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/06051 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/17051 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/20106 ,  H01L2924/351 ,  H05K1/0269 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2203/0465 ,  Y02P70/613 ,  Y10T29/53022 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Structures, methods, and systems for assessing bonding of electrodes in FCB packaging are disclosed. In one embodiment, a method comprises mounting a semiconductor chip with a plurality of first electrodes of a first shape to a mounted portion with a second electrode of a second shape, wherein the second shape is different from the first shape, bonding a respective on of the plurality of first electrodes and the second electrode using a first solder bump, generating an X-ray image of the first solder bump, and determining an acceptability of the bonding of the respective one of the plurality of first electrodes and the second electrode based on the X-ray image of the first solder bump.

摘要翻译： 公开了用于评估FCB封装中电极接合的结构，方法和系统。 在一个实施例中，一种方法包括将具有第一形状的多个第一电极的半导体芯片安装到具有第二形状的第二电极的安装部分，其中第二形状与第一形状不同， 所述多个第一电极和所述第二电极使用第一焊料凸块，产生所述第一焊料凸块的X射线图像，以及基于所述多个第一电极和所述第二电极中的相应一个的接合，基于 第一焊锡凸块的X射线图像。

公开(公告)号：US20110074029A1

公开(公告)日：2011-03-31

申请号：US12962479

申请日：2010-12-07

申请人： Naomi MASUDA

发明人： Naomi MASUDA

IPC分类号： H01L23/488 ,  H01L23/48

CPC分类号： H01L21/67126 ,  H01L21/565 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/75 ,  H01L2224/75743 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/16152 ,  H01L2924/3511 ,  Y10T156/1798 ,  H01L2924/00 ,  H01L2924/00012

摘要： A manufacturing method of a semiconductor device includes arranging a melted resin on a substrate, arranging a semiconductor chip on the melted resin, pressing the semiconductor chip and flip-chip mounting the semiconductor chip on the substrate, and hardening the melted resin with the melted resin being subjected to a fluid pressure and forming a resin portion.

摘要翻译： 半导体器件的制造方法包括将熔融树脂布置在基板上，将半导体芯片布置在熔融树脂上，将半导体芯片按压并将半导体芯片倒装安装在基板上，并用熔融树脂硬化熔融树脂 经受流体压力并形成树脂部分。