公开(公告)号：US20070181726A1

公开(公告)日：2007-08-09

申请号：US11582505

申请日：2006-10-18

申请人： Naoki Ishikawa ,  Tatsuro Tsuneno ,  Hidehiko Kira

发明人： Naoki Ishikawa ,  Tatsuro Tsuneno ,  Hidehiko Kira

IPC分类号： B65H59/16 ,  B21C47/00 ,  G08B13/14

CPC分类号： G06K19/07749 ,  G06K19/07718 ,  G06K19/07728 ,  G06K19/0775 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/75252 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A series of RFID tags is reeled around a reel core formed by a core material and a stress absorbing material lapped around the core material to absorb a stress produced in reeling the series of RFID tags. In the series of RFID tags, a number of RFID tags each having an antenna and a circuit chip connected to the antenna and performing radio communication with the antenna are formed in a predetermined pitch on a long-belt-like and flexible base.

摘要翻译： 一系列RFID标签卷绕在由芯材料形成的卷盘芯和围绕芯材料堆叠的应力吸收材料，以吸收在卷绕该系列RFID标签时产生的应力。 在一系列RFID标签中，在长带状和柔性基底上以预定间距形成多个具有连接到天线的天线和电路芯片并与天线进行无线电通信的RFID标签。

公开(公告)号：US07214563B2

公开(公告)日：2007-05-08

申请号：US11319652

申请日：2005-12-29

申请人： Naoki Ishikawa ,  Shunji Baba ,  Hidehiko Kira ,  Hiroshi Kobayashi ,  Shunichi Kikuchi ,  Tatsuro Tsuneno

发明人： Naoki Ishikawa ,  Shunji Baba ,  Hidehiko Kira ,  Hiroshi Kobayashi ,  Shunichi Kikuchi ,  Tatsuro Tsuneno

IPC分类号： H01L21/44

CPC分类号： G06K19/07749 ,  H01L21/67132 ,  H01L21/67144 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/75314 ,  H01L2224/7565 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81121 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81907 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81

摘要： An IC chip mounting method which mounts two or more IC chips on a base, includes: preparing a wafer by mounting a tape on a face thereof, which is the reverse of the wafer having a mounting surface to be attached to the base, and by dividing the wafer into IC chips by dicing while leaving the tape; positioning the wafer to face the base in such a direction that the mounting surface to be attached to the base faces the base; sequentially pressing the IC chips on the wafer against the base and temporarily fixing the IC chips while the base is being fed in a prescribed one-dimensional direction along the wafer and while the wafer is being moved two-dimensionally along the base; and fixing the IC chips temporarily fixed on the base on the base by heating and pressurizing in a batch manner.

摘要翻译： 一种将两个或更多个IC芯片安装在基座上的IC芯片安装方法，包括：通过在其表面上安装带子，准备晶片，该晶片具有安装在基座上的安装表面，并且通过 在离开胶带的同时通过切割将晶片分成IC芯片; 将晶片定位成使得与基座相对的安装表面面向基座的方向面对基座; 在晶片沿着晶片沿指定的一维方向进给的同时沿着基座二维移动的同时，将晶片上的IC芯片依次按压在基板上并临时固定IC芯片; 并且通过间歇加热和加压将临时固定在基座上的IC芯片固定在基座上。

公开(公告)号：US20070020801A1

公开(公告)日：2007-01-25

申请号：US11324600

申请日：2006-01-04

申请人： Naoki Ishikawa ,  Tatsuro Tsuneno ,  Hidehiko Kira ,  Hiroshi Kobayashi

发明人： Naoki Ishikawa ,  Tatsuro Tsuneno ,  Hidehiko Kira ,  Hiroshi Kobayashi

IPC分类号： H01L21/00

CPC分类号： G06K19/07745 ,  G06K19/07718 ,  H01L21/67144 ,  H01L21/6836 ,  H01L24/75 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/75743 ,  H01L2224/75822 ,  H01L2224/7598 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/81

摘要： The present invention provides an IC chip mounting method for mounting two or more IC chips on a base, including: preparing a wafer by mounting a tape on a face thereof, which is the reverse of the wafer having a mounting surface to be attached to the base, and by dividing the wafer into IC chips by dicing while leaving the tape; sequentially pressing the IC chips on the wafer against a first roller to allow the chips to be sucked onto the first roller; subsequently transferring the IC chips sucked onto the first roller to a second roller; and subsequently mounting the IC chips transferred to the second roller on the traveling base.

摘要翻译： 本发明提供了一种用于在基座上安装两个或更多个IC芯片的IC芯片安装方法，包括：通过在其表面上安装带来准备晶片，该晶片具有安装在其上的安装表面 并且通过在离开胶带的同时通过切割将晶片分成IC芯片; 依次将晶片上的IC芯片压靠在第一辊上，以使芯片被吸入到第一辊上; 随后将吸入第一辊的IC芯片传送到第二辊; 随后将传送到第二辊的IC芯片安装在行进基座上。

公开(公告)号：US07595219B2

公开(公告)日：2009-09-29

申请号：US11324600

申请日：2006-01-04

申请人： Naoki Ishikawa ,  Tatsuro Tsuneno ,  Hidehiko Kira ,  Hiroshi Kobayashi

发明人： Naoki Ishikawa ,  Tatsuro Tsuneno ,  Hidehiko Kira ,  Hiroshi Kobayashi

IPC分类号： H01L21/00

CPC分类号： G06K19/07745 ,  G06K19/07718 ,  H01L21/67144 ,  H01L21/6836 ,  H01L24/75 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/75743 ,  H01L2224/75822 ,  H01L2224/7598 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/81

摘要： The present invention provides an IC chip mounting method for mounting two or more IC chips on a base, including: preparing a wafer by mounting a tape on a face thereof, which is the reverse of the wafer having a mounting surface to be attached to the base, and by dividing the wafer into IC chips by dicing while leaving the tape; sequentially pressing the IC chips on the wafer against a first roller to allow the chips to be sucked onto the first roller; subsequently transferring the IC chips sucked onto the first roller to a second roller; and subsequently mounting the IC chips transferred to the second roller on the traveling base.

摘要翻译： 本发明提供了一种用于在基座上安装两个或更多个IC芯片的IC芯片安装方法，包括：通过在其表面上安装带来准备晶片，该晶片具有安装在其上的安装表面 并且通过在离开胶带的同时通过切割将晶片分成IC芯片; 依次将晶片上的IC芯片压靠在第一辊上，以使芯片被吸入到第一辊上; 随后将吸入第一辊的IC芯片传送到第二辊; 随后将传送到第二辊的IC芯片安装在行进基座上。

公开(公告)号：US20070020800A1

公开(公告)日：2007-01-25

申请号：US11319652

申请日：2005-12-29

申请人： Naoki Ishikawa ,  Shunji Baba ,  Hidehiko Kira ,  Hiroshi Kobayashi ,  Shunichi Kikuchi ,  Tatsuro Tsuneno

发明人： Naoki Ishikawa ,  Shunji Baba ,  Hidehiko Kira ,  Hiroshi Kobayashi ,  Shunichi Kikuchi ,  Tatsuro Tsuneno

IPC分类号： H01L21/00

CPC分类号： G06K19/07749 ,  H01L21/67132 ,  H01L21/67144 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2223/6677 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/75314 ,  H01L2224/7565 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81121 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81907 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/81

摘要： An IC chip mounting method which mounts two or more IC chips on a base, includes: preparing a wafer by mounting a tape on a face thereof, which is the reverse of the wafer having a mounting surface to be attached to the base, and by dividing the wafer into IC chips by dicing while leaving the tape; positioning the wafer to face the base in such a direction that the mounting surface to be attached to the base faces the base; sequentially pressing the IC chips on the wafer against the base and temporarily fixing the IC chips while the base is being fed in a prescribed one-dimensional direction along the wafer and while the wafer is being moved two-dimensionally along the base; and fixing the IC chips temporarily fixed on the base on the base by heating and pressurizing in a batch manner.

公开(公告)号：US20060131426A1

公开(公告)日：2006-06-22

申请号：US11091934

申请日：2005-03-29

申请人： Naoki Ishikawa ,  Shunji Baba ,  Hidehiko Kira ,  Hiroshi Kobayashi

发明人： Naoki Ishikawa ,  Shunji Baba ,  Hidehiko Kira ,  Hiroshi Kobayashi

IPC分类号： G06K19/06 ,  G08B13/14 ,  H01Q17/00

CPC分类号： H01L24/12 ,  G06K19/07749 ,  G06K19/0775 ,  H01L23/49855 ,  H01L24/11 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/73203 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/8159 ,  H01L2224/816 ,  H01L2224/81801 ,  H01L2224/81903 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  Y10T29/49018 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2224/29075 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The present invention provides a radio frequency identification (RFID) tag which exchanges information with an external device in a noncontact manner, in which a paste is used as a material for an antenna, and which is designed to prevent sinking of bumps. A stopper for limiting sinking of bumps of a circuit chip caused by a pressing force when the circuit chip is connected to an antenna is provided on the circuit chip or a base at a position adjacent to the bumps.

摘要翻译： 本发明提供了一种射频识别（RFID）标签，其以非接触方式与外部设备交换信息，其中使用糊料作为天线的材料，并且被设计成防止凸起的下沉。 当电路芯片连接到天线时，用于限制由压力引起的电路芯片的凸块的下沉的止动器设置在电路芯片或与凸块相邻的位置的基座上。

公开(公告)号：US20060030076A1

公开(公告)日：2006-02-09

申请号：US11246267

申请日：2005-10-11

申请人： Hiroshi Kobayashi ,  Naoki Ishikawa ,  Kenji Kobae ,  Hidehiko Kira ,  Norio Kainuma ,  Shuichi Takeuchi ,  Takayoshi Matsumura

发明人： Hiroshi Kobayashi ,  Naoki Ishikawa ,  Kenji Kobae ,  Hidehiko Kira ,  Norio Kainuma ,  Shuichi Takeuchi ,  Takayoshi Matsumura

IPC分类号： H01L21/48 ,  H01L21/44 ,  H01L21/50

CPC分类号： H01L24/29 ,  H01L21/563 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13644 ,  H01L2224/13664 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

摘要： The semiconductor device of the present invention is capable of restricting alloying metals and improving electrical connection between a semiconductor chip and a mount board. The semiconductor device comprises: the semiconductor chip having terminal sections; and bumps for electrical connection, the bumps being formed at the terminal sections. Each of the bumps is made of a two-layer wire, which includes a core member and a jacket member, and formed by a stud bump bonding process.

摘要翻译： 本发明的半导体器件能够限制合金化金属和改善半导体芯片和安装基板之间的电连接。 半导体器件包括：具有端子部分的半导体芯片; 以及用于电连接的凸块，在端子部分处形成凸点。 每个凸块由包括芯构件和护套构件的双层线制成，并且通过柱凸块接合工艺形成。

公开(公告)号：US06458237B1

公开(公告)日：2002-10-01

申请号：US09045115

申请日：1998-03-20

申请人： Kazuhisa Tsunoi ,  Hidehiko Kira ,  Shunji Baba ,  Akira Fujii ,  Toshihiro Kusagaya ,  Kenji Kobae ,  Norio Kainuma ,  Naoki Ishikawa ,  Satoshi Emoto

发明人： Kazuhisa Tsunoi ,  Hidehiko Kira ,  Shunji Baba ,  Akira Fujii ,  Toshihiro Kusagaya ,  Kenji Kobae ,  Norio Kainuma ,  Naoki Ishikawa ,  Satoshi Emoto

IPC分类号： B32B700

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/75 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/81001 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/00

摘要： A method of mounting a semiconductor device having bumps on a board having pads so that each of the bumps is joined to a corresponding one of the pads is provided. Adhesive to be hardened by heat is provided between the semiconductor device and the board. The method includes the steps of pressing the bumps of the semiconductor device on the pads of the board, and heating a portion in which each of the bumps and a corresponding one of the pads are in contact with each other. A pressure of the bumps to the pads reaches a predetermined value before a temperature of the adhesive to which heat is supplied in the above step reaches a temperature at which the adhesive is hardened.

摘要翻译： 提供了一种将具有凸块的半导体器件安装在具有焊盘的板上，使得每个凸起接合到相应的一个焊盘的方法。 在半导体器件和电路板之间提供通过加热硬化的粘合剂。 该方法包括以下步骤：将半导体器件的凸起按压在板的焊盘上，并且加热其中每个凸块和相应的一个焊盘彼此接触的部分。 在上述步骤中供应热量的粘合剂的温度达到粘合剂硬化的温度之前，焊盘的凸块的压力达到预定值。

公开(公告)号：US06240634B1

公开(公告)日：2001-06-05

申请号：US09460727

申请日：1999-12-14

申请人： Hidehiko Kira ,  Kenji Kobae ,  Norio Kainuma ,  Naoki Ishikawa ,  Satoshi Emoto

发明人： Hidehiko Kira ,  Kenji Kobae ,  Norio Kainuma ,  Naoki Ishikawa ,  Satoshi Emoto

IPC分类号： H05K330

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/743 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/75745 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  Y10T29/4913 ,  Y10T29/49137 ,  Y10T29/49144 ,  Y10T29/53178 ,  H01L2924/00

摘要： In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.

摘要翻译： 在制造多芯片封装模块的方法中，将粗间距裸芯片定位在印刷电路板上的第一位置处，并且在第一位置将粗糙间距裸芯片暂时附接到板上。 通过同时向粗糙的裸芯片施加热量和压力，同时将粗糙的裸芯片安装在板上。 微细间距裸芯片中的相应一个位于除了第一位置之外的板上的第二位置中的相应一个处，并且通过向第一位置施加热和压力将精细间距裸芯片中的相应一个安装在板上 单芯片的裸芯片，以生产多芯片封装模块。

公开(公告)号：US6122823A

公开(公告)日：2000-09-26

申请号：US401985

申请日：1999-09-23

申请人： Hidehiko Kira ,  Kenji Kobae ,  Norio Kainuma ,  Naoki Ishikawa ,  Satoshi Emoto

发明人： Hidehiko Kira ,  Kenji Kobae ,  Norio Kainuma ,  Naoki Ishikawa ,  Satoshi Emoto

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L21/60 ,  H01L21/603 ,  H01L25/04 ,  H01L25/18 ,  H05K3/34

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/743 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/75745 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  Y10T29/4913 ,  Y10T29/49137 ,  Y10T29/49144 ,  Y10T29/53178

摘要： In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.

摘要翻译： 在制造多芯片封装模块的方法中，将粗间距裸芯片定位在印刷电路板上的第一位置处，并且在第一位置将粗糙间距裸芯片临时附接到板上。 通过同时向粗糙的裸芯片施加热量和压力，同时将粗糙的裸芯片安装在板上。 微细间距裸芯片中的相应一个位于除了第一位置之外的板上的第二位置中的相应一个处，并且通过向第一位置施加热和压力将精细间距裸芯片中的相应一个安装在板上 单芯片的裸芯片，以生产多芯片封装模块。