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公开(公告)号：US20160133794A1
公开(公告)日：2016-05-12
申请号：US14987905
申请日：2016-01-05
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Martin Mandl , Martin Strassburg , Christopher Kölper , Alexander F. Pfeuffer , Patrick Rode
CPC classification number: H01L33/44 , H01L27/156 , H01L33/08 , H01L33/14 , H01L33/18 , H01L33/20 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/42 , H01L33/46 , H01L33/60
Abstract: An optoelectronic semiconductor chip includes a multiplicity of active regions arranged at a distance from one another, and a continuous current spreading layer, wherein at least one of the active regions has a main extension direction, one of the active regions has a core region formed with a first semiconductor material, the active region has an active layer covering the core region at least in directions transversely with respect to the main extension direction of the active region, the active region has a cover layer formed with a second semiconductor material and covers the active layer at least in directions transversely with respect to the main extension direction of the active region, and the current spreading layer covers all cover layers of the active region.
Abstract translation: 光电子半导体芯片包括彼此间隔一定距离的多个有源区和连续电流扩散层，其中至少一个有源区具有主延伸方向，有源区中的一个具有形成有 所述有源区具有至少在所述有源区的主延伸方向的横向方向上至少覆盖所述芯区的有源层，所述有源区具有形成有第二半导体材料并覆盖所述有源区的覆盖层 至少在相对于有源区域的主延伸方向横向的方向上，并且电流扩展层覆盖有源区域的所有覆盖层。
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2.发明授权Optoelectronic semiconductor chip having reduced strain between different constituent materials of the chip 有权在芯片的不同构成材料之间具有减小的应变的光电子半导体芯片公开(公告)号：US09293652B2
公开(公告)日：2016-03-22
申请号：US14818630
申请日：2015-08-05
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Werner Bergbauer , Patrick Rode , Martin Strassburg
IPC: H01L33/00 , H01L33/12 , H01L33/50 , H01L33/20 , H01L33/38 , H01L33/32 , H01L33/62 , H01L33/22 , B82Y40/00
CPC classification number: H01L33/12 , B82Y40/00 , H01L33/0025 , H01L33/0079 , H01L33/20 , H01L33/22 , H01L33/32 , H01L33/382 , H01L33/50 , H01L33/502 , H01L33/508 , H01L33/62 , H01L2224/48463
Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack including a nitride compound semiconductor material on a carrier substrate, wherein the semiconductor layer stack includes an active layer that emits an electromagnetic radiation, the semiconductor layer stack being arranged between a layer of a first conductivity and a layer of a second conductivity, the layer of the first conductivity is adjacent a front of the semiconductor layer stack, the layer of the first conductivity electrically connects to a first electrical connection layer covering at least a portion of a back of the semiconductor layer stack, and the layer of the second conductivity type electrically connects to a second electrical connection layer arranged at the back.
Abstract translation: 光电子半导体芯片包括在载体基板上包括氮化物化合物半导体材料的半导体层堆叠，其中所述半导体层堆叠包括发射电磁辐射的有源层，所述半导体层堆叠被布置在第一导电层和 所述第一导电层与所述半导体层堆叠的前部相邻，所述第一导电层电连接到覆盖所述半导体层堆叠的背面的至少一部分的第一电连接层， 并且第二导电类型的层电连接到布置在后面的第二电连接层。
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公开(公告)号：US09257611B2
公开(公告)日：2016-02-09
申请号：US14362155
申请日：2012-11-27
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Martin Mandl , Martin Strassburg , Christopher Kölper , Alexander F. Pfeuffer , Patrick Rode
IPC: H01L29/18 , H01L33/44 , H01L33/18 , H01L33/24 , H01L27/15 , H01L33/60 , H01L33/08 , H01L33/22 , H01L33/42 , H01L33/46
CPC classification number: H01L33/44 , H01L27/156 , H01L33/08 , H01L33/14 , H01L33/18 , H01L33/20 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/42 , H01L33/46 , H01L33/60
Abstract: An optoelectronic semiconductor chip includes a multiplicity of active regions, arranged at a distance from one another, and a reflective layer arranged at an underside of the multiplicity of active regions, wherein at least one of the active regions has a main extension direction, one of the active regions has a core region formed with a first semiconductor material, the active region has an active layer, covering the core region at least in directions transversely with respect to the main extension direction of the active region, the active region has a cover layer formed with a second semiconductor material and covers the active layer at least in directions transversely with respect to the main extension direction of the active region, and the reflective layer reflects electromagnetic radiation generated during operation in the active layer.
Abstract translation: 光电子半导体芯片包括彼此间隔设置的多个有源区和布置在多个有源区的下侧的反射层，其中至少一个有源区具有主延伸方向， 所述有源区具有形成有第一半导体材料的芯区，所述有源区具有有源层，至少在相对于所述有源区的主延伸方向横向的方向上覆盖所述芯区，所述有源区具有覆盖层 形成有第二半导体材料，并且至少在相对于有源区的主延伸方向横向的方向上覆盖有源层，并且反射层反射在有源层中操作期间产生的电磁辐射。
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公开(公告)号：US20150340561A1
公开(公告)日：2015-11-26
申请号：US14818630
申请日：2015-08-05
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Werner Bergbauer , Patrick Rode , Martin Strassburg
CPC classification number: H01L33/12 , B82Y40/00 , H01L33/0025 , H01L33/0079 , H01L33/20 , H01L33/22 , H01L33/32 , H01L33/382 , H01L33/50 , H01L33/502 , H01L33/508 , H01L33/62 , H01L2224/48463
Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack including a nitride compound semiconductor material on a carrier substrate, wherein the semiconductor layer stack includes an active layer that emits an electromagnetic radiation, the semiconductor layer stack being arranged between a layer of a first conductivity and a layer of a second conductivity, the layer of the first conductivity is adjacent a front of the semiconductor layer stack, the layer of the first conductivity electrically connects to a first electrical connection layer covering at least a portion of a back of the semiconductor layer stack, and the layer of the second conductivity type electrically connects to a second electrical connection layer arranged at the back.
Abstract translation: 光电子半导体芯片包括在载体基板上包括氮化物化合物半导体材料的半导体层堆叠，其中所述半导体层堆叠包括发射电磁辐射的有源层，所述半导体层堆叠被布置在第一导电层和 所述第一导电层与所述半导体层堆叠的前部相邻，所述第一导电层电连接到覆盖所述半导体层堆叠的背面的至少一部分的第一电连接层， 并且第二导电类型的层电连接到布置在后面的第二电连接层。
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公开(公告)号：US10446723B2
公开(公告)日：2019-10-15
申请号：US15532486
申请日：2015-12-02
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Rainer Butendeich , Ion Stoll , Martin Mandl , Martin Strassburg
Abstract: The invention relates to an optoelectronic element comprising a semiconductor chip (12) that emits a blue-green light (4) during operation and has at least one light passage surface (12a) through which the blue-green light (4) emitted during operation passes and comprising a conversion element (3) which comprises fluorescent particles (31), in particular fluorescent particles of only one type, and which is arranged on the light passage surface (12a) at least in some areas. The fluorescent particles (31) at least partly convert the blue-green light (4) into a red light (5), and the optoelectronic element emits a white mixed light (6) which contains non-converted components of the blue-green light (4) and components of the red light (5).
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Patent Agency Ranking
公开(公告)号：US09691815B2
公开(公告)日：2017-06-27
申请号：US14434760
申请日：2013-10-01
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Martin Mandl , Martin Strassburg , Christopher Koelper , Alexander F. Pfeuffer , Patrick Rode
CPC classification number: H01L27/156 , H01L25/0753 , H01L33/0062 , H01L33/0079 , H01L33/18 , H01L33/24 , H01L33/385 , H01L2924/0002 , H01L2924/00
Abstract: In at least one embodiment of the method, said method includes the following steps: A) producing radiation-active islands (4) having a semiconductor layer sequence (3) on a growth substrate (2), wherein the islands (4) each comprise at least one active zone (33) of the semiconductor layer sequence (3), and an average diameter of the islands (4), as viewed in a top view of the growth substrate, amounts to between 50 nm and 10 μm inclusive, B) producing a separating layer (5) on a side of the islands (4) facing the growth substrate (2), wherein the separating layer (5) surrounds the islands (4) all around, as viewed in a top view of the growth substrate (2), C) attaching a carrier substrate (6) to a side of the islands (4) facing away from the growth substrate (2), and D) detaching the growth substrate (2) from the islands (4), wherein at least a part of the separating layer (5) is destroyed and/or at least temporarily softened during the detachment.
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公开(公告)号：US09318651B2
公开(公告)日：2016-04-19
申请号：US14352575
申请日：2012-10-08
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Adrian Stefan Avramescu , Patrick Rode , Martin Strassburg
CPC classification number: H01L33/06 , H01L27/15 , H01L33/005 , H01L33/08 , H01L33/382 , H01L2224/48463
Abstract: A semiconductor chip with a layer stack includes a first semiconductor layer sequence and a second semiconductor layer sequence. The first semiconductor layer sequence includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and an active zone arranged therebetween. The second semiconductor layer sequence includes the second semiconductor region of the second conductivity type, a third semiconductor region of the first conductivity type and a second active zone arranged therebetween.
Abstract translation: 具有层堆叠的半导体芯片包括第一半导体层序列和第二半导体层序列。 第一半导体层序列包括第一导电类型的第一半导体区域，第二导电类型的第二半导体区域和布置在其间的有源区域。 第二半导体层序列包括第二导电类型的第二半导体区域，第一导电类型的第三半导体区域和布置在其间的第二有源区。
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公开(公告)号：US09136431B2
公开(公告)日：2015-09-15
申请号：US14447679
申请日：2014-07-31
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Werner Bergbauer , Patrick Rode , Martin Strassburg
IPC: H01L33/00 , H01L33/12 , H01L33/20 , H01L33/38 , H01L33/50 , H01L33/32 , H01L33/62 , H01L33/22 , B82Y40/00
CPC classification number: H01L33/12 , B82Y40/00 , H01L33/0025 , H01L33/0079 , H01L33/20 , H01L33/22 , H01L33/32 , H01L33/382 , H01L33/50 , H01L33/502 , H01L33/508 , H01L33/62 , H01L2224/48463
Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack including a nitride compound semiconductor material on a carrier substrate, wherein the semiconductor layer stack includes an active layer that emits an electromagnetic radiation, the semiconductor layer stack being arranged between a layer of a first conductivity and a layer of a second conductivity, the layer of the first conductivity is adjacent a front of the semiconductor layer stack, the layer of the first conductivity electrically connects to a first electrical connection layer covering at least a portion of a back of the semiconductor layer stack, and the layer of the second conductivity type electrically connects to a second electrical connection layer arranged at the back.
Abstract translation: 光电子半导体芯片包括在载体基板上包括氮化物化合物半导体材料的半导体层堆叠，其中所述半导体层堆叠包括发射电磁辐射的有源层，所述半导体层堆叠被布置在第一导电层和 所述第一导电层与所述半导体层堆叠的前部相邻，所述第一导电层电连接到覆盖所述半导体层堆叠的背面的至少一部分的第一电连接层， 并且第二导电类型的层电连接到布置在后面的第二电连接层。
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公开(公告)号：US20140339577A1
公开(公告)日：2014-11-20
申请号：US14362155
申请日：2012-11-27
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Martin Mandl , Martin Strassburg , Christopher Kölper , Alexander F. Pfeuffer , Patrick Rode
CPC classification number: H01L33/44 , H01L27/156 , H01L33/08 , H01L33/14 , H01L33/18 , H01L33/20 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/42 , H01L33/46 , H01L33/60
Abstract: An optoelectronic semiconductor chip includes a multiplicity of active regions, arranged at a distance from one another, and a reflective layer arranged at an underside of the multiplicity of active regions, wherein at least one of the active regions has a main extension direction, one of the active regions has a core region formed with a first semiconductor material, the active region has an active layer, covering the core region at least in directions transversely with respect to the main extension direction of the active region, the active region has a cover layer formed with a second semiconductor material and covers the active layer at least in directions transversely with respect to the main extension direction of the active region, and the reflective layer reflects electromagnetic radiation generated during operation in the active layer.
Abstract translation: 光电子半导体芯片包括彼此间隔设置的多个有源区和布置在多个有源区的下侧的反射层，其中至少一个有源区具有主延伸方向， 所述有源区具有形成有第一半导体材料的芯区，所述有源区具有有源层，至少在相对于所述有源区的主延伸方向横向的方向上覆盖所述芯区，所述有源区具有覆盖层 形成有第二半导体材料，并且至少在相对于有源区的主延伸方向横向的方向上覆盖有源层，并且反射层反射在有源层中操作期间产生的电磁辐射。
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公开(公告)号：US20140239253A1
公开(公告)日：2014-08-28
申请号：US14352575
申请日：2012-10-08
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Adrian Stefan Avramescu , Patrick Rode , Martin Strassburg
CPC classification number: H01L33/06 , H01L27/15 , H01L33/005 , H01L33/08 , H01L33/382 , H01L2224/48463
Abstract: A semiconductor chip with a layer stack includes a first semiconductor layer sequence and a second semiconductor layer sequence. The first semiconductor layer sequence includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and an active zone arranged therebetween. The second semiconductor layer sequence includes the second semiconductor region of the second conductivity type, a third semiconductor region of the first conductivity type and a second active zone arranged therebetween.
Abstract translation: 具有层堆叠的半导体芯片包括第一半导体层序列和第二半导体层序列。 第一半导体层序列包括第一导电类型的第一半导体区域，第二导电类型的第二半导体区域和布置在其间的有源区域。 第二半导体层序列包括第二导电类型的第二半导体区域，第一导电类型的第三半导体区域和布置在其间的第二有源区。
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