Method for fabricating a thin film inductor
    1.
    发明授权
    Method for fabricating a thin film inductor 有权
    薄膜电感器的制造方法

    公开(公告)号:US6040226A

    公开(公告)日:2000-03-21

    申请号:US177908

    申请日:1998-10-23

    IPC分类号: H01L21/20

    CPC分类号: H01L21/20

    摘要: A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.

    摘要翻译: 提供了一种用于在聚合物或陶瓷表面上制造诸如电阻器,电感器和电容器的精密电子部件的方法。 电子部件可以沉积和修整成精确或匹配的值,而不会精确沉积所有预图案化材料。 薄膜电子部件沉积在表面上,测量或估计参数值,产生校正偏移文件,并且使用适应光刻将组件修剪到非常接近的公差。 可以使用计算机程序来实现电子部件的调整,例如改变电感线圈或电阻器引线的物理长度,或者改变电容器板面积。

    Digital speed controller using a single-chip microcontroller
    8.
    发明授权
    Digital speed controller using a single-chip microcontroller 失效
    使用单片微控制器的数字调速控制器

    公开(公告)号:US4845608A

    公开(公告)日:1989-07-04

    申请号:US135961

    申请日:1987-12-21

    申请人: Michael Gdula

    发明人: Michael Gdula

    IPC分类号: H02P23/00

    摘要: A speed regulator digital speed controller for rotating machinery is comprised of a single-chip microcontroller operating in conjunction with a multiple counter/time peripheral, and is programmed in a high level language. Pulses are generated by a digital speed sensor at a rate too low to give the required speed resolution; these pulses are counted and a preset number toggles a binary gate signal. Two clock counters both having an input connected to a high reference frequency oscillator are gated alternately and accumulate a count depending on the length of the gated on interval. These speed related counts are read during alternating gated off intervals into the microcontroller where the speed error is calculated in real time to a high degree of accuracy and resolution. The speed of an electric motor and a steam turbine, for instance, are regulated.

    摘要翻译: 用于旋转机械的速度调节器数字速度控制器包括与多个计数器/时间外设结合使用的单片微控制器,并以高级语言编程。 脉冲由数字速度传感器以太低的速率产生,无法提供所需的速度分辨率; 这些脉冲被计数,并且预设的数字切换二进制门信号。 具有连接到高参考频率振荡器的输入的两个时钟计​​数器交替地选通,并且根据门控的间隔的长度累积计数。 这些速度相关计数在交替的选通间隔期间被读取到微控制器中,其中速度误差被实时计算到高精度和分辨率。 例如,电动机和蒸汽轮机的速度被调节。

    Dynamic memory controller for single-chip microprocessor
    10.
    发明授权
    Dynamic memory controller for single-chip microprocessor 失效
    用于单片微处理器的动态存储控制器

    公开(公告)号:US4649511A

    公开(公告)日:1987-03-10

    申请号:US516620

    申请日:1983-07-25

    申请人: Michael Gdula

    发明人: Michael Gdula

    IPC分类号: G06F9/48 G11C11/406 G06F12/00

    CPC分类号: G06F9/4825 G11C11/406

    摘要: A controller for interfacing a single-chip microcomputer with external dynamic random-access memory, includes a subcircuit for generating a column-address strobe at a time after a row-address strobe is generated, and also includes a multiplexing subcircuit for providing the proper 8-bit portion of a 16-bit address output from the microprocessor to the 8-bit dynamic memory inputs, prior to receipt of the associated row-address or column-address strobe. The microprocessor utilizes the strobe-generation and multiplexing subcircuits to burst-refresh the dynamic memory, in one presently preferred embodiment. In another presently preferred embodiment, lines from an additional microprocessor output port are utilized with a resettable binary counter and a multiplicity of buffers, to count through the range of row addresses in cyclic fashion, with each address being incremented after the previously-addressed row of memory cells has been refreshed.

    摘要翻译: 用于将单片微机与外部动态随机存取存储器连接的控制器包括用于在产生行地址选通之后的时间产生列地址选通的子电路,并且还包括用于提供正确的8 在接收相关联的行地址或列地址选通之前,从微处理器输出到8位动态存储器输入的16位地址的位部分。 在一个当前优选的实施例中,微处理器利用选通产生和多路复用子电路来突发刷新动态存储器。 在另一个当前优选的实施例中,来自附加微处理器输出端口的线路与可复位的二进制计数器和多个缓冲器一起使用,以循环方式对行地址的范围进行计数,每个地址在先前寻址的行 内存单元已刷新。