公开(公告)号：US20240172431A1

公开(公告)日：2024-05-23

申请号：US18425996

申请日：2024-01-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： James KAI ,  Johann ALSMEIER ,  Lito De La RAMA ,  Masaaki HIGASHITANI ,  Koichi MATSUNO ,  Marika GUNJI-YONEOKA ,  Makoto KOTO ,  Hisakazu OTOI ,  Masanori TSUTSUMI

IPC: H10B41/27 ,  G11C7/18 ,  G11C8/14 ,  H01L29/06 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

CPC classification number: H10B41/27 ,  G11C7/18 ,  G11C8/14 ,  H01L29/0653 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a plurality of source layers, where the electrically conductive layers include word lines and source-side select gate electrodes which are located between the plurality of source layers and the word lines in a vertical direction, groups of memory openings vertically extending through the alternating stack, and groups of memory opening fill structures located in the groups of memory openings. The plurality of source layers are laterally spaced apart and electrically isolated from each other, and each respective one of the plurality of source layers contacts at least one respective group of the groups of memory opening fill structures.

公开(公告)号：US20170365613A1

公开(公告)日：2017-12-21

申请号：US15279959

申请日：2016-09-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Marika GUNJI-YONEOKA ,  Atsushi SUYAMA ,  Jayavel PACHAMUTHU ,  Tsuyoshi HADA ,  Daewung KANG ,  Murshed CHOWDHURY ,  James KAI ,  Hiro KINOSHITA ,  Tomoyuki OBU ,  Luckshitha Suriyasena LIYANAGE

IPC: H01L27/11556 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11582

CPC classification number: H01L27/11556 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11582

Abstract: An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory film within each memory opening, a germanium-containing semiconductor layer and a dielectric layer is formed in each memory opening. Employing the memory film and the dielectric layer as a crucible, a liquid phase epitaxy anneal is performed to convert the germanium-containing semiconductor layer into a germanium-containing epitaxial channel layer. A dielectric core and a drain region can be formed over the dielectric layer. The germanium-containing epitaxial channel layer is single crystalline, and can provide a higher charge carrier mobility than a polysilicon channel.

公开(公告)号：US20210036003A1

公开(公告)日：2021-02-04

申请号：US16526128

申请日：2019-07-30

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Jayavel PACHAMUTHU ,  Hiroyuki KINOSHITA ,  Marika GUNJI-YONEOKA ,  Tadashi NAKAMURA ,  Tomohiro OGINOE

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L29/45 ,  H01L29/167 ,  H01L29/04 ,  H01L21/28 ,  H01L21/02 ,  H01L21/285

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A memory opening is formed through the alternating stack. A memory film is formed in the memory opening. The memory film includes an opening at a bottom portion. A connection strap is formed by performing a selective semiconductor deposition process that grows a strap semiconductor material from a physically exposed surface of an underlying semiconductor material portion through the opening. A vertical semiconductor channel is formed on an inner sidewall of the memory film by non-selectively depositing a semiconductor channel material. The connection strap provides an electrical connection between the underlying semiconductor material portion and the vertical semiconductor channel through the opening in the memory film. The sacrificial material layers are then replaced with electrically conductive layers.

公开(公告)号：US20170236835A1

公开(公告)日：2017-08-17

申请号：US15434544

申请日：2017-02-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tadashi NAKAMURA ,  Jin LIU ,  Kazuya TOKUNAGA ,  Marika GUNJI-YONEOKA ,  Matthias BAENNINGER ,  Hiroyuki KINOSHITA ,  Murshed CHOWDHURY ,  Jiyin XU ,  Dai IWATA ,  Hiroyuki OGAWA ,  Kazutaka YOSHIZAWA ,  Yasuaki YONEMOCHI

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L29/788 ,  H01L29/06 ,  H01L29/10 ,  H01L23/528 ,  H01L27/11526 ,  H01L29/423 ,  H01L21/28 ,  H01L21/311 ,  H01L21/764 ,  H01L23/29 ,  H01L23/31 ,  H01L27/11521 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  H01L21/31111 ,  H01L21/764 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/528 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/42372

Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.