Stacked die package including a multi-contact interconnect

    公开(公告)号:US12266636B2

    公开(公告)日:2025-04-01

    申请号:US17556547

    申请日:2021-12-20

    Inventor: Jing-En Luan

    Abstract: The present disclosure is directed to a package that includes a plurality of die that are stacked on each other. The plurality of die are within a first resin and conductive layer is on the first resin. The conductive layer is coupled between ones of first conductive vias extending into the first resin to corresponding ones of the plurality of die. The conductive layer and the first conductive vias couple ones of the plurality of die to each other. A second conductive via extends into the first resin to a contact pad of the substrate, and the conductive layer is coupled to the second conductive via coupling ones of the plurality of die to the contact pad of the substrate. A second resin is on and covers the first resin and the conductive layer on the first resin. In some embodiments, the first resin includes a plurality of steps (e.g., a stepped structure). In some embodiments, the first resin includes inclined surfaces (e.g., sloped surfaces).

    PROXIMITY SENSOR, ELECTRONIC APPARATUS AND METHOD FOR MANUFACTURING PROXIMITY SENSOR

    公开(公告)号:US20170123101A1

    公开(公告)日:2017-05-04

    申请号:US14982518

    申请日:2015-12-29

    Inventor: Jing-En Luan

    CPC classification number: G01V8/12 H01L2224/73265

    Abstract: The embodiments of the present disclosure provide a proximity sensor, an electronic apparatus and a method for manufacturing a proximity sensor. The proximity sensor comprises a sensor chip, a light-emitting device, a transparent molding material and a non-transparent molding material, wherein the sensor chip comprises a sensor region; the light-emitting device is located on the sensor chip and is electrically coupled to the sensor chip; the transparent molding material at least covers a light-emitting surface of the light-emitting device; and the non-transparent molding material isolates the transparent molding material from the sensor region.

    Wafer level packaging for proximity sensor
    3.
    发明授权
    Wafer level packaging for proximity sensor 有权
    接近传感器的晶圆级封装

    公开(公告)号:US09583666B2

    公开(公告)日:2017-02-28

    申请号:US14668309

    申请日:2015-03-25

    Inventor: Jing-En Luan

    Abstract: A proximity sensor includes a semiconductor die, a light emitting assembly, a redistribution layer, and an encapsulating layer. A surface of the semiconductor die includes a sensor area and contact pads. A lens is positioned over the sensor area of the semiconductor die. The light emitting assembly includes a light emitting device having a light emitting area, a lens positioned over the light emitting area, and contact pads that face the redistribution layer. A side of the redistribution layer includes contact pads. Electrical connectors place each of the contact pads of the semiconductor die in electrical communication with a respective one of the contact pads of the redistribution layer. The encapsulating layer is positioned on the redistribution layer and at least partially encapsulates the semiconductor die, the lens over the sensor area of the semiconductor die, and the light emitting assembly.

    Abstract translation: 接近传感器包括半导体管芯,发光组件,再分配层和封装层。 半导体管芯的表面包括传感器区域和接触焊盘。 透镜位于半导体管芯的传感器区域上方。 发光组件包括具有发光区域的发光器件,位于发光区域上方的透镜以及面向再分布层的接触焊盘。 再分布层的一侧包括接触垫。 电连接器使得半导体管芯的每个接触焊盘与再分配层的接触焊盘中的相应一个电连通。 封装层位于再分配层上,并且至少部分地封装半导体管芯,半导体管芯的传感器区域上的透镜以及发光组件。

    Glue bleeding prevention cap for optical sensor packages

    公开(公告)号:US10355146B2

    公开(公告)日:2019-07-16

    申请号:US16027647

    申请日:2018-07-05

    Abstract: One or more embodiments are directed to system in package (SiP) for optical devices, such as proximity sensing or optical ranging devices. One embodiment is directed to an optical sensor package that includes a substrate, a sensor die coupled to the substrate, a light-emitting device coupled to the substrate, and a cap. The cap is positioned around side surfaces of the sensor die and covers at least a portion of the substrate. The cap includes first and second sidewalls, an inner wall having first and second side surfaces and a mounting surface, and a cover in contact with the first and second sidewalls and the inner wall. The first and second side surfaces are transverse to the mounting surface, and the inner wall includes an opening extending into the inner wall from the mounting surface. A first adhesive material is provided on the sensor die and at least partially within the opening, and secures the inner wall to the sensor die.

    Image sensing device with interconnect layer gap
    7.
    发明授权
    Image sensing device with interconnect layer gap 有权
    具有互连层间隙的图像感测装置

    公开(公告)号:US09455292B2

    公开(公告)日:2016-09-27

    申请号:US14741561

    申请日:2015-06-17

    Inventor: Jing-En Luan

    Abstract: An image sensing device may include an interconnect layer, an image sensor IC coupled to the interconnect layer and having an image sensing surface, and an IR filter aligned with the image sensing surface opposite the interconnect layer. The image sensing device may include a flexible interconnect layer aligned with the interconnect layer and having a flexible substrate extending laterally outwardly from the interconnect layer, and electrically conductive traces on the flexible substrate. The image sensing device may also include solder bodies coupling the interconnect layer and the flexible interconnect layer and also defining a gap between the interconnect layer and the flexible interconnect layer.

    Abstract translation: 图像感测装置可以包括互连层,耦合到互连层并具有图像感测表面的图像传感器IC和与互连层相对的图像感测表面对准的IR滤光器。 图像感测装置可以包括与互连层对准的柔性互连层,并且具有从互连层横向向外延伸的柔性衬底以及柔性衬底上的导电迹线。 图像感测装置还可以包括耦合互连层和柔性互连层并且还限定互连层和柔性互连层之间的间隙的焊料体。

    Low profile sensor packages
    8.
    发明授权

    公开(公告)号:US12230619B2

    公开(公告)日:2025-02-18

    申请号:US17714822

    申请日:2022-04-06

    Inventor: Jing-En Luan

    Abstract: The present disclosure is directed to embodiments of optical sensor packages. For example, at least one embodiment of an optical sensor package includes a light-emitting die, a light-receiving die, and an interconnect substrate within a first resin. A first transparent portion is positioned on the light-emitting die and the interconnect substrate, and a second transparent portion is positioned on the light-receiving die and the interconnect substrate. A second resin is on the first resin, the interconnect substrate, and the first and second transparent portions, respectively. The second resin partially covers respective surfaces of the first and second transparent portions, respectively, such that the respective surfaces are exposed from the second resin.

    Wafer level chip scale package having varying thicknesses

    公开(公告)号:US11721657B2

    公开(公告)日:2023-08-08

    申请号:US16874392

    申请日:2020-05-14

    Inventor: Jing-En Luan

    CPC classification number: H01L24/14 H01L23/49816

    Abstract: A wafer level chip scale package (WLCSP) with portions that have different thicknesses. A first passive surface of a die in the WLSCP includes a plurality of surfaces. The plurality of surfaces may include inclined surfaces or flat surfaces. Thicker portions of die, with more semiconductor material remaining are non-critical portions that increase a WLCSP's strength for further processing and handling after formation, and the thinner portions are critical portions that reduce a Coefficient of Thermal Expansion (CTE) mismatch between a WLCSP and a PCB.

Patent Agency Ranking